CN1620047A - Unified platform system of Ethernet exchanger and router - Google Patents
Unified platform system of Ethernet exchanger and router Download PDFInfo
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- CN1620047A CN1620047A CN 200310116721 CN200310116721A CN1620047A CN 1620047 A CN1620047 A CN 1620047A CN 200310116721 CN200310116721 CN 200310116721 CN 200310116721 A CN200310116721 A CN 200310116721A CN 1620047 A CN1620047 A CN 1620047A
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Abstract
This invention refers to network exchange and route equipment disclosing a Ethernet exchanger and router integrated platform system which contains CPU, MAC chip, at least one Ethernet network interface and at least one wide area network interface, wherein the CPU is used for unified managing all system, MAC chip is used for controlling Ethernet network interface and wide area network interface data transmission, Ethernet network interface is used for connecting external ethernet network, wide area network interface is used for connecting external wide area network, CPU connects with MAC chip and wide area network by PCI bus, MAC chip connects with wide area network interface by at least one kind of bus and connects with ethernet network interface, CPU connects with wide area network interface by at least one kind of bus.
Description
Technical field
The present invention relates to network exchange and routing device, the system of particularly compatible Ethernet switch and router.
Background technology
In present network, Ethernet switch and router are to use apparatus for network node very widely, because their function differences separately, so the network site difference, and in present Networking Design, both generally need be used.
Specifically, Ethernet switch is that to be operated in Open System Interconnection (Open SystemInterconnection, be called for short " OSI ") the model second layer be on the data link layer, and the network equipment of exchanges data is finished in the selection of realizing route.Ethernet switch is realized function of exchange according to the media interviews control of receiving packet (Medium Access Control is called for short " MAC ") address decision forward-path.With regard to own characteristic, Ethernet switch has good opening, it has a large amount of 10/100/1000BASE-TX/FX Ethernet interfaces, high speed forwarding by the second layer provides powerful exchange capacity, can realize the linear speed exchange, a large amount of use in the environment of enterprise network and broadband user's access.
Router is that to be operated in OSI be on the network layer for the 3rd layer, has the ability that connects different type network, and can select the network equipment of data transfer path.Router connects two or more logic ports by internetworking agreement (Internet Protocol is called for short " IP ") subnet or peer-peer protocol sign usually, has 1 physical port at least.Router is realized the forwarding of packet according to routing table decision output port and the next hop address of receiving that network layer address in the packet and router interior are safeguarded.With regard to its characteristics, the user interface kind of router is abundant, is used for the interconnection of heterogeneous networks more.Wherein, low end router data and protocol massages are all by central processing unit (Central Processing Unit, be called for short " CPU ") handle, therefore general external provides E1/T1, modulator-demodulator low-speed interfaces such as (MODEM), and high-end router adopts network processing unit (Network Processor mostly, be called for short " NP ") structure, Ethernet generally is provided, based on packet exchange (the Packet Over SDH of synchronous digital hierarchy, abbreviation " POS "), asynchronous transfer mode high speed interfaces such as (Asynchronous Transfer Mode are called for short " ATM ").In general, the interconnected router that all adopts of the interconnected and a plurality of subnets of heterogeneous network is finished.
On function, it will be a trend of network equipment development that Ethernet switch and router will merge day by day, POS, the E1/T1 of router special use, wide area networks such as E3/T3, MODEM (Wide Area Network is called for short " WAN ") interface before Ethernet switch can provide; Router also can dispose Ethernet interfaces such as 10/100/1000BASE-TX/FX.The demand of wide-band networking will be better satisfied in the integration of both functions.
In actual applications, there is following problem in such scheme: in these network equipments, Ethernet switch is difficult to directly insert internet (Internet), can only transfer by router, and the low end router performance is relatively low, and message processing capability is low, and high-end router development cost and upgrade cost are too high, and the interface of two kinds of routers all has certain restriction, and certain limitation is all arranged in the use.These problems have all increased the complexity of the cost and the equipment of networking.
Cause the main cause of this situation to be, the architecture of Ethernet switch and router is relatively independent.Ethernet switch lacks wan interface at a high speed, is difficult to directly insert Internet, can only transfer by router.All therefore message processing capability is low by the CPU processing for low end router data and protocol massages, and therefore general external provides low-speed interfaces such as E1/T1, MODEM, and high speed interfaces such as POS, ATM seldom are provided.High-end router adopts the NP structure mostly, but because NP costs an arm and a leg, therefore development cost and upgrade cost are all higher, and general most of high-end router provides high speed interfaces such as Ethernet, POS, ATM, the specification of low-speed interfaces such as shortage E1/T1, MODEM.
Summary of the invention
In view of this, main purpose of the present invention is to provide the unified platform system of a kind of Ethernet switch and router, make Ethernet switch and router compatible on hardware configuration, and possess good extensibility and upgradability, to reduce the networking equipment kind, improve network operation, reduce the networking expense.
For achieving the above object, the invention provides the unified platform system of a kind of Ethernet switch and router, it comprises: central processing unit, media interviews control chip, at least one Ethernet interface and at least one Wide Area Network interface;
Described central processing unit is used for whole system is carried out unified management;
Described media interviews control chip is used to control the transfer of data of described Ethernet interface and described Wide Area Network interface;
Described Ethernet interface is used to connect external ethernet; Described Wide Area Network interface is used to connect outside wide area network;
Described central processing unit is connected with described media interviews control chip and described Wide Area Network interface by the peripheral components interconnection; Described media interviews control chip is connected with described Wide Area Network interface by at least a bus; Described media interviews control chip also is connected with described Ethernet interface; Described central processing unit is connected with described Wide Area Network interface by at least a bus.
Wherein, described system also comprises the Erasable Programmable Logic Device chip, is used for providing under the control of described central processing unit from the string bus, should be connected with described Wide Area Network interface from the string bus;
Described Erasable Programmable Logic Device chip is connected with described central processing unit by described local bus.
The described bus that connects described central processing unit and described Wide Area Network interface comprises any one or its combination in the following bus type:
Internal integrate circuit bus or peripheral components interconnection or hot plug bus.
Described internal integrate circuit bus is controlled by described central processing unit, and described central processing unit conducts interviews and disposes by the chip of internal integrate circuit bus to all band internal integrate circuit bus interfaces in the system.
Described peripheral components interconnection is controlled by described central processing unit, and described central processing unit conducts interviews to the chip of all band peripheral components interconnection interfaces in the system by the peripheral components interconnection and disposes.
Described Wide Area Network interface is all made the plate form, supports hot plug operations by described hot plug bus, is configured in the described Wide Area Network interface.
The described bus that connects described media interviews control chip and described Wide Area Network interface comprises any one or its combination in the following bus type:
Gigabit Ethernet bus and management data input/output bus.
Described gigabit Ethernet bus is responsible for by the gigabit physical chip, be converted to the gigabit Media Independent Interface, for providing the system side data bus interface based on high speed Wide Area Network interface such as the packet exchange of synchronous digital hierarchy, asynchronous transfer modes, by 100,000,000 physical chips, be converted to Media Independent Interface, for slow wan interfaces such as E1/T1 provide the system side data bus interface.
Described management data input/output bus is managed by described media interviews control chip, described central processing unit is visited register relevant with the management data input/output bus in the described media interviews control chip by the peripheral components interconnection, the control to all physical chips is finished in the operation of control and management data input/output bus.
Be reserved with various described buses in the described system.
By relatively finding, technical scheme difference with the prior art of the present invention is, the present invention starts with from the system bus design point of view, utilize the expansion of existing bus or bus to make up, complete system bus design is provided, adopt different bus to realize the function of chain of command and data surface respectively, realize the fusion of Ethernet switch and high low side router feature fully.
Difference on this technical scheme, brought comparatively significantly beneficial effect, promptly utilize the unified platform system of Ethernet switch that the present invention proposes and router can develop the communication equipment of the function that possesses Ethernet switch and router simultaneously, the Ethernet interface of various Ethernet switches and the wan interface of router are provided neatly, have possess huge switching bandwidth in, can provide kind abundant wan interface, can be applied to metropolitan area network separately, enterprise network, broadband access, in the various complicated network environments such as special line, networking equipment kind and quantity have been reduced, reduced the networking expense significantly, be beneficial to the unified maintenance and management of network, better satisfied the demand of wide-band networking, and design bus of the present invention is the expansion of existing bus or existing bus, and backwards compatibility is good, and system upgrade is simple.
Description of drawings
Fig. 1 is the unified platform system composition diagram according to the Ethernet switch of a preferred embodiment of the present invention and router;
Fig. 2 be according to the unified platform system of the Ethernet switch of a preferred embodiment of the present invention and router from string (Slave-serial) bus multiplexing schematic diagram.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing.
As everyone knows, no matter Ethernet switch or router, its system bus design decision the hardware configuration of equipment, thereby define the user interface of these communication equipments.Present invention focuses on from the system bus design point of view, set up the hardware platform that Ethernet switch and router merge.By this platform, communication equipment can provide various wan interfaces such as a plurality of POS, E1/T1, E3/T3, MODEM when Ethernet interfaces such as 10/100/1000BASE-TX/FX are provided in a large number.
Basic principle of the present invention is to make in the communication equipment chain of command and data surface independent mutually, promptly adopts different bus to realize the function of chain of command and data surface respectively.
Below with reference to Fig. 1, the system that further describes a preferred embodiment of the present invention forms.
As shown in Figure 1, the unified platform system of Ethernet switch according to an embodiment of the invention and router comprises: CPU10, MAC chip 20, Erasable Programmable Logic Device (ErasableProgrammable Logic Device, be called for short " EPLD ") chip 30, some 10/100/1000BASE-TX/FX Ethernet interfaces 40 and some wan interfaces 50.
Wherein, CPU10 is connected with MAC chip 20 and all wan interfaces 50 by peripheral device interconnection (Peripheral Component Interconnect is called for short " PCI ") bus; CPU10 is connected with EPLD chip 30 by local (Local Bus) bus; CPU10 is connected with all wan interfaces 50 by hot plug (Hot-Swap) bus; CPU10 is connected with all wan interfaces 50 by internal integrated circuit (Inter-IntegratedCircuit is called for short " I2C ") bus; EPLD chip 30 is connected with all wan interfaces 50 by the Slave-serial bus; MAC chip 20 is connected with all wan interfaces 50 by management data input and output (Management Data Input Output is called for short " MDIO ") bus; MAC chip 20 is connected with all wan interfaces 50 by gigabit Ethernet (Gigabit Ethernet is called for short " GE ") bus; MAC chip 20 is by Media Independent Interface (MediaIndependent Interface, abbreviation " MII "), serial Media Independent Interface interfaces such as (Serial MediaIndependent Interface are called for short " SMII ") is connected with all 10/100/1000BASE-TX/FX Ethernet interfaces 40.
CPU10 is the core of chain of command, is used for equipment is carried out unified management, and I2C bus, pci bus, local bus and Hot-Swap bus externally are provided.For example, in a preferred embodiment of the present invention, CPU10 is by pci bus managing MAC chip 20 and all wan interfaces 50.
MAC chip 20 is cores of data surface, and being used for provides some 10/100/1000BASE-TX/FX Ethernet interfaces 40 by interfaces such as MII, SMII, and GE bus and MDIO bus externally are provided.Wherein, the quantity of the quantity of 10/100/1000BASE-TX/FX Ethernet interface 40 and GE bus interface is by the model and the quantity decision of MAC chip 20.
EPLD chip 30 is used for providing Slave-serial bus under the control of CPU10.Wherein, the Slave-serial bus can be used as the loading of field programmable gate array in the various wan interfaces 50 (FieldProgrammable Gate Array is called for short " FPGA ") from the serial connection mouth.
10/100/1000BASE-TX/FX Ethernet interface 40 is used to provide Ethernet interface.As mentioned above, 10/100/1000BASE-TX/FX Ethernet interface 40 is directly provided by interfaces such as MII, SMII by MAC chip 20, and its concrete quantity is by the model and the quantity decision of MAC chip 20.In a preferred embodiment of the present invention, 10/100/1000BASE-TX/FX Ethernet interface 40 does not take the pci bus bandwidth, can reach the linear speed exchange.In addition, 10/100/1000BASE-TX/FX Ethernet interface 40 can be 24 Fast Ethernets (Fast Ethernet is called for short " FE ") port, 48 Fast Ethernet port, 10 various forms such as GE port.
Wan interface 50 is used to provide the slot of the support hot plug (Hot-Swap) of compatible various wan interface plates.In a preferred embodiment of the present invention, the quantity of wan interface 50 is determined by the quantity of the GE bus interface that MAC chip 20 provides, does not take the bandwidth of pci bus.Wherein, high speed wan interface system side can be passed through fpga logic, physical layer (PHY) chip etc. is connected with the GE bus, is not subjected to the restriction of wan interface 50 concrete system-side interface own.The system-side interface of low speed wan interface can be pci bus, also can be the MII interface of changing out from the GE bus.
Below still in conjunction with Fig. 1, further specify in the unified platform system according to the Ethernet switch of a preferred embodiment of the present invention and router the function of pci bus, Local bus, GE bus, I2C bus, MDIO bus, Slave-serial bus and Hot-Swap bus.
For pci bus, in the present embodiment, CPU10 controls pci bus, is responsible for the arbitration of pci bus.Specifically, pci bus has following three effects: one provides the management bus interface of MAC chip 20 in the communication equipment; Two provide the system side management bus interface of high speed wan interfaces such as POS, ATM; Three provide the system side data/address bus and the management bus interface of low speed wan interfaces such as E1/T1, MODEM.
Need to prove, in the present embodiment, the compatible following standard of pci bus:
1.Local Bus Specification (Revision 2.1)---local bus specification (2.1 editions);
2.PCI Local Bus Specification (Revision 2.2)---the interconnected local bus specification of peripheral components (2.2 editions);
3.PCI-to-PCI Bridge Specification (Revision 1.1)---" peripheral components interconnection bridge joint standard (1.1 editions);
4.PCI Bus Power Management Interface Specification (Revision 1.1)---" peripheral components interconnection power-management interface standard (1.1 editions);
5.PICMG CompactPCI Hot-Swap Specification (Revision 1.0)---" working group of peripheral components interconnection industrial computer manufacturer simplifies peripheral components interconnection hot plug standard (1.0 editions) ".
For the Local bus, in the present embodiment, it is controlled by CPU10, and the management bus interface of EPLD chip 30 in the communication equipment is provided.
For the GE bus, in the present embodiment, it is by 20 controls of MAC chip, and the employing Ethernet.The 1.25G differential lines that 1000BASE-FX uses is right, its signal definition such as following table:
| Signal name | Signal definition |
| TX+ | Just send |
| TX- | Send negative |
| RX+ | Just receive |
| RX- | Receive negative |
On function, the GE bus is responsible on the one hand by gigabit PHY chip, be converted to gigabit Media Independent Interface (Gigabit Media Independent Interface is called for short " GMII "), for high speed wan interfaces such as POS, ATM provide the system side data bus interface; Be responsible on the other hand being converted to the MII interface, for low speed wan interfaces such as E1/T1 provide the system side data bus interface by 100,000,000 PHY chips.
In the present invention, the GE bus can adopt emitter-coupled logic (Emitter Coupled Logic is called for short " ECL ") level, also can adopt CML (Current Mode Logic is called for short " CML ") level.
For the I2C bus, in the present invention, CPU10 control I2C bus is responsible for the arbitration of I2C bus.Specifically, CPU10 conducts interviews to the chip of all band I2C bus interface in the system by the I2C bus and disposes.
Its signal definition of I2C bus such as following table:
| Signal name | Signal definition |
| I2CCLK | I2C bus clock line |
| I2CDATE | The I2C bus data line |
| I2CAD | I2C bus address line |
Need to prove, in the present invention, because the I2C bus address delivered on the different wan interface plates can not repeat, so each wan interface plate all has independently address signal I2CAD, and every cover I2CAD signal all is provided with the different fixing value on the mainboard of communication equipment.The concrete quantity of address signal I2CAD determines by specific design, without limits.
For the MDIO bus, the MDIO bus is the control bus of PHY chip internal register.In a preferred embodiment of the present invention, the conversion that two layers of all exchanges, GE bus arrive gmii interface, MII interface all needs to finish by the PHY chip.MAC chip 20 is in charge of the MDIO bus, and CPU10 is by pci bus, and the register relevant with the MDIO bus in the visit MAC chip controlled the MDIO bus operation, finishes the control to all PHY chips.
Its signal definition of MDIO bus such as following table:
| Signal name | Signal definition |
| MDIOCLK | MDIO bus clock line |
| MDIODATE | The MDIO bus data line |
| MDIOAD | MDIO bus address line |
Similar I2C bus, because the MDIO bus address delivered on the different wan interface plates can not repeat, so each wan interface plate all has independently address signal MDIOAD, every cover MDIOAD signal all is provided with the different fixing value on the mainboard of communication equipment.The concrete quantity of address signal MDIOAD determines by specific design, without limits.
For the Slave-serial bus, produce by the EPLD chip 30 at the system logic place of communication equipment.It can be used as the loading of FPGA in the various wan interfaces from the serial connection mouth.Inner relevant with the Slave-serial bus register of CPU control EPLD produces from the sequential of string on the Slave-serial bus, finishes the loading of FPGA.
Its signal definition of Slave-serial bus such as following table:
| Signal name | Signal definition |
| DIN | The load logic data input signal |
| PROG | Low useful signal, the asynchronous reset load logic |
| DONE | Two-way signaling, the output expression loads and finishes |
| CCLK | Configurable clock generator under string mode, is input signal |
| WAN_SELECT | WAN mouth plate is selected signal from string |
System is by the state of control WAN_SELECT signal, and signals such as multiplexing DIN, PROG, DONE, CCLK load the FPGA above the wan interface plate.The Slave-serial bus is as shown in Figure 2 multiplexing.
Each wan interface plate all has independent electronic switch.Signals such as DIN, PROG, DONE, CCLK are by the FPGA on these electronic switches loading wan interface plates.The on off state of electronic switch is by the WAN_SELECT signal controlling.The CPU10 of communication equipment controls the state of each WAN_SELECT signal.
For the Hot-Swap bus, need to prove that communication equipment can only outwards provide the wan interface slot of limited quantity because volume is limited.For can flexible networking, these slots must compatible various wan interfaces.In a preferred embodiment of the present invention, wan interface all is made on the plate, and these plates are supported hot plug.Wherein, the hot plug process of plate is by the total line traffic control of Hot-Swap.
The Hot-Swap bus signals is defined as follows table:
| Signal name | Signal definition |
| PRESENT | Plate signal on the throne |
| ON | The plate enable signal that powers on |
| HEALTH | The plate normal signal that powers on |
In a preferred embodiment of the present invention, each slot all has and overlaps independently hot plug control signal.
Those of ordinary skill in the art are appreciated that plate local bus (LOCALBUS) if desired, can obtain from pci bus by South Bridge chip.
Though by reference some preferred embodiment of the present invention, the present invention is illustrated and describes, but those of ordinary skill in the art should be understood that, can do various changes to it in the form and details, and the spirit and scope of the present invention that do not depart from appended claims and limited.
Claims (10)
1. the unified platform system of Ethernet switch and router is characterized in that, comprises: central processing unit, media interviews control chip, at least one Ethernet interface and at least one Wide Area Network interface; Wherein,
Described central processing unit is used for whole system is carried out unified management;
Described media interviews control chip is used to control the transfer of data of described Ethernet interface and described Wide Area Network interface;
Described Ethernet interface is used to connect external ethernet;
Described Wide Area Network interface is used to connect outside wide area network; And,
Described central processing unit is connected with described media interviews control chip, described Wide Area Network interface by the peripheral components interconnection; Described media interviews control chip is connected with described Wide Area Network interface by at least a bus; Described media interviews control chip also is connected with described Ethernet interface; Described central processing unit is connected with described Wide Area Network interface by at least a bus.
2. the unified platform system of Ethernet switch according to claim 1 and router, it is characterized in that, described system also comprises the Erasable Programmable Logic Device chip, is used for providing under the control of described central processing unit from the string bus, should be connected with described Wide Area Network interface from the string bus;
Described Erasable Programmable Logic Device chip is connected with described central processing unit by local bus.
3. the unified platform system of Ethernet switch according to claim 1 and router is characterized in that, the described bus that connects described central processing unit and described Wide Area Network interface comprises any one or its combination in the following bus type:
Internal integrate circuit bus or peripheral components interconnection or hot plug bus.
4. the unified platform system of Ethernet switch according to claim 3 and router, it is characterized in that, described internal integrate circuit bus is controlled by described central processing unit, and described central processing unit conducts interviews and disposes by the chip of internal integrate circuit bus to all band internal integrate circuit bus interfaces in the system.
5. the unified platform system of Ethernet switch according to claim 3 and router, it is characterized in that, described peripheral components interconnection is controlled by described central processing unit, and described central processing unit conducts interviews to the chip of all band peripheral components interconnection interfaces in the system by the peripheral components interconnection and disposes.
6. the unified platform system of Ethernet switch according to claim 3 and router is characterized in that, described Wide Area Network interface is the plate form, and supports hot plug operations by described hot plug bus, is configured in the described Wide Area Network interface.
7. the unified platform system of Ethernet switch according to claim 1 and router is characterized in that, the described bus that connects described media interviews control chip and described Wide Area Network interface comprises any one or its combination in the following bus type:
Gigabit Ethernet bus and management data input/output bus.
8. the unified platform system of Ethernet switch according to claim 7 and router, it is characterized in that, described gigabit Ethernet bus is used for by the gigabit physical chip, be converted to the gigabit Media Independent Interface, for providing the system side data bus interface based on high speed Wide Area Network interface such as the packet exchange of synchronous digital hierarchy, asynchronous transfer modes, by 100,000,000 physical chips, be converted to Media Independent Interface, for slow wan interfaces such as E1/T1 provide the system side data bus interface.
9. the unified platform system of Ethernet switch according to claim 7 and router, it is characterized in that, described management data input/output bus is managed by described media interviews control chip, described central processing unit is visited register relevant with the management data input/output bus in the described media interviews control chip by the peripheral components interconnection, the control to all physical chips is finished in the operation of control and management data input/output bus.
10. according to the unified platform system of any described Ethernet switch and router in the claim 1 to 9, it is characterized in that, be reserved with various described buses in the described system.
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| CN 200310116721 CN1620047A (en) | 2003-11-18 | 2003-11-18 | Unified platform system of Ethernet exchanger and router |
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|---|---|---|---|
| CN 200310116721 CN1620047A (en) | 2003-11-18 | 2003-11-18 | Unified platform system of Ethernet exchanger and router |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100461734C (en) * | 2006-12-28 | 2009-02-11 | 杭州华三通信技术有限公司 | Communication device and implementation method with the LAN/WAN port switching function |
| CN101325551B (en) * | 2008-07-28 | 2010-09-22 | 杭州华三通信技术有限公司 | Method and device for processing message |
| CN1794673B (en) * | 2005-12-27 | 2011-11-30 | 王卫亚 | Method of constructing local network using IP protocol |
| CN102299811A (en) * | 2010-06-24 | 2011-12-28 | 创锐讯通讯技术（上海）有限公司 | Method for remotely managing user side equipment by using local side equipment |
| CN102771093A (en) * | 2010-02-22 | 2012-11-07 | 日本电气株式会社 | Communication control system, switching node, communication control method and communication control program |
| CN104283712A (en) * | 2014-10-13 | 2015-01-14 | 杭州华三通信技术有限公司 | Network equipment and management internet port configuration method for same |
| CN106301660A (en) * | 2016-07-30 | 2017-01-04 | 成都欧飞凌通讯技术有限公司 | The 40G POS association of a kind of high integration turns hardware and realizes structure |
| CN107959643A (en) * | 2017-12-29 | 2018-04-24 | 曙光信息产业(北京)有限公司 | A kind of exchange system and its routing algorithm built by exchange chip |
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2003
- 2003-11-18 CN CN 200310116721 patent/CN1620047A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1794673B (en) * | 2005-12-27 | 2011-11-30 | 王卫亚 | Method of constructing local network using IP protocol |
| CN100461734C (en) * | 2006-12-28 | 2009-02-11 | 杭州华三通信技术有限公司 | Communication device and implementation method with the LAN/WAN port switching function |
| CN101325551B (en) * | 2008-07-28 | 2010-09-22 | 杭州华三通信技术有限公司 | Method and device for processing message |
| CN102771093A (en) * | 2010-02-22 | 2012-11-07 | 日本电气株式会社 | Communication control system, switching node, communication control method and communication control program |
| CN102771093B (en) * | 2010-02-22 | 2014-12-10 | 日本电气株式会社 | Communication control system, switching node, and communication control method |
| US9047416B2 (en) | 2010-02-22 | 2015-06-02 | Nec Corporation | Communication control system, switching node, communication control method and communication control program including PCI express switch and LAN interface |
| CN102299811A (en) * | 2010-06-24 | 2011-12-28 | 创锐讯通讯技术（上海）有限公司 | Method for remotely managing user side equipment by using local side equipment |
| CN104283712A (en) * | 2014-10-13 | 2015-01-14 | 杭州华三通信技术有限公司 | Network equipment and management internet port configuration method for same |
| CN104283712B (en) * | 2014-10-13 | 2017-10-27 | 新华三技术有限公司 | The network equipment and the management network port collocation method for the network equipment |
| CN106301660A (en) * | 2016-07-30 | 2017-01-04 | 成都欧飞凌通讯技术有限公司 | The 40G POS association of a kind of high integration turns hardware and realizes structure |
| CN107959643A (en) * | 2017-12-29 | 2018-04-24 | 曙光信息产业(北京)有限公司 | A kind of exchange system and its routing algorithm built by exchange chip |
| CN107959643B (en) * | 2017-12-29 | 2021-05-14 | 曙光信息产业(北京)有限公司 | Switching system constructed by switching chip and routing algorithm thereof |
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