CN1604479A - Digital soft switch in D/A converter and using method thereof - Google Patents
Digital soft switch in D/A converter and using method thereof Download PDFInfo
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Abstract
It is a digit/ analogue digital soft switch and its method , which comprises the following steps: to switch user audio frequency data and maximum negative signal to the selector on the audio digit/analogue converter silicon chip; to send the output signal of selector to volume control unit; the volume control unit is in the charge of CSM and reflects signals to the CSM; CSM controls the volume control unit to control the switch of selector; the serial control port is to control the volume unit attenuation value speed and user volume; the volume control unit signal is output to the said aggravation/plug filter.
Description
(1) technical field
The present invention relates to be applicable to audio frequency digital-to-analogue conversion (DAC) field, refer in particular to digital soft switch and using method thereof in a kind of digital to analog converter.
(2) background technology
∑-Δ data conversion technique is a technology that is widely used in the digital-to-analogue conversion of high accuracy audio frequency.The audio digital to analog converter DAC that utilizes ∑-Δ data conversion technique is on a silicone tube chip 100 (referring to Fig. 1), mainly by forming: comprise chip status machine CSM10 with lower module, meet SDATA, SCLK, the audio frequency serial port 1 of LRCK pin, meet SDM1/SPI_CLK/SCL, SDM0/SPI_DIN/SDA, the Serial Control port one 2 of DEM0/SPI_CSn/ADR0 pin, two volume control units 2,6, two postemphasis/interpolation filter 3,7, two multidigit ∑-Δ adjuster DSM and dynamic element matching unit DEM4,8, meet output AOUTL, two output amplification low pass devices (using analog switch capacitance filter SCF in the present embodiment) 5 of AOUTR pin, 9, connect the switch 14 of PDNn pin, connect the null detector/noise reduction controller 13 of MUTE pin, connect the timer manager/sample rate detector 11 of CLKIN pin and the GND pin of VDD pin and ground connection.Wherein:
Chip status machine CSM10: the switching programme of controlling the normal and two kinds of mode switch of power saving of chip.
Audio frequency serial port 1: receive the serial audio signal of many forms from SDATA, SCLK, LRCK pin, receive serial data and be converted into parallel form from the SDATA pin.
Serial Control port one 2: various mode of operations are set from SDM1/SPI_CLK/SCL, SDM0/SPI_DIN/SDA, DEM0/SPI_CSn/ADR0 pin.
Volume control unit 2: the voice data of the enough a kind of controlled manner decay inputs of energy.
Postemphasis/interpolation filter 3,7 and multidigit ∑-Δ adjuster DSM and dynamic element matching unit DEM4,8: is the input data conversion of high-resolution (representative value is 16 to 24), low sample frequency (representative value is that 8KHz is to 200KHz) digital signal of low resolution (representative value is 1 to 6), high sample frequency (representative value is 32 to 128 times of incoming frequency).
Output amplification low pass device SCF5,9: the digital signal of above-mentioned low resolution, high sample frequency is converted into analog signal, from AOUTL, the output of AOUTR pin.
Referring to Fig. 2, Fig. 2 is the output schematic diagram of audio digital to analog converter DAC.
The analog signal of audio digital to analog converter DAC generally is to drive active or passive postfilter 15,17 from AOUTL, the output of AOUTR pin, is input to player 16,18 again.The common problem that present commercial DAC exists is that in the transfer process of normal and power saving work, DAC sends the noise of ticktock.So, in the transfer process of normal and power saving work, present commercial DAC be not uncontrollable be exactly to control bad analog output voltage.For these DAC devices, there is voltage jump at analog output, thereby has the input voltage saltus step at the input of player, cause in the transfer process of normal and power saving work, producing the noise that drips.
(3) summary of the invention
The objective of the invention is, propose a kind of new numerical control scheme, can be with digital soft switch and the using method thereof in a kind of digital to analog converter that solves the noise problem of audio digital to analog converter DAC in the transfer process of normal and battery saving mode work.
The object of the present invention is achieved like this:
Digital soft switch in a kind of digital to analog converter, described audio digital to analog converter DAC is the silicone tube chip, comprise: chip status machine CSM, the audio frequency serial port, the Serial Control port, two volume control units, two postemphasis/interpolation filter, two multidigit ∑-Δ adjuster DSM and dynamic element matching unit DEM, two output amplification low pass device SCF, connect the switch of PDNn pin, null detector/noise reduction controller is with, timer manager/sample rate detector, the switch of the wherein said PDNn of connecing pin is digital soft switch, and the soft switch of described numeral is to be provided with like this:
On the silicone tube chip of described audio digital to analog converter DAC, audio user data and maximum negative signal switching are input to a selector; The output signal of described selector is delivered to described two volume control units, carries out the 0-N db-loss; Described two volume control units both had been subjected to the control of described chip status machine CSM, again signal feedback were arrived chip status machine CSM; The signal that described chip status machine CSM utilizes the feedback signal of two volume control units to go to control described selector switches; Described two volume unit attenuation value speed of described Serial Control port controlling and user's volume; The signal of described two volume control units output to corresponding described two postemphasis/interpolation filter, multidigit ∑-Δ adjuster is with the dynamic element matching unit and export the amplification low pass device.
A kind of using method as the digital soft switch in the above-mentioned digital to analog converter, the using method of the soft switch of described numeral are meant the using method in the normal of digital to analog converter DAC and the conversion of the battery saving mode course of work, it is characterized in that:
(1) the use sequential in the conversion is as follows from the power saving to the course of normal operation:
Step 1, chip status machine CSM receive the signal of telecommunication of operate as normal, and for example, the PDNn pin that connects digital soft switch is set to high level;
Step 2, chip status machine CSM select maximum negative signal, are input to volume control unit, and forcing the analog output voltage of output amplification low pass device is earth potential 0V;
The pad value that step 3, CSM set volume control is the N decibel;
Step 5, volume control unit send and feed back signal to chip status machine CSM, show that pad value has reached the N decibel, and at this moment, described analog output voltage is gradual to the common-mode voltage value;
Step 6, chip status machine CSM select user's voice data, deliver to volume control end, and set the volume that volume is controlled to be user's setting;
Step 7, the gradual volume of setting to the user of volume control receive the audio user data, control this gradual speed by the Serial Control port;
(2) the use sequential from normally change to the power saving course of work is as follows:
Step 1, chip status machine CSM receive the power saving working signal, for example, connect digital soft switch P DNn pin and are set to low level;
Step 2, chip status machine CSM control volume control unit, record last user voice data, and in the power saving work schedule, keep this value;
The pad value that step 3, chip status machine CSM set volume control unit is the N decibel.
Step 5, volume control unit send and feed back signal to chip status machine CSM, show that pad value has reached the N decibel, and at this moment, analog output voltage changes to the common-mode voltage value;
Step 6, chip status machine CSM select maximum negative signal to send into volume control unit, and the pad value of setting volume control unit is 0dB;
Step 7, volume control pad value is gradual to 0 decibel from the N decibel, controls this gradual speed by the Serial Control port;
Step 9, chip status machine CSM finish the conversion timing sequence from normal to the power saving course of work, keep power down mode, receive the operate as normal power supply signal up to next time.
Effect of the present invention:
Digital soft switch and using method thereof in the digital to analog converter of the present invention, the problem that there is voltage jump in audio digital to analog converter DAC analog output can be solved, thereby the noise problem of audio digital to analog converter DAC in the conversion of normal and the battery saving mode course of work can be solved.
For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Fig. 1 is the structural representation of audio digital to analog converter DAC product;
Fig. 2 is the output schematic diagram of the audio digital to analog converter DAC of one 16 pin SOIC pulse code modulation;
Fig. 3 is provided with calcspar for structure of the present invention.
(5) embodiment
Below in conjunction with accompanying drawing the digital soft switch in the digital to analog converter of the present invention and the execution mode of using method thereof are elaborated.
The new numerical control scheme of the digital soft switch of a kind of usefulness can solve the noise problem in the transfer process of the normal and battery saving mode work of DAC.
A kind of audio digital to analog converter DAC is a silicone tube chip 100, comprise: chip status machine CSM10, audio frequency serial port 1, Serial Control port one 2, two volume control units 2,6, two postemphasis/3,7, two multidigit ∑-Δ adjuster DSM of interpolation filter and dynamic element matching unit DEM4,8, two output amplification low pass device SCF5,9, connect the switch 14 of PDNn pin, null detector/noise reduction controller 11, timer manager/sample rate detector 11, wherein:
The described switch 14 that connects the PDNn pin is digital soft switch.
Referring to Fig. 3, the soft switch 14 of described numeral is to be provided with like this:
On the silicone tube chip 100 of described audio digital to analog converter DAC, audio user data and maximum negative signal switching are input to a selector 19; The output signal of described selector 19 is delivered to described two volume control units 2,6, carries out the 0-N db-loss, and wherein N is the arbitrary numerical value between the 20-1000, and N is made as 96 in the present embodiment; Described volume control unit 2,6 both had been subjected to the control of described chip status machine CSM10, again signal feedback was arrived chip status machine CSM10; The signal that described chip status machine CSM10 utilizes the feedback signal of volume control unit 2,6 to go to control described selector 19 switches; The gradual speed of pad value and user's volume of the described volume control unit 2,6 of described Serial Control port one 2 controls; The signal of described volume control unit 2,6 outputs to described two respectively and postemphasises/3,7, two multidigit ∑-Δ adjusters of interpolation filter and 4,8 and two output of dynamic element matching unit amplification low pass device, 5,9 (present embodiment analog switch capacitance filters).Owing to shown the mechanism map that each parts on the silicone tube chip 100 of audio digital to analog converter DAC link among Fig. 1, so two volume control units 2,6 in Fig. 3,4,8 and two output of two multidigit ∑-Δ adjusters 3,7 and dynamic element matching unit amplification low pass device 5,9 is used a volume control unit respectively, and multidigit ∑-Δ adjuster and dynamic element matching unit and one export the amplification low pass device and represents.
Describe the course of work of digital soft switch below in detail.
In power saving in the conversion of course of normal operation, the negative digital signal drive volume control unit 2,6 of a maximum, the initial setting up of volume control unit 2,6 is 0dB decay, so this big reverse digital signal can drive simulation output and reaches earth potential (0 volt).Then, chip status machine CSM10 control volume control unit adds high attenuation gradually, approaches 0 until its output signal, drives analog output voltage and reaches common-mode voltage value (representative value is half of input supply voltage).In case simulation output reaches the common mode operating voltage, the input that the feedback signal of volume control unit 2,6 makes chip status machine CSM10 go to control volume control unit 2,6 switches to audio frequency serial port 1, receives user's voice data.Simultaneously, volume control unit 2,6 reduces decay gradually up to user's set point.
In the conversion of the power saving course of work, at first, the input of volume control unit 2,6 is set to audio frequency serial port 1 output valve last time, increases gradually to maximum attenuation from user's set point then normal.In this process, simulation output will smoothedly be driven into common-mode voltage.When simulation output reaches the common mode value, the input that the feedback signal of volume control unit 2,6 makes chip status machine CSM10 go to control volume control unit 2,6 switches to a big negative digital signal, at this moment, because volume control unit 2,6 has big decay, simulation output still is operated in the common mode mode.Then, volume control unit 2,6 reduces decay gradually until 0 decibel (0dB).The output digital signal of so just forcing volume control unit 2,6 is near 0 gradual to a very large anti-phase digital signal, thereby drives simulation output and change to earth potential from the common mode output voltage.When this state is maintained to next time operate as normal, simulation output again from ground level level and smooth change to the common-mode voltage value.
Use sequential in the conversion of the present invention from the power saving to the course of normal operation is as follows:
Step 1, chip status machine CSM10 receive the operate as normal signal of telecommunication, and for example, the PDNn pin that connects digital soft switch 14 is set to high level.
Step 2, chip status machine CSM10 select maximum negative signal, are input to volume control unit 2,6, and forcing the analog output voltage of output amplification low pass device (analog switch capacitance filter) 5,9 is earth potential (0V).
The pad value that step 3, CSM10 set volume control is N decibel (N is 20-1000), and as mentioned above, N is made as 96 in the present embodiment.
Step 5, volume control unit 2,6 send and feed back signal to chip status machine CSM10, show that pad value has reached 96 decibels, and at this moment, described analog output voltage is gradual to the common-mode voltage value.
Step 6, chip status machine CSM10 select user's voice data, deliver to volume control unit 2,6, and set the volume that volume is controlled to be user's setting.
The gradual volume of setting to the user of step 7, volume control receives the audio user data, and the user can control pace of change by the Serial Control port, and typical gradual speed is per 0.5 decibel and imports from serial port.
The present invention is as follows from normal use sequential to the conversion of the power saving course of work:
Step 1, chip status machine CSM10 receive the power saving working signal, and for example, the PDNn pin that connects digital soft switch 14 is set to low level.
Step 2, chip status machine CSM10 control volume control unit 2,6, record last user voice data, and in the power saving work schedule, keep this value.
Step 3, chip status machine CSM10 set the pad value N (N is 20-1000) of volume control unit 2,6, and present embodiment N is 96dB.
Step 5, volume control unit 2,6 send and feed back signal to chip status machine CSM10, show that pad value has reached 96 decibels, and at this moment, analog output voltage changes to the common-mode voltage value.
Step 6, chip status machine CSM10 select maximum negative signal to send into volume control unit 2,6, and the pad value of setting volume control unit 2,6 is 0 decibel.
Step 7, volume control pad value is gradual to 0 decibel from 96 decibels.The user can control gradual speed by Serial Control port one 2, and typical gradual speed is per 0.5 decibel and imports from serial port.
Step 9, chip status machine CSM10 finish the conversion timing sequence from normal to the power saving course of work, keep power down mode, receive the operate as normal power supply signal up to next time.
Those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, and be not to be used as limitation of the invention, as long as in connotation scope of the present invention, all will drop in the scope of claims of the present invention variation, the modification of the above embodiment.
Claims (5)
1, digital soft switch in a kind of digital to analog converter, described audio digital to analog converter DAC is the silicone tube chip, comprise: chip status machine CSM, the audio frequency serial port, the Serial Control port, two volume control units, two postemphasis/interpolation filter, two multidigit ∑-Δ adjuster DSM and dynamic element matching unit DEM, two output amplification low pass device SCF, connect the switch of PDNn pin, null detector/noise reduction controller, timer manager/sample rate detector, the switch that it is characterized in that the described PDNn of connecing pin is digital soft switch, and the soft switch of described numeral is to be provided with like this:
On the silicone tube chip of described audio digital to analog converter DAC, audio user data and maximum negative signal switching are input to a selector;
The output signal of described selector is delivered to described two volume control units, carries out the 0-N db-loss;
Described two volume control units both had been subjected to the control of described chip status machine CSM, again signal feedback were arrived chip status machine CSM;
The signal that described chip status machine CSM utilizes the feedback signal of two volume control units to go to control described selector switches;
Described two volume unit attenuation value speed of described Serial Control port controlling and user's volume;
The signal of described two volume control units output to respectively corresponding described two postemphasis/interpolation filter, multidigit ∑-Δ adjuster is with the dynamic element matching unit and export the amplification low pass device.
2, the digital soft switch in the digital to analog converter as claimed in claim 1 is characterized in that described volume control unit carries out the 0-N db-loss to signal, and N wherein is meant the numerical value of 20-1000.
3, the using method of the digital soft switch in a kind of digital to analog converter as claimed in claim 1, the using method of the soft switch of described numeral are the usings method in the normal of digital to analog converter DAC and the conversion of the battery saving mode course of work, it is characterized in that:
(1) the use sequential in the conversion is as follows from the power saving to the course of normal operation:
Step 1, chip status machine CSM receive the signal of telecommunication of operate as normal, and for example, the PDNn pin that connects digital soft switch is set to high level;
Step 2, chip status machine CSM select maximum negative signal, are input to volume control unit, and forcing the analog output voltage of output amplification low pass device is earth potential 0V;
The pad value that step 3, CSM set volume control is the N decibel;
Step 4, volume control unit pad value from 0 decibel gradual to the N decibel, control this gradual speed by the Serial Control port;
Step 5, volume control unit send and feed back signal to chip status machine CSM, show that pad value has reached the N decibel, and at this moment, described analog output voltage is gradual to the common-mode voltage value;
Step 6, chip status machine CSM select user's voice data, deliver to volume control end, and set the volume that volume is controlled to be user's setting;
Step 7, the gradual volume of setting to the user of volume control receive the audio user data, control this gradual speed by the Serial Control port;
Step 8, the conversion timing sequence from the power saving to the course of normal operation finish;
(2) the use sequential from normally change to the power saving course of work is as follows:
Step 1, chip status machine CSM receive the power saving working signal, for example, connect digital soft switch P DNn pin and are set to low level;
Step 2, chip status machine CSM control volume control unit, record last user voice data, and in the power saving work schedule, keep this value;
The pad value that step 3, chip status machine CSM set volume control unit is the N decibel.
Step 4, volume control unit pad value are set gradual to the N decibel from the user, control this gradual speed by the Serial Control port;
Step 5, volume control unit send and feed back signal to chip status machine CSM, show that pad value has reached the N decibel, and at this moment, analog output voltage changes to the common-mode voltage value;
Step 6, chip status machine CSM select maximum negative signal to send into volume control unit, and the pad value of setting volume control unit is the N decibel;
Step 7, volume control pad value is gradual to 0 decibel from the N decibel, controls this gradual speed by the Serial Control port;
Step 8, volume control unit send and feed back signal to chip status machine CSM, show that pad value has reached 0 decibel, and at this moment, analog output voltage changes to earth potential 0V, is the beginning voltage of next operate as normal;
Step 9, chip status machine CSM finish the conversion timing sequence from normal to the power saving course of work, keep power down mode, receive the operate as normal power supply signal up to next time.
4, the using method of the digital soft switch in the digital to analog converter as claimed in claim 3, the pad value that it is characterized in that described volume control unit are to control the gradual rate of decay by the Serial Control port to decide.
5, the using method of the digital soft switch in the digital to analog converter as claimed in claim 3, it is characterized in that described volume control unit pad value from 0 decibel gradual to the N decibel, N wherein is meant the numerical value of 20-1000.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031514383A CN100401638C (en) | 2003-09-29 | 2003-09-29 | Digital soft switch in D/A converter and using method thereof |
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| CNB031514383A CN100401638C (en) | 2003-09-29 | 2003-09-29 | Digital soft switch in D/A converter and using method thereof |
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| CN1604479A true CN1604479A (en) | 2005-04-06 |
| CN100401638C CN100401638C (en) | 2008-07-09 |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101399546B (en) * | 2007-09-26 | 2010-11-10 | 中芯国际集成电路制造(上海)有限公司 | D/A conversion unit and circuit |
| CN101379709B (en) * | 2006-07-19 | 2011-10-12 | 高通股份有限公司 | Sigma-delta modulation with offset |
| CN102263557A (en) * | 2010-05-31 | 2011-11-30 | 安凯(广州)微电子技术有限公司 | Delta modulation type converter and method for eliminating crackle noise thereof |
| CN102545905A (en) * | 2011-12-27 | 2012-07-04 | 华为技术有限公司 | Digital to analog converter (DAC) |
| CN101563847B (en) * | 2006-12-19 | 2012-09-19 | 艾利森电话股份有限公司 | Fast, high resolution digital-to-analog converter |
| CN105847960A (en) * | 2016-03-29 | 2016-08-10 | 乐视控股（北京）有限公司 | Method and device for reducing quantization distortion of output audio |
| CN106452398A (en) * | 2016-10-14 | 2017-02-22 | 上海旻艾信息科技有限公司 | Hub module |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6087969A (en) * | 1998-04-27 | 2000-07-11 | Motorola, Inc. | Sigma-delta modulator and method for digitizing a signal |
| US6052076A (en) * | 1998-10-14 | 2000-04-18 | Western Digital Corporation | Digital-to-analog converter having high resolution and high bandwidth |
| FR2787280B1 (en) * | 1998-12-14 | 2001-01-05 | Cit Alcatel | DIGITAL-ANALOGUE CONVERSION ELECTRONIC CIRCUIT FOR A BASE BAND TRANSMISSION CHAIN |
| US6642879B2 (en) * | 2001-07-16 | 2003-11-04 | Cirrus Logic, Inc. | Method and system for powering down an analog-to-digital converter into a sleep mode |
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2003
- 2003-09-29 CN CNB031514383A patent/CN100401638C/en not_active Expired - Lifetime
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101379709B (en) * | 2006-07-19 | 2011-10-12 | 高通股份有限公司 | Sigma-delta modulation with offset |
| CN101563847B (en) * | 2006-12-19 | 2012-09-19 | 艾利森电话股份有限公司 | Fast, high resolution digital-to-analog converter |
| CN101399546B (en) * | 2007-09-26 | 2010-11-10 | 中芯国际集成电路制造(上海)有限公司 | D/A conversion unit and circuit |
| CN102263557A (en) * | 2010-05-31 | 2011-11-30 | 安凯(广州)微电子技术有限公司 | Delta modulation type converter and method for eliminating crackle noise thereof |
| CN102263557B (en) * | 2010-05-31 | 2014-08-20 | 安凯(广州)微电子技术有限公司 | Delta modulation type converter and method for eliminating crackle noise thereof |
| CN102545905A (en) * | 2011-12-27 | 2012-07-04 | 华为技术有限公司 | Digital to analog converter (DAC) |
| CN102545905B (en) * | 2011-12-27 | 2015-05-06 | 华为技术有限公司 | Digital to analog converter (DAC) |
| CN105847960A (en) * | 2016-03-29 | 2016-08-10 | 乐视控股（北京）有限公司 | Method and device for reducing quantization distortion of output audio |
| CN106452398A (en) * | 2016-10-14 | 2017-02-22 | 上海旻艾信息科技有限公司 | Hub module |
| CN106452398B (en) * | 2016-10-14 | 2023-05-23 | 上海旻艾半导体有限公司 | HUB module |
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| CN100401638C (en) | 2008-07-09 |
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