CN1601922A - Method of increasing key quantity of frequency hopping equipment and shortening establishment time of frequency hopping - Google Patents

Abstract

The method of increasing the key quantity of the frequency hopping system and shortening the establishment time of the frequency hopping is as follows: a. First, determine the lower limit of the phase detection frequency according to the actual requirements of the equipment; b. Randomly select n phase detection frequencies by the embedded microprocessor, and the embedded microprocessor The device controls the frequency hopping pattern generator to produce a pseudo-random frequency hopping pattern; c. design an equal interval frequency hopping permutation table for each phase detection frequency, and then combine n equal interval frequency hopping permutation tables into a non-equal interval permutation table, Form all available carrier frequency tables; d. Extract a group of frequencies from all available carrier frequency tables, and compare them with the lower limit of the phase detection frequency, thereby generating the currently selected carrier frequency table; e. From the pseudo-random frequency hopping pattern The generator and the currently selected carrier frequency table jointly determine to generate a pseudo-random non-equally spaced frequency hopping sequence table, and the embedded microprocessor selects the appropriate frequency synthesizer control parameters according to the content of the currently selected carrier frequency table; f. Control the frequency conversion reference source phase lock The program frequency division ratio N and the reference division ratio R _o of the ring frequency synthesizer; g. Finally, the frequency synthesizer outputs a pseudo-random non-equally spaced frequency hopping signal that meets the requirements.

Description

Method of increasing key quantity of frequency hopping equipment and shortening establishment time of frequency hopping

Technical field

The present invention is a new method for realizing frequency hopping at non-equal intervals on communication equipment, which can improve the confidentiality of frequency hopping equipment, shorten the establishment time of frequency hopping, thereby increasing the frequency hopping rate or information transmission rate, and belongs to wireless communication technical field.

Background technique

Frequency hopping spread spectrum communication has the characteristics of confidentiality, good anti-interception performance, strong anti-interference ability, high spectrum utilization rate and relatively simple equipment, etc., and it has shown great advantages in both military and commercial fields. With the opening of ISM (industrial, scientific, medical) frequency bands in various countries, frequency hopping technology has been used more and more, and it is used as the core technology in Bluetooth, IEEE802.11, IEEE802.15, HomeRF and other systems.

Among the many performances of frequency hopping equipment, people are most concerned about its confidentiality and information transmission rate, and the two are closely related in frequency hopping systems. The confidentiality of frequency hopping equipment is measured by the amount of keys available in the system, and the amount of keys is proportional to the number of hopping carrier frequencies available in the system. The larger the key amount, the higher the confidentiality. The information transmission rate of the frequency hopping device is related to the frequency hopping rate of the system. The higher the frequency hopping rate, the greater the information transmission rate.

Usually, in order to adapt to high-speed data transmission and improve the security of the system, the frequency hopping system is required to have a higher frequency hopping rate and a shorter stable frequency establishment time. The frequency hopping rate mainly depends on the selection of the frequency synthesizer in the frequency hopping system, which is a key issue in system design. In order to reduce the cost of equipment, the most common way to implement frequency hopping is to use a phase-locked loop frequency synthesizer, and the bottleneck that restricts the improvement of the information transmission rate is mainly the establishment time of the frequency synthesizer. The situation that the setting time of the frequency synthesizer takes a large proportion is acceptable in many applications, but it is far from meeting the requirements in some high-security and broadband high-speed applications. For example, if a system requires that the RF bandwidth of the spread spectrum should reach 1000MHz, if a conventional frequency hopping system is used to implement it, assuming that the frequency hopping frequency interval is 25kHz, the number of frequency hopping frequencies output by the frequency synthesizer is required to be 40,000. It is undoubtedly extremely difficult technically to make a frequency hopper with a frequency hopping bandwidth of 1000MHz and 40,000 output frequencies. Aiming at this bottleneck, some literatures have proposed corresponding countermeasures at present, such as adopting direct sequence spread spectrum and frequency hopping mixed spread spectrum scheme to reduce the technical difficulty of each component. This method not only greatly increases the complexity of the equipment, but also the coexistence of two spread spectrum technologies in the same equipment is inappropriate in many applications. Another commonly used solution is to use a high-performance direct digital frequency synthesizer. Although this method can improve the frequency conversion time of the frequency hopping device and increase the frequency resolution, this method often brings large spurious Noise, and usually will greatly increase the cost of equipment, in some applications that require low cost, such as information appliances, embedded products, etc., the disadvantages of this method are even more obvious.

Therefore, how to overcome the contradiction between the available frequency hopping carrier frequency and the frequency conversion time of the traditional frequency hopping equipment. In the limited frequency bandwidth, inserting as many frequency hopping points as possible while still maintaining a short frequency conversion setup time is the key to improving the key volume and data transmission rate of the entire frequency hopping system.

Contents of Invention

Technical problem: the purpose of this invention is to provide a kind of method that increases the key quantity of frequency hopping system and shortens the method of frequency hopping establishment time, to improve the absolute key quantity of frequency hopping system and shorten the establishment time of phase-locked loop frequency synthesizer , thereby improving the security, confidentiality and information transmission rate of the frequency hopping system.

Technical solution: the present invention designs a new frequency hopping method, adding an optional carrier frequency table and a currently selected carrier frequency table in the frequency hopping equipment, and adopts a non-equal interval frequency hopping method to increase in a dynamic and partial manner The optional frequency hopping points can fundamentally solve the problem that the absolute key amount is too low when the communication frequency bandwidth is limited. It can locally increase the density of frequency hopping points within a limited frequency bandwidth without affecting the data transmission rate of communication, so as to increase the key amount of the frequency hopping system, and increase the frequency hopping rate at the same time, thereby improving the frequency hopping system. confidentiality. At the same time, compared with the traditional method, the present invention does not make major changes to the hardware, but mainly uses software to improve the performance of the equipment, greatly reducing the cost, and is especially suitable for occasions that are sensitive to equipment costs such as information appliances.

Implementation method of the present invention is:

a. First, determine the lower limit of the phase detection frequency according to the actual requirements of the equipment;

b. The embedded microprocessor randomly selects n phase detection frequencies, and these phase detection frequencies can take larger values, and are all greater than the lower limit of the phase detection frequency, so as to ensure a short frequency jump establishment time. The task of realizing a smaller frequency interval under the condition of a higher phase detection frequency is completed by subsequent steps to ensure an increase in the number of available frequency hopping, thereby increasing the key amount. At the same time, the embedded microprocessor controls the frequency hopping pattern generator to generate a pseudo-random frequency hopping pattern;

c, design equal interval frequency hopping permutation table for each phase detection frequency, as shown in Figure 4, then rearrange n equal interval frequency hopping permutation tables, be combined into a non-equal interval permutation table, and form all optional loads The frequency table is shown in Figure 5. From this table, it can be seen that the frequency points are distributed at non-equal intervals, and the frequency interval is small, and the available frequency points are greatly increased:

d. Extract a group of frequencies from all available carrier frequency tables, and compare them with the lower limit of the phase detection frequency to ensure that the phase detection frequency corresponding to each frequency value is greater than the lower limit, thus generating the currently selected carrier frequency table:

e. When the comparison result of the above step "d" satisfies that "the phase detection frequency corresponding to each frequency value is greater than the lower limit value", the pseudo-random frequency hopping pattern generator and the currently selected carrier frequency table are jointly determined to generate a pseudo-random Equally spaced frequency hopping sequence table, the frequency arrangement of this table is random and has no rules to follow, thus improving the confidentiality of the equipment; the embedded microprocessor selects the appropriate frequency synthesizer control parameters according to the content of the currently selected carrier frequency table; Otherwise, return to step "d", and re-extract a group of frequencies from all available carrier frequency tables, and compare it with the lower limit of the phase detection frequency:

f. The embedded microprocessor selects the appropriate frequency synthesizer control parameters according to the content of the currently selected carrier frequency table, and jointly controls the program frequency division ratio of the frequency conversion reference source phase-locked loop frequency synthesizer with the frequency hopping sequence list generated in "e" N and the reference score R;

g. Finally, the frequency synthesizer outputs a pseudo-random non-equally spaced frequency hopping signal that meets the requirements.

The specific frequency hopping method is as follows: In Figure 2, the frequency conversion reference source phase-locked loop frequency synthesizer synthesizes and outputs the required system carrier frequency according to the best selected carrier frequency value provided by the currently selected carrier frequency table; the currently selected carrier frequency table The content in is the local optimal carrier frequency table selected by the embedded microprocessor according to the content of the optional carrier frequency table through a specific non-equal interval algorithm, and sent to the frequency hopping pattern generator to convert the frequency hopping pattern Mapped into the currently selected carrier frequency table; the optional carrier frequency table stores all the frequency values that can be generated by the frequency conversion reference source phase-locked loop frequency synthesizer in the given frequency band of the system. According to the actual needs of the frequency hopping system, the embedded micro-processing The generator can extract a set of frequency values from the frequency table and store them in the currently selected frequency table for mapping and selection by the frequency hopping pattern generator. The embedded microprocessor sends the frequency value selected by the frequency hopping pattern generator in the currently selected frequency table (the current carrier frequency value of the frequency hopping system) to the frequency conversion reference source phase-locked loop frequency synthesizer to generate the carrier frequency of the corresponding frequency output signal.

Frequency conversion reference source PLL frequency synthesizer as shown in Figure 3, the output frequency of voltage controlled oscillator 55 wherein can be expressed as:

f _OUT ＝N×f _PD ＝N×(f _REF /R)

In the formula, f _PD is the phase detection frequency of the phase detector 53, and f _REF is the reference frequency output by the variable frequency reference source 51, and N and R are respectively the frequency division ratios of the program frequency divider 56 and the reference frequency divider 52, both is an integer and is set by the embedded microprocessor 4.

For the traditional frequency hopping system with equal intervals, the reference frequency f _REF and the reference frequency division ratio R are usually fixed, and with the increase of the program frequency division ratio N, the output frequency just takes the phase detection frequency f _PD as the step, etc. If the interval is increasing, the interval f _span between adjacent carrier frequencies is exactly equal to the phase detection frequency f _PD , that is, f _span =f _PD .

The frequency hopping method proposed by the present invention breaks this rule, not only adopts the variable reference source frequency f _REF , but also changes the reference frequency division ratio R and the program frequency division ratio N at the same time, so that the positions of the output frequency points are no longer Evenly distributed, but non-equally spaced, and the interval f _span between adjacent carrier frequencies is no longer equal to the phase detection frequency f _PD , but can be much smaller than the phase detection frequency f _PD .

When the reference source frequency f _REF and the reference frequency division ratio R change, the phase detection frequency will change accordingly, and for each phase detection frequency f _PD , there will be a group of equally spaced output frequency f _OUT and the corresponding program division The frequency ratio N corresponds to it. The j-th N of the i-th phase detection frequency f _PDi and the j-th output frequency f _OUT can be expressed as: f _OUTij =N _ij ×f _PDi . Fig. 4 has provided phase detection frequency respectively when being _fPD1 , _fPD2 ... _fPDi situation, the position distribution diagram of corresponding output frequency point, all frequency points in the figure then constitute a total set of carrier frequency of the present invention{ _fc }.

For a given working frequency band [f _L , f _H ], all carrier frequencies in the total set of carrier frequencies {f _c } that fall within this frequency band together form a new set {f _c1 , f _c2 ,..., f _{c, j-1} , f _{c, j} , f _{c, j+1} , ..., f _{c, N-1} , f _{c, N} }, all of their frequency values together form the optional carrier frequency table 1 in Fig. 1 of the present invention , its position arrangement on the frequency axis is listed in Figure 5, it can be seen that the intervals between adjacent carrier frequencies are non-equal, and the interval f _span between any two adjacent frequencies is smaller than any phase detection frequency f _PDi , so the frequency hopping method of the present invention can increase the phase detection frequency while ensuring a low frequency interval, which can effectively shorten the settling time of the phase-locked loop frequency synthesizer.

Usually, in order to ensure the spectral purity of the output carrier frequency _f , the degree of suppression of the low-pass filter 54 in Fig. 3 to the phase detection frequency _f must be improved, so the passband of the low-pass filter 54 will be much lower than the phase detection frequency f _PD . But the passband of low-pass filter 54 is smaller, and the capture time in the phase-locked loop frequency locking process is longer, and the corresponding phase-locked loop frequency synthesizer build-up time is longer, thereby hinders the raising of system frequency hopping rate, reduces Interference performance of the entire frequency hopping system.

For this reason, the embedded microprocessor 4 can according to the actual requirement of the frequency hopping system on the phase lock establishment time. Determine the lower limit f _PDmin of the phase detection frequency, and then extract a set of frequency values from the available carrier frequency table 1 in Figure 5, and ensure that the phase detection frequency corresponding to each frequency value is greater than f _PDmin , and finally set it to Stored in the currently selected frequency table 2 for mapping and selection by the frequency hopping pattern generator 3, so as to ensure the improvement of the frequency hopping rate of the system.

In addition, in order to measure the secrecy performance of the frequency hopping method, the present invention proposes a method for measuring the absolute key quantity, assuming that the number of carrier frequencies that can be used in the frequency hopping system is N, it is said to determine its carrier frequency set {f ₁ , f ₂ ,... , f _i-1 , f _i , f _i+1 ,..., f _N-1 , f _N } The amount of information required by all elements is the absolute key amount of the frequency hopping system, represented by E _a .

For an equal interval frequency hopping system, if the interceptor wants to obtain the absolute key quantity of the system, he only needs to know the total number of carrier frequencies N and the frequency interval between any two adjacent carrier frequencies. The absolute key quantity is :

E _a1 ＝2log ₂ N(bit)

And for the non-equal interval frequency hopping of the present invention, if the interceptor wants to obtain the absolute key quantity of this system, he must know all carrier frequencies, that is, all elements of the carrier frequency set, and its absolute key quantity is:

E _a2 =Nlog ₂ N(bit)

It can be seen that the frequency hopping method of the present invention greatly increases the absolute key quantity of the frequency hopping system. For the same total number of carrier frequencies N, the absolute key quantity of the non-equally spaced frequency hopping system of the present invention will be far greater than that of the equal spaced case. Since the elements of the equal interval frequency hopping carrier set are discretely distributed at equal intervals on the frequency axis, and the elements of the non-equal interval frequency hopping carrier set of the present invention are close to continuous distribution on the frequency axis, so in practical applications The absolute key volume of the China-Africa equal interval frequency hopping system will be larger.

The function of the frequency hopping pattern generator 3 is mainly to generate a pseudo-random sequence, and select a frequency in the currently selected frequency table 2 according to the pseudo-random sequence, and strive to make the hopping of the carrier frequency of the entire system irregular and searchable, so as to ensure the confidentiality of the system sex.

In order to measure the secrecy performance of frequency hopping, and corresponding to the method for measuring the absolute key quantity, the present invention proposes a measure method for the relative key quantity again: assuming that the number of all available carrier frequencies of the frequency hopping system is the available carrier frequency in the present invention The number of frequencies in frequency table 1 is N, and the number of carrier frequencies in frequency table 2 used in actual communication is K. It is said that the amount of information required to determine the hopping rules of K carrier frequencies is the frequency hopping system The relative key amount is represented by E _r . Since the frequency hopping pattern only depends on the generation method of the pseudo-random code, the frequency hopping between equal intervals and non-equal intervals has no direct impact on the relative key quantity.

For binary, assuming that i-bit is used to determine the frequency hopping pattern, according to definition 2, the relative key amount is:

E _r ＝2 ⁱ log ₂ 2 ⁱ ＝i-2 ⁱ (bit)

It can be seen that the relative key quantity of the frequency hopping system is far greater than its absolute key quantity. Only when both the absolute key amount and the relative key amount are large enough, the frequency hopping system can be said to be safe and confidential. Although the present invention does not directly affect the relative key quantity, it ensures a higher relative key quantity while increasing the absolute key quantity, thereby ensuring the safety and confidentiality of the frequency hopping system.

Beneficial effects: the frequency hopping method proposed by the present invention greatly improves the security performance of the frequency hopping system, and its absolute key quantity is far greater than that of the equal interval frequency hopping system. In addition, the smaller the minimum frequency interval of the frequency hopping system, the higher the absolute key amount of the frequency hopping method.

The present invention has the following advantages:

1. The program frequency division ratio N does not need to be changed in a large range to meet the requirements of the output frequency range of the frequency synthesizer, which not only reduces the design difficulty of the low-pass filter in the phase-locked loop, but also improves the output to a certain extent Frequency phase noise. The reason for the performance improvement is that the non-equal interval algorithm is used, and the embedded processor finds the locally optimal program frequency division ratio N and the reference frequency division ratio R value through a pre-optimized algorithm. The relationship between the N and R values of the present invention and the traditional method as a function of system output carrier frequency is shown in FIG. 5 . Apparently, the present invention greatly reduces the variation range of the N value.

2. The confidentiality performance of the frequency hopping system is improved, and its absolute key volume is far greater than that of the equal interval frequency hopping system. In addition, the smaller the minimum frequency interval of the frequency hopping system, the higher the absolute key amount of the frequency hopping method.

3. It can effectively solve the contradiction between reducing the frequency step of the frequency hopping system and increasing the frequency hopping rate when the frequency band is limited in the traditional equal interval frequency hopping system. While ensuring the fine frequency step of the frequency hopping point, it not only does not reduce the , On the contrary, it also increases the frequency hopping rate and improves the anti-jamming performance of the system.

Description of drawings

Fig. 1 is a block diagram of a method for increasing the absolute key quantity of a frequency hopping system and shortening the establishment time of frequency hopping.

Fig. 2 is a block diagram of a frequency hopping method for increasing the absolute key quantity of the frequency hopping system and shortening the establishment time of frequency hopping. Among them, there are optional carrier frequency table 1, currently available carrier frequency table 2, frequency hopping pattern generator 3, embedded microprocessor 4 and frequency conversion reference source phase-locked loop frequency synthesizer.

Fig. 3 is the block diagram of frequency conversion reference source PLL frequency synthesizer. Among them are a variable frequency reference source 51, a reference frequency divider (÷R) 51, a phase detector 53, a low-pass filter 54, a voltage-controlled oscillator 55 and a program frequency divider 56 (÷N).

Fig. 4 is a position distribution map of frequency hopping points at equal intervals for i different phase detection frequencies.

FIG. 5 shows the non-equally spaced arrangement relationship of all carrier frequency positions in Table 1 of available carrier frequencies.

Figure 6 shows the relationship between the N and R values and the output frequency when compared with the traditional method.

Fig. 7 is a specific implementation diagram of the frequency hopping method for increasing the absolute key amount of the frequency hopping system and shortening the establishment time of frequency hopping.

FIG. 8 is an implementation method for generating an optional carrier frequency table 1 .

Detailed ways

An optional carrier frequency table and a currently selected carrier frequency table are added to the traditional equipment, and the processor selects the appropriate carrier frequency value according to the non-equal interval algorithm for the frequency synthesizer to generate the frequency signal required by the system.

The specific implementation of the block diagram 2 of the frequency hopping method corresponding to increasing the absolute key amount of the frequency hopping system and shortening the establishment time of frequency hopping is shown in FIG. 7 . The embedded microprocessor adopts Winbond W90210; the frequency hopping pattern generator is realized by AD9854 chip and TMS320VC54022; the phase-locked loop frequency synthesizer is composed of core chip Q3236, low-pass filter OP37 and so on.

The emphasis of the frequency hopping method of the present invention is to improve the absolute key amount of the frequency hopping system and shorten the phase-locked loop frequency synthesizer set-up time, so the key technical difficulty of its realization is how to generate the optional carrier frequency table 1, the present invention is in Here is an implementation method thereof, and its algorithm flow is shown in FIG. 8 .

Let Δf be the greatest common divisor of all elements in the set of intervals between adjacent frequencies in Table 1 that can be selected as carrier frequencies in Figure 4, namely:

Δf=GCD {f _span1 , f _span2 , ..., f _{span, j-1} , f _{span, j} , f _{span, j+1} , ..., f _{span, N-1} , f _{span, N} , f _{span, N+ 1} }

Among them: f _span1 = f _c1 -f _L , f _span2 = f _c2 -f _c1 ,..., f _{span, j} = f _c, j - f _{c, j-1} , ..., f _{span, N} = f _{c, N} -f _c,N-1 , f _span,N+1 =f _H -f _c,N .

Then any carrier frequency f _cj in the available carrier frequency table 1 can be expressed as $f_{\mathrm{cj}}=f_L+\underset{j=1}{\overset{N}{\mathrm{\Σ}}}{k}_j\mathrm{\Δf}$

Where k _j Δf = f _{span, j} = f _{c, j} - f _{c, j-1} , k _j is a random number, which is generated by a random number generator here.

If the effective bandwidth of the modulated signal is set to B, the carrier frequency interval of the non-equal interval frequency hopping system should satisfy

f _span1 =f _c1 -f _L =k ₁ ·Δf≥B/2,

f _span,j =f _c,j -f _c,j-1 =k _j ·Δf≥B

f _span,N+1 ＝f _H -f _c,N ＝k _N+1 ∆f≥B/2

The lower limit of random number k _j is given, if it is k _min , k ₁ ≥k _min , _ki ≥2k _min , k _N ≥k _min . In order to take into account the randomness and spectrum utilization of k _j , an upper limit k _max can also be set artificially so as not to make the value of k _j too large, so that there is

k _min ≤ k ₁ , k _N+1 ≤ _{k max} , 2k _min ≤ _{k j} ≤ k _max j=1, 2, ..., N-1

Here, first set a small value of Δf and appropriate values _of k _min and k _{max ,} then calculate according to the above formulas, and finally evaluate the obtained carrier frequency set. Adjust the value until the carrier frequency set that meets the requirements is obtained.

The implementation method can be accomplished conveniently by using a computer or a microprocessor. The steps are as follows:

First, determine the lower limit of the phase detection frequency according to the actual requirements of the equipment;

The embedded microprocessor randomly selects n phase detection frequencies, and these phase detection frequencies can take larger values, and are all greater than the lower limit of the phase detection frequency, so as to ensure a short frequency jump establishment time. The task of realizing a smaller frequency interval under the condition of a higher phase detection frequency is completed by subsequent steps to ensure an increase in the number of available frequency hopping, thereby increasing the key amount. At the same time, the embedded microprocessor controls the frequency hopping pattern generator to generate a pseudo-random frequency hopping pattern;

Design an equal interval frequency hopping arrangement table for each phase detection frequency, as shown in Figure 4, and then combine n equal interval frequency hopping arrangement tables into a non-equal interval arrangement table to form all optional carrier frequency tables, as shown in Figure 4 As shown in 5, it can be seen from this table that the frequency points are distributed at non-equal intervals, and the frequency interval is small, and the available frequency points are greatly increased;

Extract a group of frequencies from all available carrier frequency tables and compare them with the lower limit of the phase detection frequency to ensure that the phase detection frequency corresponding to each frequency value is greater than the lower limit, thereby generating the currently selected carrier frequency table.

When the comparison result of the above step "d" satisfies that "the phase detection frequency corresponding to each frequency value is greater than the lower limit value", the pseudo random frequency hopping pattern generator and the currently selected carrier frequency table are jointly determined to generate a pseudo random non-equal Interval frequency hopping sequence table, the frequency arrangement of this table is pseudo-random and has no rules to follow, thus improving the confidentiality of the equipment; the embedded microprocessor selects the appropriate frequency synthesizer control parameters according to the content of the currently selected carrier frequency table; Otherwise, return to step "d", and re-extract a group of frequencies from all available frequency tables, and compare them with the lower limit of the phase detection frequency;

The embedded microprocessor selects the appropriate frequency synthesizer control parameters according to the content of the currently selected carrier frequency table, and jointly controls the program frequency division ratio N and reference Score R;

Finally, the frequency synthesizer outputs the pseudo-random non-equal interval frequency hopping signal that meets the requirements.

The specific frequency hopping method is as follows: In Figure 2, the frequency conversion reference source phase-locked loop frequency synthesizer synthesizes and outputs the required system carrier frequency according to the best selected carrier frequency value provided by the currently selected carrier frequency table; the currently selected carrier frequency table The content in is the local optimal carrier frequency table selected by the embedded microprocessor according to the content of the optional carrier frequency table through a specific non-equal interval algorithm, and sent to the frequency hopping pattern generator to convert the frequency hopping pattern Mapped into the currently selected carrier frequency table; the optional carrier frequency table stores all the frequency values that can be generated by the frequency conversion reference source phase-locked loop frequency synthesizer in the given frequency band of the system. According to the actual needs of the frequency hopping system, the embedded micro-processing The generator can extract a set of frequency values from the frequency table and store them in the currently selected frequency table for mapping and selection by the frequency hopping pattern generator. The embedded microprocessor sends the frequency value selected by the frequency hopping pattern generator in the currently selected frequency table (the current carrier frequency value of the frequency hopping system) to the frequency conversion reference source phase-locked loop frequency synthesizer to generate the carrier frequency of the corresponding frequency signal output.

Claims (2)

1, a kind of method that improves frequency hopping system secret key amount and shortens frequency hopping establishment time, is characterized in that this method is: a. First, determine the lower limit of the phase detection frequency according to the actual requirements of the equipment; b. The embedded microprocessor randomly selects n phase detection frequencies. These phase detection frequencies can take larger values, and they are all greater than the lower limit of the phase detection frequency. The embedded microprocessor controls the frequency hopping pattern generator to generate pseudo-random jumps frequency pattern; c. Design an equal interval frequency hopping arrangement table for each phase detection frequency, and then combine n equal interval frequency hopping arrangement tables into a non-equal interval arrangement table to form all optional carrier frequency lists; d. Extract a group of frequencies from all available carrier frequency tables, and compare them with the lower limit of the phase detection frequency to ensure that the phase detection frequency corresponding to each frequency value is greater than the lower limit, thereby generating the currently selected carrier frequency table ; e. When the result of the comparison in the above step "d" satisfies that "the phase detection frequency corresponding to each frequency value is greater than the lower limit value", the pseudo-random frequency hopping pattern generator and the currently selected carrier frequency table are jointly determined to generate a pseudo-random frequency. Non-equal interval frequency hopping sequence list; the embedded microprocessor selects the appropriate frequency synthesizer control parameters according to the content of the currently selected carrier frequency table; otherwise, return to step "d" and re-extract a group from all available carrier frequency tables frequency, and compare it with the lower limit of the phase detection frequency; f. Control the program frequency division ratio N and the reference division ratio R _o of the frequency conversion reference source phase-locked loop frequency synthesizer; g. Finally, the frequency synthesizer outputs a pseudo-random non-equally spaced frequency hopping signal that meets the requirements. 2, the method for improving frequency hopping system key amount according to claim 1 and shortening frequency hopping set up time, it is characterized in that the frequency hopping method of described frequency hopping system is: frequency conversion reference source phase-locked loop frequency synthesizer ( 5) According to the best selected carrier frequency value provided by the currently selected carrier frequency table (2), synthesize and output the required system carrier frequency; the content in the currently selected carrier frequency table (2) is determined by the embedded microprocessor (4) according to The content in the optional carrier frequency table (1) is selected through a specific non-equal interval algorithm to select the local optimal carrier frequency table, and sent to the frequency hopping pattern generator (3), and the frequency hopping pattern is mapped to the currently selected Carrier frequency table: The optional carrier frequency table (1) stores all the frequency values that can be generated by the frequency conversion reference source phase-locked loop frequency synthesizer (5) in the given frequency band of the system. According to the actual needs of the frequency hopping system, embedded The formula microprocessor (4) can extract a group of frequency values from the frequency table and store them in the currently selected frequency table (2) for mapping and selection by the frequency hopping pattern generator (3). The embedded microprocessor (4) sends the current carrier frequency value of the frequency hopping system selected by the frequency hopping pattern generator (3) in the currently selected frequency table (2) to the frequency conversion reference source phase-locked loop frequency synthesizer (5) , to generate the corresponding frequency carrier frequency signal output.

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