CN1588215A - Multicrystaline silicon layer structure and its forming method and plane display - Google Patents

Multicrystaline silicon layer structure and its forming method and plane display Download PDF

Info

Publication number
CN1588215A
CN1588215A CN 200410069995 CN200410069995A CN1588215A CN 1588215 A CN1588215 A CN 1588215A CN 200410069995 CN200410069995 CN 200410069995 CN 200410069995 A CN200410069995 A CN 200410069995A CN 1588215 A CN1588215 A CN 1588215A
Authority
CN
China
Prior art keywords
polysilicon layer
amorphous silicon
layer
silicon layer
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 200410069995
Other languages
Chinese (zh)
Inventor
许建宙
许宗义
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AU Optronics Corp
Original Assignee
AU Optronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AU Optronics Corp filed Critical AU Optronics Corp
Priority to CN 200410069995 priority Critical patent/CN1588215A/en
Publication of CN1588215A publication Critical patent/CN1588215A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention is a polycrystalline silicon layer forming method, including: providing a supporting substrate including a first part and a second part; forming a first noncrystalline silicon layer and a second one on the first and second parts, respectively, where the first noncrystalline silicon layer is thinner than the second one; and crystallizing the two noncrystalline silicon layers to simultaneously form a first polycrystalline silicon layer and a second one.

Description

Polysilicon layer structure and its formation method and flat-panel screens
Technical field
The present invention relates to a kind of polysilicon layer structure and its formation method and flat-panel screens, particularly a kind of formation method of low temperature polycrystalline silicon especially particularly relates to a kind of selective crystallization amorphous silicon to form the method for polysilicon.
Background technology
Thin film transistor (TFT) (Thin Film Transistor, be called for short TFT) be commonly used for the active component (active element) of active matrix type flat-panel screens, as utilize thin film transistor (TFT) to drive LCD (Liquid Crystal Display, be called for short LCD) or organic electro-luminescent display (Organic LightEmitting Display is called for short OLED) etc.
Wherein the semiconductor silicon film of TFT is the most common with amorphous silicon (a-Si:H) film of hydrogenation, because its technology is the most ripe.In addition, because polysilicon has than amorphous silicon lattice arrangement more regularly, thus have faster advantage such as electric transmission speed, so in the TFT technology, replace the trend that amorphous silicon membrane has been a development at present with polysilicon membrane.
The manufacture method of common polysilicon membrane roughly has three kinds: first kind is to utilize deposition step directly to deposit formation, but this method must deposit the enough thick polysilicon membrane that could form big crystal grain, and formed polysilicon membrane surface evenness is poor, the formation of gate insulator afterwards had bad influence, and required manufacturing process temperature also up to 600 degree, easily is unfavorable for element; Second kind is to utilize heat treatment mode to make it crystallize into polysilicon membrane again after forming amorphous silicon membrane earlier, though but this method can produce thin thickness and uniform polysilicon membrane, but the required temperature of its crystallisation step is still spent up to 600, and the required time is long, summation heat budget height is so can make productive rate and element all be subjected to bad influence; The third is to utilize laser treatment to make it crystallize into polysilicon membrane again after earlier forming amorphous silicon membrane, and this kind method is the mode of normal use at present.
The multi-crystal TFT display comprises viewing area and drive circuit area.Wherein the contactor speed of drive circuit area is quick more good more, and the interpretation of contactor is more clearly good more, just the element of drive circuit area preferably has high electron mobility (mobility) and good subcritical amplitude of oscillation characteristics such as (sub-thresholdswing), and these characteristics can obtain under polysilicon membrane has the situation of big polysilicon grain.In addition, good viewing area must possess less leakage current is arranged, but if the roughness on polysilicon membrane surface is too high, be deposited on coverage (coverage) variation of the gate insulator on the polysilicon membrane after can making it, cause the generation of leaking electricity, and, then can reduce the roughness (roughness) on polysilicon membrane surface, and then improve the coverage of gate insulator and reduce the generation of leakage current when if polysilicon membrane has less crystal grain.In brief, for obtaining the multi-crystal TFT display of superperformance, the polysilicon membrane in its drive circuit area has the polysilicon grain of large-size, and the polysilicon membrane in its viewing area has the polysilicon grain of reduced size.
For making polysilicon membrane in drive circuit area and viewing area, form different polysilicon grain sizes, to obtain the multi-crystal TFT display of superperformance, usually must handle drive circuit area and viewing area respectively, to form the polysilicon membrane of different polysilicon grain sizes.For example; in drive circuit area, polysilicon membrane is handled with slower laser scanning speed; to obtain the polysilicon grain of large-size; and then in the viewing area, polysilicon membrane is handled with laser scanning speed faster; to obtain the polysilicon grain of reduced size; but this kind is to the mode of drive circuit area and viewing area separate processes; often have the laser contraposition to be forbidden and the problem of changing photomask, and these problem regular meetings reduce the yield rate and the output (throughput) of elements.
So industry is needed badly a kind of method that can form the polysilicon of various grain sizes is simultaneously proposed, to address the above problem.
Summary of the invention
In view of this, one of purpose of the present invention just provides a kind of polysilicon layer structure and its formation method, to form the polysilicon layer of various grain sizes simultaneously, is forbidden to cause good amount decline and replacing photomask to cause problems such as output reduction to solve the laser contraposition.
For reaching above-mentioned purpose, the invention provides a kind of polysilicon layer structure, comprise: first polysilicon layer and second polysilicon layer, wherein the thickness of this first polysilicon layer is less than the thickness of this second polysilicon layer, and the crystallite dimension of this first polysilicon layer is greater than the crystallite dimension of this second polysilicon layer.
For reaching above-mentioned purpose, the invention provides a kind of formation method of polysilicon layer, comprising: provide base material to comprise first part and second part; Form respectively first amorphous silicon layer and second amorphous silicon layer in above-mentioned first partly with above-mentioned second partly on, and the thickness of this first amorphous silicon layer is less than the thickness of this second amorphous silicon layer; And this first amorphous silicon layer and this second amorphous silicon layer carried out crystallization treatment, to form first polysilicon layer and second polysilicon layer simultaneously.
For reaching above-mentioned purpose, the present invention still provides a kind of formation method of polysilicon layer, comprising: provide base material to comprise first part, second part and the 3rd partly; Form respectively first amorphous silicon layer, second amorphous silicon layer and the 3rd amorphous silicon layer in this first partly go up, this second partly go up with the 3rd part on, and the thickness of this first amorphous silicon layer is less than the thickness of this second amorphous silicon layer, and the thickness of this second amorphous silicon layer is less than the thickness of the 3rd amorphous silicon layer; And this first amorphous silicon layer, this second amorphous silicon layer and the 3rd amorphous silicon layer carried out crystallization treatment, to form first polysilicon layer, second polysilicon layer and the 3rd polysilicon layer simultaneously.
For reaching above-mentioned purpose, the invention provides a kind of flat-panel screens, comprising: the first transistor, be arranged in the drive circuit area, this first transistor has first polysilicon layer that comprises source electrode, drain electrode and passage; And transistor seconds, be arranged in the viewing area, this transistor seconds has second polysilicon layer that comprises source electrode, drain electrode and passage, the thickness of this second polysilicon layer is greater than the thickness of this first polysilicon layer, and the crystallite dimension of this second polysilicon layer is less than the crystallite dimension of this first polysilicon layer.
Description of drawings
Figure 1A~1C is a series of sectional views, in order to the flow process of the explanation preferred embodiment of the present invention one making polysilicon layer.
Fig. 2 A~2D is a series of sectional views, in order to the flow process of the explanation preferred embodiment of the present invention two making polysilicon layers.
Fig. 3 A~3B is a series of sectional views, in order to the flow process of the explanation preferred embodiment of the present invention three making polysilicon layers.
Fig. 4 A~4C is a series of sectional views, in order to the flow process of the explanation preferred embodiment of the present invention four making polysilicon layers.
The simple symbol explanation
1,3,8~drive circuit area
2,4,9~viewing area
5~the first partly
6~the second partly
7~the 3rd partly
100,200,300,400~base material
110,210~the first amorphous silicon layers
120,220~the second amorphous layers
130,230,330,430~polysilicon layer
310,410~amorphous silicon layer
405~cushion
440~gate dielectric
450~grid
460~interlayer dielectric layer
470~interconnect
Embodiment
The amorphous silicon membrane that the present invention mainly utilizes different-thickness after the laser treatment of same step to form the polysilicon grain size of different size.
At first form thin amorphous silicon membrane and form thicker amorphous silicon membrane, then carry out laser treatment step in the viewing area in drive circuit area.Because the amorphous silicon in drive circuit area has thin thickness, form the bigger polysilicon membrane of crystal grain so when laser treatment, can dissolve fully, so have the higher electron mobility and the preferred subcritical amplitude of oscillation, reach the characteristic of preferred drive circuit area; And the amorphous silicon in the viewing area has thicker thickness, so the energy of laser treatment is not sufficient to make it to dissolve fully, so the polysilicon membrane that forms has less crystallite dimension, the roughness of its polysilicon surface (roughness) will reduce, the coverage (coverage) of the gate insulator that is deposited after making it promotes, and then leakage current is reduced.
For above and other objects of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and cooperate appended graphicly, be described in detail below:
Embodiment 1
See also Figure 1A, base material 100 at first is provided, this base material 100 comprises drive circuit area 1 and viewing area 2; Then utilize deposition, photoetching corrosion manufacturing process on the viewing area 2 of base material 100, to form first amorphous silicon layer 110, as utilize chemical vapor deposition (Chemical Vapor Deposition, be called for short CVD) etc. mode deposit first amorphous silicon layer 110, then utilize general photoetching corrosion manufacturing process to form first amorphous silicon layer 110 again on viewing area 2, this etching manufacturing process can be Wet-type etching or dry-etching.
Then utilize above-mentioned mode to form second amorphous silicon layer 120 on drive circuit area 1 and 2 surfaces, viewing area again, shown in Figure 1B, and the thickness difference of the amorphous silicon layer on drive circuit area 1 and the viewing area 2 need be controlled in the certain limit.If thickness difference is too little, then the gap of formed polysilicon grain size will be big inadequately afterwards, will cause effect of the present invention obvious inadequately; If thickness difference is too big, then need further to adjust follow-up fabrication process condition, the strength condition as ion injects can make the complexity of manufacturing process more improve on the contrary.So the thickness difference of amorphous silicon layer is preferably 100~1000 dusts, be more preferred from 200~400 dusts.
Then simultaneously first amorphous silicon layer 110 and second amorphous silicon layer 120 on drive circuit area 1 and 2 surfaces, viewing area carried out crystallization treatment, so that the amorphous silicon layer 110 and second amorphous silicon layer 120 change polysilicon layer 130 into, shown in Fig. 1 C, this crystallization treatment can be laser technology, and the type of the laser that uses can be excimer laser (exciemr laser) in laser technology, continuous wave laser (continuewave laser, be called for short CW laser), laser beam pulses (laser beam pluse) etc., and employed laser manufacturing process can be lateral solidification method (Lateral Solidification, be called for short LS), continous way lateral solidification method (Sequential Lateral Solidification, be called for short SLS), CGS Continuous Grain Silicon (Continuous Grain Silicon, be called for short CGS), metal induced side crystallization (Metal InducedLateral Crystallization is called for short MILC) etc.
Because the amorphous silicon layer 120 on the drive circuit area 1 is thin with respect to the amorphous silicon layer on the viewing area 2 110 and 120, so the amorphous silicon layer 120 on the drive circuit area 1 is through laser treatment the time, its degree of dissolving is high with respect to the degree of dissolving of the amorphous silicon layer on the viewing area 2 110 and 120, so when formation polysilicon layer 130 is finished in crystallization, the crystallite dimension of the polysilicon layer 130 on the drive circuit area 1 is bigger, and the electron mobility of drive circuit area 1 and subcritical amplitude of oscillation characteristic are improved significantly.Simultaneously because the amorphous silicon layer 110 and 120 on the viewing area 2 is thick with respect to the amorphous silicon layer on the drive circuit area 1 120, so the amorphous silicon layer 110 on the viewing area 2 and 120 is through laser treatment the time, its degree of dissolving is low with respect to the degree of dissolving of the amorphous silicon layer on the drive circuit area 1 120, so when formation polysilicon layer 130 is finished in crystallization, the crystallite dimension of the polysilicon layer 130 on the viewing area 2 is less, the roughness (coverage) on polysilicon layer 130 surfaces is obviously reduced, and its leaky is minimized.And above-mentioned these benefits all can just obtain after primary crystallization is handled, and do not need gradation to handle, so not only there is not the problem of laser secondary contraposition, also can not spin out manufacturing process time because the needs secondary replaces photomask.
Embodiment 2
See also Fig. 2 A, base material 200 at first is provided, this base material 200 comprises drive circuit area 3 and viewing area 4; Then on base material 200, form first amorphous silicon layer 210, as utilize chemical vapor deposition modes such as (Chemical Vapor Deposition are called for short CVD) on base material 200, to deposit first amorphous silicon layer 210.
Then utilize general photoetching corrosion manufacturing process that first amorphous silicon layer, 210 parts on the drive circuit area 3 are removed, this etching manufacturing process can be Wet-type etching or dry-etching, and first amorphous silicon layer 210 on the reservation viewing area 4, on drive circuit area 3 and viewing area 4, to form the amorphous silicon layer of variable thickness, shown in Fig. 2 B, and the thickness difference of the amorphous silicon layer on drive circuit area 3 and the viewing area 4 need be controlled in the certain limit.
Then form second amorphous silicon layer 220 again in drive circuit area 3 and 4 surfaces, viewing area, shown in Fig. 2 C, because the thickness difference of first amorphous silicon layer 210 on drive circuit area 3 and the viewing area 4 is controlled in the certain limit, so after forming second amorphous silicon layer 220 simultaneously on drive circuit area 3 and the viewing area 4, the thickness difference of the amorphous silicon layer on it still is controlled in the certain limit.If thickness difference is too little, then the gap of formed polysilicon grain size will be big inadequately afterwards, will cause effect of the present invention obvious inadequately; If thickness difference is too big, then need further to adjust follow-up fabrication process condition, the strength condition as ion injects can make the complexity of manufacturing process more improve on the contrary.So the thickness difference of amorphous silicon layer is preferably 100~1000 dusts, be more preferred from 200~400 dusts.
Then simultaneously first amorphous silicon layer 210 and second amorphous silicon layer 220 on drive circuit area 3 and 4 surfaces, viewing area carried out crystallization treatment, so that the amorphous silicon layer 210 and second amorphous silicon layer 220 change polysilicon layer 230 into, shown in Fig. 2 D, this crystallization treatment can be laser technology, and the type of the laser that uses can be excimer laser (exciemr laser) in laser technology, continuous wave laser (continuewave laser, be called for short CW laser), laser beam pulses (laser beam pluse) etc., and employed laser manufacturing process can be lateral solidification method (Lateral Solidification, be called for short LS), continous way lateral solidification method (Sequential Lateral Solidification, be called for short SLS), CGS Continuous Grain Silicon (Continuous Grain Silicon, be called for short CGS), metal induced side crystallization (Metal InducedLateral Crystallization is called for short MILC) etc.
Because the amorphous silicon layer 220 on the drive circuit area 3 is thin with respect to the amorphous silicon layer on the viewing area 4 210 and 220, so its degree of dissolving through laser treatment time of the amorphous silicon layer 220 on the drive circuit area 3 is high with respect to the degree of dissolving of the amorphous silicon layer on the viewing area 4 210 and 220, so when formation polysilicon layer 230 is finished in crystallization, the crystallite dimension of the polysilicon layer 230 on the drive circuit area 3 is bigger, and the electron mobility of drive circuit area 3 and subcritical amplitude of oscillation characteristic are improved significantly; Simultaneously because the amorphous silicon layer 210 and 220 on the viewing area 4 is thick with respect to the amorphous silicon layer on the drive circuit area 3 220, so the amorphous silicon layer 210 on the viewing area 4 and 220 its degree of dissolving through laser treatment the time is low with respect to the degree of dissolving of the amorphous silicon layer on the drive circuit area 3 220, so when formation polysilicon layer 230 is finished in crystallization, the crystallite dimension of the polysilicon layer 230 on the viewing area 4 is less, the roughness (coverage) on polysilicon layer 230 surfaces is obviously reduced, and its leaky is minimized.And above-mentioned these benefits all can just obtain after primary crystallization is handled, and do not need gradation to handle, so not only there is not the problem of laser secondary contraposition, also can not spin out manufacturing process time because the needs secondary replaces photomask.
Embodiment 3
See also Fig. 3 A, base material 300 at first is provided, this base material 100 comprises partly the 6 and the 3rd part 7 of first part 5, second; Then utilize variety of way on base material 300, to form amorphous silicon layer 310, with amorphous silicon layer 310 respectively at formation variable thickness on first part, 5, second part the 6 and the 3rd part 7, as in Fig. 3 A, the thickness of the amorphous silicon layer 310 of first part 5 is the thinnest, next is the amorphous silicon layer 310 of second part 6, and the thickest amorphous silicon layer is the amorphous silicon layer of the 3rd part 7.
Above-mentioned thin Yu the thickest thickness difference of amorphous silicon layer need be controlled in the certain limit.If thickness difference is too little, then the gap of formed polysilicon grain size will be big inadequately afterwards, will cause effect of the present invention obvious inadequately; If thickness difference is too big, then need further to adjust follow-up fabrication process condition, the strength condition as ion injects can make the complexity of manufacturing process more improve on the contrary.So the thinnest Yu the thickest thickness difference of amorphous silicon layer is preferably 100~1000 dusts, is more preferred from 200~400 dusts.
Then simultaneously to first part 5, second part the 6 and the 3rd partly amorphous silicon layer 310 on 7 surfaces is carried out crystallization treatment, so that amorphous silicon layer 310 changes polysilicon layer 330 into, shown in Fig. 3 B, this crystallization treatment can be laser technology, and the type of the laser that uses can be excimer laser (exciemr laser) in laser technology, continuous wave laser (continue wave laser, be called for short CW laser), laser beam pulses (laser beam pluse) etc., and employed laser manufacturing process can be lateral solidification method (Lateral Solidification, be called for short LS), continous way lateral solidification method (Sequential LateralSolidification, be called for short SLS), CGS Continuous Grain Silicon (Continuous Grain Silicon, be called for short CGS), metal induced side crystallization (Metal Induced Lateral Crystallization is called for short MILC) etc.
Since the thickness of amorphous silicon layer 310 first partly 5 the thinnest, secondly be second partly 6, partly 7 the thickest the 3rd, so after laser treatment, the degree of dissolving of amorphous silicon layer 310 successively decreases successively, so after formation polysilicon layer 330 was finished in crystallization, the crystallite dimension and the surfaceness of its polysilicon layer 330 increased progressively all successively.Generally speaking, utilize the amorphous silicon layer of different-thickness after primary crystallization is handled, just can obtain the polysilicon layer of different grain sizes,, also can not spin out manufacturing process time because the needs secondary replaces photomask so not only there is not the problem of laser secondary contraposition.
Embodiment 4
See also Fig. 4 C, this figure is the part-structure figure that utilizes the made flat-panel screens of the present invention, comprise drive circuit area 8 and viewing area 9, wherein the thickness of the corresponding polysilicon layer 430 in drive circuit area 8 and viewing area 9 and crystallite dimension neither with, thin thickness, the crystallite dimension of polysilicon layer 430 that the polysilicon layer 430 that is arranged in drive circuit area 8 is arranged in viewing area 9 is big, surfaceness is big, so the electron mobility of drive circuit area 8 and subcritical amplitude of oscillation characteristic are improved significantly, the leaky of viewing area 9 is minimized.
See also Fig. 4 A~4C now, these figure explanations utilize the manufacturing process flow diagram of flat-panel screens of the present invention.
See also Fig. 4 A, base material 400 at first is provided, this base material 400 comprises drive circuit area 8 and viewing area 9; Then in substrate 400, form cushion 405; On cushion 405, form amorphous silicon layer 410 again, 9 thickness is thin to the thickness of this amorphous silicon layer 410 in drive circuit area 8 in the viewing area, and the thickness difference of amorphous silicon layer 410 need be controlled in the certain limit, and this thickness difference is preferably 100~1000 dusts, is more preferred from 200~400 dusts.
Then simultaneously drive circuit area 8 and viewing area 9 corresponding amorphous silicon layers 410 are carried out crystallization treatment, change polysilicon layer 430 into it, shown in Fig. 4 B, and this crystallization treatment can be laser technology, and the type of the laser that uses can be excimer laser (exciemr laser) in laser technology, continuous wave laser (continue wave laser, be called for short CW laser), laser beam pulses (laser beam pluse) etc., and employed laser manufacturing process can be lateral solidification method (Lateral Solidification, be called for short LS), continous way lateral solidification method (Sequential Lateral Solidification, be called for short SLS), CGS Continuous Grain Silicon (Continuous Grain Silicon, be called for short CGS), metal induced side crystallization (MetalInduced Lateral Crystallization is called for short MILC)) etc.
Then on polysilicon layer 430, form gate insulator 440, on gate insulator 440, form grid 450 again, shown in Fig. 4 B; Next be a mask with grid 450, polysilicon layer 430 is carried out an ion implantation step, so that polysilicon layer 430 forms source S, drain D and channel C.
Then form interlayer dielectric layer 460, in interlayer dielectric layer 460, form interconnect 470 again, shown in Fig. 4 C, carry out the back segment and the package fabrication process of general closed planar display afterwards again, to form a flat-panel screens with its top.
Though the present invention has disclosed preferred embodiment as above, so it is not in order to limit the present invention.The above-mentioned amorphous silicon layer that forms different-thickness in zones of different is not limited to be used in drive circuit area and the viewing area through the technology of crystallization treatment with the polysilicon layer of formation various grain sizes, and any needs have the structure of the polysilicon layer of different grain sizes all can use technology of the present invention; And the present invention also is not limited to only be used in the polysilicon layer of two kinds of various grain sizes, but the amorphous silicon layer that can form multiple thickness according to actual needs again through crystallization treatment to obtain the polysilicon layer of various grain sizes.So so long as without departing from the spirit and scope of the present invention, those skilled in the art can do a little change and retouching without departing from the spirit and scope of the present invention, thus protection scope of the present invention should with accompanying Claim the person of being defined be as the criterion.

Claims (10)

1. polysilicon layer structure comprises:
One first polysilicon layer and one second polysilicon layer, wherein the thickness of this first polysilicon layer is less than the thickness of this second polysilicon layer, and the crystallite dimension of this first polysilicon layer is greater than the crystallite dimension of this second polysilicon layer.
2. polysilicon layer structure as claimed in claim 1, wherein the thickness difference of this first polysilicon layer and this second polysilicon layer is roughly 100~1000 dusts.
3. polysilicon layer structure as claimed in claim 2, wherein the thickness difference of this first polysilicon layer and this second polysilicon layer is roughly 200~400 dusts.
4. polysilicon layer structure as claimed in claim 1, wherein the surfaceness of this first polysilicon layer is greater than the surfaceness of this second polysilicon layer.
5. polysilicon layer structure as claimed in claim 1, wherein this first polysilicon layer is arranged in the one drive circuit district and this second polysilicon layer is arranged in a viewing area.
6. polysilicon layer structure as claimed in claim 1 also comprises:
One the 3rd polysilicon layer, the thickness of the 3rd polysilicon layer is greater than the thickness of the thickness of this first polysilicon layer and the 3rd polysilicon layer thickness less than this second polysilicon layer, and the crystallite dimension of the 3rd polysilicon layer is less than the crystallite dimension of the crystallite dimension of this first polysilicon layer and the 3rd polysilicon layer crystallite dimension greater than this second polysilicon layer.
7. polysilicon layer structure as claimed in claim 6, wherein the surfaceness of the 3rd polysilicon layer is less than the roughness of this first polysilicon layer, and the surfaceness of the 3rd polysilicon layer is greater than the roughness of this second polysilicon layer.
8. the formation method of a polysilicon layer comprises: provide base material to comprise first part and second part; Form respectively first amorphous silicon layer and second amorphous silicon layer in above-mentioned first partly with above-mentioned second partly on, and the thickness of this first amorphous silicon layer is less than the thickness of this second amorphous silicon layer; And this first amorphous silicon layer and this second amorphous silicon layer carried out crystallization treatment, to form first polysilicon layer and second polysilicon layer simultaneously.
9. the formation method of a polysilicon layer comprises: provide base material to comprise first part, second part and the 3rd partly; Form respectively first amorphous silicon layer, second amorphous silicon layer and the 3rd amorphous silicon layer in this first partly go up, this second partly go up with the 3rd part on, and the thickness of this first amorphous silicon layer is less than the thickness of this second amorphous silicon layer, and the thickness of this second amorphous silicon layer is less than the thickness of the 3rd amorphous silicon layer; And this first amorphous silicon layer, this second amorphous silicon layer and the 3rd amorphous silicon layer carried out crystallization treatment, to form first polysilicon layer, second polysilicon layer and the 3rd polysilicon layer simultaneously.
10. flat-panel screens comprises: the first transistor, be arranged in the drive circuit area, and this first transistor has first polysilicon layer that comprises source electrode, drain electrode and passage; And transistor seconds, be arranged in the viewing area, this transistor seconds has second polysilicon layer that comprises source electrode, drain electrode and passage, the thickness of this second polysilicon layer is greater than the thickness of this first polysilicon layer, and the crystallite dimension of this second polysilicon layer is less than the crystallite dimension of this first polysilicon layer.
CN 200410069995 2004-07-20 2004-07-20 Multicrystaline silicon layer structure and its forming method and plane display Pending CN1588215A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200410069995 CN1588215A (en) 2004-07-20 2004-07-20 Multicrystaline silicon layer structure and its forming method and plane display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200410069995 CN1588215A (en) 2004-07-20 2004-07-20 Multicrystaline silicon layer structure and its forming method and plane display

Publications (1)

Publication Number Publication Date
CN1588215A true CN1588215A (en) 2005-03-02

Family

ID=34604389

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200410069995 Pending CN1588215A (en) 2004-07-20 2004-07-20 Multicrystaline silicon layer structure and its forming method and plane display

Country Status (1)

Country Link
CN (1) CN1588215A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101071793B (en) * 2006-05-11 2010-06-23 统宝光电股份有限公司 Flat panel display and fabrication method thereof
CN103903565A (en) * 2014-01-13 2014-07-02 友达光电股份有限公司 Pixel of display panel

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101071793B (en) * 2006-05-11 2010-06-23 统宝光电股份有限公司 Flat panel display and fabrication method thereof
CN103903565A (en) * 2014-01-13 2014-07-02 友达光电股份有限公司 Pixel of display panel
CN103903565B (en) * 2014-01-13 2016-03-02 友达光电股份有限公司 Pixel of display panel

Similar Documents

Publication Publication Date Title
TWI234288B (en) Method for fabricating a thin film transistor and related circuits
US7098085B2 (en) Method and apparatus for forming a thin semiconductor film, method and apparatus for producing a semiconductor device, and electro-optical apparatus
CN1126179C (en) Transistor, semiconductor circuit, and method of forming the same
US8097883B2 (en) Thin film transistors in pixel and driver portions characterized by surface roughness
US8592832B2 (en) Organic light emission diode display device and method of fabricating the same
US20070259487A1 (en) Method of forming a polysilicon film and method of manufacturing a thin film transistor including a polysilicon film
KR20020092255A (en) Semiconductor film, semiconductor device and method of their production
US7303981B2 (en) Polysilicon structure, thin film transistor panel using the same, and manufacturing method of the same
CN1514469A (en) Crystal mask, amorphous silicon crystallization method and method of manufacturing array base plate using same
US10693011B2 (en) Thin film transistor array substrate, method of manufacturing the same, and display device including thin film transistor substrate
US7902003B2 (en) Semiconductor device and method for manufacturing the same
US9837542B2 (en) Polycrystalline silicon thin-film transistor
CN1588215A (en) Multicrystaline silicon layer structure and its forming method and plane display
CN1666347A (en) Tft electronic devices and their manufacture
CN105355593A (en) TFT substrate manufacturing method and TFT substrate
CN1324388C (en) Manufacture of low temperature polycrystal silicon film electric crystal LCD device
JP4256087B2 (en) Method for manufacturing semiconductor device
CN1295751C (en) Method for making polysilicon film
CN110838467A (en) Manufacturing method of low-temperature polycrystalline silicon substrate and low-temperature polycrystalline silicon substrate
CN106373922A (en) Low-temperature polycrystalline silicon thin film transistor array substrate and manufacturing method thereof
CN108231693B (en) Array substrate, manufacturing method thereof and display device
CN1645612A (en) Semiconductor structure with composite polysilicon layer and displaying panel therefor
CN1301535C (en) Method for forming polysilicon layer on base plate
CN1758127A (en) Display panel having polycrystalline silicon layer and its manufacturing method
JP2008112807A (en) Method for manufacturing a thin film transistor substrate, and method for manufacturing a display using the same

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination