CN1584845A - Internal memory protective method for digital signal processing telecommunicating applied system - Google Patents
Internal memory protective method for digital signal processing telecommunicating applied system Download PDFInfo
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- CN1584845A CN1584845A CN 200410044872 CN200410044872A CN1584845A CN 1584845 A CN1584845 A CN 1584845A CN 200410044872 CN200410044872 CN 200410044872 CN 200410044872 A CN200410044872 A CN 200410044872A CN 1584845 A CN1584845 A CN 1584845A
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Abstract
A method for protecting intenal memory includes using storage supervisor to achieve management, using locker to realize independent operation for storage, defining data structure for information statistics, monitoring utilization ratio of internal memory and mistake that may occure in address release and distribution by increasing heads of address pointer and off-normal detection units.
Description
Technical field
The present invention relates to the method for protecting EMS memory in communications field DSP (Digital Signal Processing, digital signal processing) built-in applied system.
Background technology
Along with the fast development of GSM, 2.5G, 3G and wireless local area network technology, the DSP application system has been widely used in the various aspects of signal Processing in real time.And the dsp processor of a new generation, TMS320C6000 series as TI company, has the CPU structure of optimization, abundant Peripheral Interface, multistage flowing water mechanism, its processing power can reach 4800MIPS (1,000,000 instruction per second) or higher, is widely used in channel wireless radio multi and wire communication field.
In communication system function implementation procedure, because the needs of data processing will inevitably relate to the application and the release of internal storage location.Because its real-time, the requirement of fast processing and the resource limit of dsp processor unlikely adopt memory management unit and the protection mechanism that is adopted such as common commercial operating system.Dsp system generally uses the actual storage operating strategy.Adopt simply, Memory Distribution Map fast.Visit to internal memory is direct; it does not often need through memory management unit the visit of address; export but directly deliver on the address wire; the address of visiting in all programs all is the actual physical address; and most of DSP application systems do not have protection mechanism to memory headroom, the in fact shared running space of each process.In the process implementation, needing using system is that it distributes address space, and after procedure termination or its employed internal storage location when no longer needing, process need discharge the storage unit of being applied for.System does not have safeguard measure to the employed storage unit of process, is in operation as process program and has used the space, illegal address or some storage unit has been carried out the illegal address operation, then may cause unpredictable consequence.
Summary of the invention
Purpose of the present invention is exactly in order to address the above problem, and proposes a kind of digital signal processing communication applications Installed System Memory guard method of simple and effective, to improve system stability.
Technical solution of the present invention:
The guard method of a kind of digital signal processing communication applications Installed System Memory is characterized in that its employing following steps realizes:
A. define the needed application heap of corresponding data processing;
B. set up the internal memory operation lock, be used for when the internal storage location of specified memory section is operated, realizing mutual exclusion mechanism;
C. define related data structure is used for internal storage location as head pointer distribution and release;
D. define pointer the cross the border length and the filling value of verification unit;
E. apply for internal storage location, add the head of head pointer, add the afterbody of verification unit that cross the border to the internal storage location that is distributed to the internal storage location of being applied for;
Whether releasing memory unit f. utilizes the head pointer data structure inspection of defined internal storage location to treat the legitimacy of releasing memory unit pointer parameter, utilize the verification unit inspection of the crossing the border internal storage location to be discharged of afterbody to cross the border.
The inventive method is when the design in the memory buffer pond of DSP application system, requirement according to system design, use the DSP memory manager, definition and the corresponding memory section of actual physics memory headroom, the metadata cache pond of distributing various objectives is to the corresponding memory section.Each memory section of memory management management distributes and the releasing memory unit in memory section, and the opereating specification of restriction respective data storage unit reduces the possibility that cache pool crosses the border.Set up internal memory operation lock simultaneously, realize in the sheet and the mutual exclusion mechanism during the outer memory cell operation of sheet operation when preventing internal storage location.Define the application that a related data structure is used for internal storage location, the example of this data structure is added to the front of institute's addresses distributed pointer as head again.After institute's addresses distributed pointer, add reserved field, insert the test value that crosses the border.When internal storage location discharges, utilize the head pointer data structure of this address pointer, judge the legitimacy of the pointer that is released address space; Utilize the protected field of address pointer afterbody to judge whether the address pointer end mark is destroyed, the mistake that monitoring may occur in Installed System Memory distribution and dispose procedure.Introduce memory protect mechanism thus, reduce the internal storage location error probability, and can find fast that contingent internal memory uses mistake.The inventive method makes the memory cache pond simplicity of design, efficient of DSP application system, improves the reliability of system.
Description of drawings
Fig. 1 is an initial memory cache of the present invention pond definition diagrammatic sketch.
Fig. 2 is the head pointer data structure of application internal storage location interpolation among the present invention and the processing flow chart of afterbody verification unit.
Fig. 3 is the inspection process figure during the releasing memory unit among the present invention.
Embodiment
Effective distribution of the memory management of the stability of the real-time application system of DSP, high efficiency and reliability and system, internal storage location and release have inevitable relation.Therefore design the DSP application system, need to consider the design in memory cache pond and adopt corresponding memory protect mechanism; Make storage resources can satisfy the needs of the normal Memory Allocation of system; And the operating position that can observe internal memory, the abnormal conditions that may occur during the monitoring internal memory uses; Prevent memory overwriting, take the operation address space of other program, cause the operation exception of other program, destroy the operate as normal of system or cause system crash.
The inventive method uses memory manager to realize the management of defined memory section in the whole memory unit operation, uses lock to realize the operation of monopolizing of storage unit.And definition data structure is used for the Information Statistics of internal memory operation, the utilization rate of monitoring internal memory and the memory failure that may occur.Its specific implementation step is:
1.DSP application system generally comprises in the sheet and chip external memory; The on-chip memory access speed is very fast, but capacity is less; The chip external memory access speed is slower, but capacity is bigger.To the needs of access speed and internal storage location size, define in needed of the corresponding data processing and the outer application heap of sheet during according to system design.
2. set up the internal memory operation lock, be used for when the internal storage location of specified memory section is operated, realizing mutual exclusion mechanism.
3. according to the demand of real-time system design, make the memory protect mechanism principle as far as possible little to the influence of system real time that is adopted, the definition related data structure is used for the distribution and the release of internal storage location as head pointer.
4. the cross the border length and the filling value of verification unit of definition pointer.
5.1. when the internal storage location application, add the head of head pointer to the internal storage location of being applied for.
5.2. add the afterbody of verification unit that cross the border to the internal storage location that is distributed.
6.1. when the releasing memory unit, utilize the inspection of defined internal storage location head pointer data structure to treat the legitimacy of releasing memory unit pointer parameter.
6.2. utilize the check word unit inspection of the crossing the border internal storage location to be discharged of afterbody whether to cross the border.
Be described in further detail below in conjunction with the enforcement of accompanying drawing technical solution of the present invention:
Illustrate that at first Fig. 1 finishes memory management and the needed initial setting up of protection mechanism before system's operation.According to the size in the memory buffer pond of system requirements and the requirement of runnability, in the sheet of DSP or the corresponding application heap of sheet external memory definition space, the start address of set memory section, length and association attributes.The memory cache pond of in the application heap of being created, distributing corresponding data processing.In system, create and obtain the internal memory operation lock, be used for operation mutual exclusion protection at internal storage location.
Fig. 2 explanation when the application internal memory, the cross the border disposal route of verification unit of head pointer data structure and afterbody.Definition head pointer data structure TUBHead is:
typedef?struct?tagTUBHead
{
Distribute address size (dwAlloc_Mem_Size; )
Start address pointer (dwStart_Addr; )
}TUbHead；
DwAlloc_Mem_Si_ze is the size of the data processing internal memory that need distribute, and dwStart_Addr removes the actual storage unit position of calling on the upper strata that returns to behind the address pointer head.The afterbody verification unit length of crossing the border of definition is RESERVE_LEN, and the value of its filling is BYTE_FILL_VALUE, and this value will be distinguished mutually with the normal value of the storage unit that may occur.When the internal storage location of a length d wSize of preliminery application, the length of the internal storage location of actual allocated is the length of the dwSize+TubHead+verification unit length of crossing the border.The concrete operations flow process is as follows:
1) obtaining the internal memory operation lock obtains the internal storage location operating right.
2) internal storage location of the length of the actual allocated dwSize+TubHead+verification unit length scale of crossing the border.
3) make dwStart_Addr point to the position of the pointer unit skew TubHead length of distribution.
4) insert the value of BYTE_FILL_VALUE in the long storage unit of the afterbody RESERVE_LEN of the pointer unit that distributes.
5) returning dwStart_Addr calls to the upper strata.
6) releasing memory operable lock.
Fig. 3 has shown the operating process when internal storage location discharges.
1) obtaining the internal memory operation lock obtains the internal storage location operating right.
2) at first import the validity checking of start address pointer to be discharged, judge the start address pointer, as be not more than then and finish whether greater than the length of TubHead.
3) as greater than the length of start address pointer offset head pointer data structure TubHead then, that is, and the length of skew backpointer=start address pointer-TubHead.
4) value of the dwStart_Addr by skew backpointer data structure judges whether the address pointer of input is effectively, and the value of the address pointer that equals to import as the value of dwStart_Addr is then effective, continues next step, then finishes as invalid.
5) judge according to the cross the border filling value of verification unit of afterbody whether internal storage location afterbody to be discharged crosses the border, as the then misregistration statistical information of crossing the border.
6) then putting head pointer data structure dwAlloc_Mem_Size and start address pointer dwStart_Addr as not crossing the border is zero, the releasing memory unit.
7) releasing memory operable lock.
The present invention proposes in the real-time application system of DSP, the function that set DSP provides realizes a kind of simply and effectively method for protecting EMS memory.The method is by a data structure that increases address pointer and the verification unit that crosses the border, and monitoring is contingent mistake when address assignment and release.And this method is simple to operate fast, and is minimum to the system performance influence.In the internal storage location expense that only increases seldom, guarantee to have improved the stability and the reliability of DSP application system on the basis of system real time.
Claims (5)
1, a kind of digital signal processing communication applications Installed System Memory guard method is characterized in that its employing following steps realizes:
A. define the needed application heap of corresponding data processing;
B. set up the internal memory operation lock, be used for when the internal storage location of specified memory section is operated, realizing mutual exclusion mechanism;
C. define related data structure is used for internal storage location as head pointer distribution and release;
D. define pointer the cross the border length and the filling value of verification unit;
E. apply for internal storage location, add the head of head pointer, add the afterbody of verification unit that cross the border to the internal storage location that is distributed to the internal storage location of being applied for;
Whether releasing memory unit f. utilizes the head pointer data structure inspection of defined internal storage location to treat the legitimacy of releasing memory unit pointer parameter, utilize the verification unit inspection of the crossing the border internal storage location to be discharged of afterbody to cross the border.
2, by the guard method of the described a kind of digital signal processing communication applications Installed System Memory of claim 1; it is characterized in that: at the needed application heap of the corresponding data processing of described definition is according to the size in the memory buffer pond of system requirements and the requirement of runnability; in the sheet of digital signal processing or the storage space of chip external memory define corresponding application heap; the start address of set memory section, length and association attributes distribute the memory cache pond of corresponding data processing in the application heap of being created.
3, by the guard method of the described a kind of digital signal processing communication applications Installed System Memory of claim 1, it is characterized in that: comprise at described application internal storage location:
E1) obtaining the internal memory operation lock obtains the internal storage location operating right;
E2) internal storage location of the actual allocated preliminery application internal storage location length+head pointer data structure length+verification unit length of crossing the border;
E3) internal storage location that the start address pointed is distributed is offset the position of head pointer data structure length;
E4) insert the filling value of the verification unit that crosses the border at the afterbody of the internal storage location that distributes;
E5) return the start address pointer and give call function;
E6) releasing memory operable lock.
4,, it is characterized in that described filling value will distinguish mutually with the normal value of the internal storage location that may occur by the guard method of the described a kind of digital signal processing communication applications Installed System Memory of claim 3.
5,, it is characterized in that when described internal storage location discharges, being undertaken by following flow process by the guard method of the described a kind of digital signal processing communication applications Installed System Memory of claim 3:
F1) obtaining the internal memory operation lock obtains the internal storage location operating right;
F2) at first treat the validity checking of the start address pointer of release, judge the start address pointer, as be not more than then and finish whether greater than the length of head pointer data structure;
F3) as greater than the length of start address pointer offset head pointer data structure then, promptly be offset the length of backpointer=start address pointer-head pointer data structure;
F4) judge by the value of skew back pointer data structure whether the start address pointer is effective, then finish, as effectively then continuing as invalid;
F5) judge according to the cross the border filling value of verification unit of afterbody whether internal storage location afterbody to be discharged crosses the border, as cross the border and then finish;
F6) be zero as the content that the head pointer data structure normally then is set, the releasing memory unit;
F7) releasing memory operable lock.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2004100448724A CN1304951C (en) | 2004-05-28 | 2004-05-28 | Internal memory protective method for digital signal processing telecommunicating applied system |
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| CNB2004100448724A CN1304951C (en) | 2004-05-28 | 2004-05-28 | Internal memory protective method for digital signal processing telecommunicating applied system |
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| CN1584845A true CN1584845A (en) | 2005-02-23 |
| CN1304951C CN1304951C (en) | 2007-03-14 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101685421B (en) * | 2008-09-24 | 2011-11-23 | 大唐移动通信设备有限公司 | Method and device for acquiring digital signal processor (DSP) memory |
| CN102543164A (en) * | 2011-12-29 | 2012-07-04 | 北京控制工程研究所 | Spacecraft DSP chip data protection method |
| CN102541748A (en) * | 2011-12-28 | 2012-07-04 | 青岛海信宽带多媒体技术有限公司 | Memory protection method |
| CN104850505A (en) * | 2015-05-26 | 2015-08-19 | 左应鹏 | Memory management method and system based on chain type stacking |
| CN105608017A (en) * | 2015-12-11 | 2016-05-25 | 中国航空工业集团公司西安航空计算技术研究所 | Control circuit and method for memory |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0872798A1 (en) * | 1997-03-21 | 1998-10-21 | CANAL+ Société Anonyme | Computer memory organization |
| CN100346319C (en) * | 2003-03-07 | 2007-10-31 | 张有成 | BIOS layer based linux hard disk data backup and restore method |
-
2004
- 2004-05-28 CN CNB2004100448724A patent/CN1304951C/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101685421B (en) * | 2008-09-24 | 2011-11-23 | 大唐移动通信设备有限公司 | Method and device for acquiring digital signal processor (DSP) memory |
| CN102541748A (en) * | 2011-12-28 | 2012-07-04 | 青岛海信宽带多媒体技术有限公司 | Memory protection method |
| CN102541748B (en) * | 2011-12-28 | 2014-06-25 | 青岛海信宽带多媒体技术有限公司 | Memory protection method |
| CN102543164A (en) * | 2011-12-29 | 2012-07-04 | 北京控制工程研究所 | Spacecraft DSP chip data protection method |
| CN104850505A (en) * | 2015-05-26 | 2015-08-19 | 左应鹏 | Memory management method and system based on chain type stacking |
| CN105608017A (en) * | 2015-12-11 | 2016-05-25 | 中国航空工业集团公司西安航空计算技术研究所 | Control circuit and method for memory |
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| Publication number | Publication date |
|---|---|
| CN1304951C (en) | 2007-03-14 |
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Granted publication date: 20070314 Termination date: 20190528 |