CN1584844A - On-line updating method and apparatus of single-chip apparatus - Google Patents
On-line updating method and apparatus of single-chip apparatus Download PDFInfo
- Publication number
- CN1584844A CN1584844A CN 03154290 CN03154290A CN1584844A CN 1584844 A CN1584844 A CN 1584844A CN 03154290 CN03154290 CN 03154290 CN 03154290 A CN03154290 A CN 03154290A CN 1584844 A CN1584844 A CN 1584844A
- Authority
- CN
- China
- Prior art keywords
- program storage
- module
- program
- chip microcomputer
- cpu
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
An on line method for up-grading monolithic computer includes spliting monolithic computer storage to be the first program storage and the second program storage, using CPU to execute basic program module in the first program storage, using CPU to write new program module in the second program storage to finalize up-grading for program module.
Description
Technical field
The present invention relates to the information processing technology, refer to a kind of single-chip microcomputer online upgrading method and apparatus especially.
Background technology
Widely apply in the electronic equipment of every profession and trade on the MCS51 Series chip basis that at home and abroad has a wide range of applications.MCS51 series monolithic and X86 series microprocessor comparatively speaking have very big difference on addressing mode, the former is that data field, program area separate addressing, and the latter is unified addressing.Because of the MCS51 series monolithic has separately addressing characteristics, it is divided into two classes with storer: data-carrier store and program storage.For this data-carrier store, the MCS51 series monolithic can be visited with the reading and writing dual mode.For this program storage, the MCS51 series monolithic also has dual mode to visit: a kind of is mode reading of data from program storage of instruction fetch operation; Another kind is mode reading of data from program storage of using " MOVC " instruction.Because the MCS51 single-chip microcomputer does not provide the write operation function to program storage, therefore can't realize renewal (writing the new procedures code) to self memory content.
But, in the electronic equipment in modern times, often need the Control Software in the refresh routine storer, to eliminate the software defect of in application process, finding or to increase new function." program on-line upgrading " this characteristic has become a basic function of numerous electronic equipments.Because the MCS51 Series chip does not provide the write operation function to program storage, how to realize that " program on-line upgrading " function of MCS51 series monolithic becomes a great problem of puzzlement industry.
In the prior art, indivedual MCS51 single-chip microcomputer manufacturers have designed a kind of MCS51 series monolithic that has from the function of programming.Method is that one section special code that the storer of singlechip is programmed (being separate procedure) is provided in advance, before dispatching from the factory this special code is deposited in the ad-hoc location of this Single Chip Microcomputer (SCM) program storer; User program is realized the function of writing to self program storage by calling this special code.
Obviously, there is following shortcoming in above-mentioned prior art:
1, versatility is poor: this special code must be applied to the single-chip microcomputer of particular vendors, specific model, can't satisfy widespread demand, and concerning the user, owing to can't find alternative device, commercial poor performance, has a big risk.
2, technical risk height: because the content that above-mentioned prior art is come the refresh routine storer by " special code " in the program storage, i.e. " oneself upgrades oneself ", as during program updates, go wrong (as interference, outage etc.), then can damage function program, even cause entire equipment to move.
Technology contents
The invention provides a kind of single-chip microcomputer online upgrading method and apparatus, to overcome the shortcoming that versatility is poor, technical risk is high that prior art exists.
For addressing the above problem, the invention provides following technical scheme:
A kind of single-chip microcomputer online upgrading method, it comprises following steps:
A, the storer of this single-chip microcomputer is divided into: be used to store the base program module first program storage, be used for second program storage of memory function program module;
CPU in b, this single-chip microcomputer carries out the base program module of described first program storage;
C, described CPU write new program module in described second program storage, finish the renewal upgrading of program module.
Wherein, the base program module of carrying out described first program storage of the CPU in the described step b single-chip microcomputer specifically comprises step:
B1, carry out System self-test, initialization;
Whether whether the functional program module of b2, described second program storage of inspection exist and be complete;
B3, check result is reported host computer;
B4, judge whether to carry out online upgrading, if not, so described CPU carries out the functional program module of described second program storage, otherwise carries out step c.
Described step c specifically comprises:
C1, described CPU are set at read-write state with described second program storage;
C2, new program module is write in described second program storage, finish the renewal upgrading of program module;
C3, described CPU are set at a read states with described second program storage.
A kind of single-chip microcomputer online upgrading device comprises the data-carrier store module, and in addition, this device also includes:
The first program storage module is used to store the program module of finishing basic operation;
The second program storage module is used to store the program module of finishing the functions of the equipments operation;
The programmable logic device (PLD) module is used to control the described first program storage module and the second program storage module;
The bus of this single-chip microcomputer links to each other with the bus of described programmable logic device (PLD) module, the first program storage module, the second program storage module and data-carrier store module, and controls the described first program storage module, the second program storage module and data-carrier store module respectively by described programmable logic device (PLD) module.
A kind of single-chip microcomputer online upgrading method and apparatus provided by the invention, the program storage of single-chip microcomputer is divided into two sub-pieces by the difference of realization function, using two different memory devices respectively realizes, that is: be used to store first program storage of the program code of finishing basic operational functions and be used to store second program storage of finishing the feature operation program code, wherein the programmable logic device (PLD) module is mapped as the second program storage module by " method of software control switching " program storage or the data-carrier store of single-chip microcomputer.Can also realize " function program " reading and writing access function by the method for calling subroutine among the first program storage BIOS to the whole spaces of the second program storage module.Specifically, the present invention mainly contains following advantage:
1), realized being the Automatic Program update functions of the electronic equipment of master control with the MCS51 series monolithic;
2), highly versatile, be applicable to all MCS51 Series chip;
3), the safe reliability height, be not afraid of influences such as interference, outage.
Introduce the present invention in detail below in conjunction with description of drawings and embodiment.
Description of drawings
Fig. 1 is the described apparatus structure synoptic diagram of the embodiment of the invention;
Fig. 2 is the described method flow diagram of the embodiment of the invention;
Fig. 3 is the method flow diagram of the described step b of the embodiment of the invention;
Fig. 4 is the method flow diagram of the described step c of the embodiment of the invention;
Fig. 5 is that the address space of the embodiment of the invention distributes synoptic diagram.
Embodiment
Be illustrated in figure 1 as the device of the described realization Single Chip Microcomputer (SCM) program of present embodiment online upgrading, it includes: single-chip microcomputer, first program storage, second program storage, data-carrier store, programmable logic device (PLD) and house dog, wherein:
Single-chip microcomputer is the MCS51 Series chip.MCS51 series monolithic RAM addressing range is that 64K byte, ROM addressing range are the 64K byte, adopts different instruction access RAM and ROM.
First program storage adopts the inner integrated program storage of FLASH device or EPROM device or single-chip microcomputer to realize, be used to deposit the function code of " fundamental procedure ", wherein comprise: the subroutine to the second following program storage carries out the reading and writing operation can be referred to as " BIOS storer ".
Second program storage adopt can online programming the FLASH device, be used to deposit " feature operation program " code, this partial code is realized every function of single board, can be referred to as " function program storer ".
Data-carrier store adopts common SRAM to get final product.
Programmable logic device (PLD), it is for being set the device of its internal logic function by the user of service, as EPLD (Erasable Programmable Logic Device: Erasable Programmable Logic Device) etc., be used to control the described first program storage module and the second program storage module.
House dog, it is used for the whether normal device of operation of monitoring singlechip CPU, and whether normally concrete model adopts MAX1232 etc., can realize the monitoring of operation to CPU, and control CPU recovers normal operation under abnormal conditions.
Certainly for the single-chip microcomputer of certain model, it not only includes the program storage of several K, also includes house dog, the part in the middle as shown in Figure 1 frame of broken lines.
Address bus, data bus and the control line of the address bus of this single-chip microcomputer, data bus and control line and described programmable logic device (PLD), first program storage, second program storage and data-carrier store, and control described first program storage, second program storage and data-carrier store respectively by described programmable logic device (PLD).
In addition, present embodiment also is provided with a host computer (not shown), is used to send user instruction, and this host computer can be common computer or other single board, and it is by serial ports or other communication mode and this single chip communication.
Introduce the allocation of space of each storer below, the program of first program storage, second program storage, data-carrier store correspondence, data space distribution condition as shown in Figure 2, two each corresponding one section program's memory spaces of program storage, size is 16K, different is the also corresponding one piece of data storage space of second program storage, size is 4K, like this, the program storage of this single-chip microcomputer is divided into: be used to store the base program code first program storage, be used for second program storage of memory function program code.
The operational process of the Board Power up of the present embodiment/back system that resets is as follows, as shown in Figure 3:
The first, the CPU in the single-chip microcomputer carries out the base program of described first program storage.
As shown in Figure 4, at first, this CPU moves the base program of first program storage, and promptly bios program code is realized operations such as system's (as veneer) self check and initialization;
Secondly, check whether the function program of described second program storage exists, and whether the function program of described second program storage of verification is complete;
Then, the result is reported host computer, if the result is correct, system proceeds, otherwise program reports an error, and system hangs up; Certainly, also can determine the function program whether redirect moves second program storage by the state by the fetch equipment switch in the correct back of verification;
At last, judge whether to carry out program on-line upgrading, if not, so described CPU carries out the function program of described second program storage, promptly jump to second program storage operation " function program " code according to " host computer " instruction, otherwise carry out next step, promptly host computer does not send jump instruction but sends " function program renewal " instruction, carries out next step this moment.
The second, described CPU writes program code in described second program storage, finishes the renewal (upgrading) of program code;
As shown in Figure 5, the CPU of this single-chip microcomputer receives " function program renewal " instruction that host computer sends, and controls described second program storage by described programmable logic device (PLD).Particularly, as shown in Figure 1, the chip selection signal of described second program storage is provided by programmable logic device (PLD), thereby selected second program storage is the current effective program storage, the reading and writing operation signal of same second program storage and high-order address signal are also provided by programmable logic device (PLD), and the address signal of low level is controlled by the address bus of CPU control; As shown in Figure 2, in programmable logic device (PLD), program memory ROM space 8000H-BFFFH and data-carrier store ram space F000H-FFFFH are all mapped to the chip selection signal of second program storage (FLASH), can be with these program memory space and data memory space and the binding of this second program storage.Being provided with one in addition in programmable logic device (PLD) can be by the selection signal of CPU control, by the state determination procedure storage space of selecting signal still is that the mapping of data memory space is effective, thereby can realize the renewal of " the function program code " of second program storage.
CPU is provided with this second program storage by programmable logic device (PLD) and is " RAM " (being called " signal is selected in mapping "), i.e. " function program renewal " mode, this moment, the read-write of this CPU linked to each other by the read-write of programmable logic device (PLD) with this second program storage, the address signal of CPU links to each other with the low address signal of this second program storage, the high address of this second program storage is set by programmable logic device (PLD) under the control of CPU, then be the above address signal of 4K as shown in Figure 2, like this, program code in first program storage is mapped as this second program storage by programmable logic device (PLD) the RAM of this Single Chip Microcomputer (SCM) system, choose the FLASH space of 4K wherein then, carry out the RAM read-write operation of corresponding space, thereby the program code that CPU sends the host computer that receives writes in second program storage, realizes the Single Chip Microcomputer (SCM) program online upgrading.
After the Single Chip Microcomputer (SCM) program online upgrading was finished, the function program that can be again jumps in second program storage according to the instruction of host computer continued operation, at this moment:
CPU is provided with this second program storage by programmable logic device (PLD) and is " ROM ", i.e. " function program execution " mode, this CPU /the PSEN signal links to each other by the read signal of programmable logic device (PLD) with this second program storage, the write signal of this second program storage is set to " high level " by programmable logic device (PLD), make " writing " state invalid, promptly the content of this second program storage is readable, but cannot change, the address signal of CPU links to each other with the low address signal of this second program storage, the high address (being the address signal more than the 64K) that by programmable logic device (PLD) this second program storage is set under the control of CPU connects " low level ", like this, this second program storage (FLASH) of CPU has just been become its a slice " program storage ".Like this, the program code in first program storage is mapped as the ROM of this Single Chip Microcomputer (SCM) system by programmable logic device (PLD) with this second program storage, and relevant position instruction fetch code and the operation that goes to second program storage by jump instruction gets final product then.
After using the embodiment of the invention, when single-chip microcomputer executive routine online upgrading function: as be interfered back program interrupt operation or program fleet, can be by the watchdog circuit single-chip microcomputer that resets, program code after resetting in operation first program storage can detect " function program " existing problems, re-executes " online upgrading " function and then can eliminate fault; As run into situation such as outage, identical operations above can carrying out after then veneer re-powers; This watchdog circuit belongs to prior art, does not repeat them here.
In addition, fixing address is mostly used in each entry address of interrupting of single-chip microcomputer, and for example address such as 0003H, 000BH can be moved to the first program storage instruction fetch after promptly singlechip interruption takes place regularly.Can utilize interruption can do following processing for making " function program " in second program storage:
1, in second program storage, distributes fixing storage start address for each interrupt handling routine;
2, the interrupt handling routine in first program storage beginning adds the code of judging CPU running status (promptly moving base program or function program), and decision is to carry out interrupt handling routine in the base program, still jump to corresponding interrupt handling routine operation in second program storage according to the CPU running status.
And judgement CPU running status can be used " signal is selected in the mapping of second program storage " in the programmable logic device (PLD); Or method such as running status sign is set in SRAM realizes.
What deserves to be mentioned is that as shown in Figure 2, CPU has used 16K space among the second program storage FLASH as its " program storage ", the storage space of FLASH is all greater than 16K generally speaking.For other data that not can be used for storing veneer/function program as the FLASH space of " program storage ".But when CPU operation " function program ", FLASH is mapped as ROM and can't realizes the reading and writing of other free space of FLASH are operated, and can realize the use of function program to other storage unit of FLASH by following way in fact:
1, a fixed address in the first program storage storage area begins the subroutine of storage operation FLASH;
2, call the FLASH function subprogram of the first program storage storage area after " function program " is ready to correlation parameter when needs operation FLASH;
3, the FLASH function subprogram of the first program storage storage area at first is mapped as RAM with FLASH, finishes associative operation according to parameter then;
4, this FLASH function subprogram is mapped as ROM with FLASH at last, is back to function program district appropriate address and continues operation.
Claims (5)
1, a kind of single-chip microcomputer online upgrading method is characterized in that the method includes the steps of:
A, the storer of this single-chip microcomputer is divided into: be used to store the base program module first program storage, be used for second program storage of memory function program module;
CPU in b, this single-chip microcomputer carries out the base program module of described first program storage;
C, described CPU write new program module in described second program storage, finish the renewal upgrading of program module.
2, single-chip microcomputer online upgrading method according to claim 1 is characterized in that the base program module that the CPU in the described step b single-chip microcomputer carries out described first program storage specifically comprises step:
B1, carry out System self-test, initialization;
Whether whether the functional program module of b2, described second program storage of inspection exist and be complete;
B3, check result is reported host computer;
B4, judge whether to carry out online upgrading, if not, so described CPU carries out the functional program module of described second program storage, otherwise carries out step c.
3, single-chip microcomputer online upgrading method according to claim 1 is characterized in that described step c specifically comprises:
C1, described CPU are set at read-write state with described second program storage;
C2, new program module is write in described second program storage, finish the renewal upgrading of program module;
C3, described CPU are set at a read states with described second program storage.
4, a kind of device of single-chip microcomputer online upgrading comprises the data-carrier store module, it is characterized in that, this device also includes:
The first program storage module is used to store the program module of finishing basic operation;
The second program storage module is used to store the program module of finishing the functions of the equipments operation;
The programmable logic device (PLD) module is used to control the described first program storage module and the second program storage module;
The bus of this single-chip microcomputer links to each other with the bus of described programmable logic device (PLD) module, the first program storage module, the second program storage module and data-carrier store module, and controls the described first program storage module, the second program storage module and data-carrier store module respectively by described programmable logic device (PLD) module.
5, the device of single-chip microcomputer online upgrading as claimed in claim 1 is characterized in that, the described second program storage module adopts the Flash storer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031542905A CN100351797C (en) | 2003-08-19 | 2003-08-19 | On-line updating method and apparatus of single-chip apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031542905A CN100351797C (en) | 2003-08-19 | 2003-08-19 | On-line updating method and apparatus of single-chip apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1584844A true CN1584844A (en) | 2005-02-23 |
| CN100351797C CN100351797C (en) | 2007-11-28 |
Family
ID=34597962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB031542905A Expired - Fee Related CN100351797C (en) | 2003-08-19 | 2003-08-19 | On-line updating method and apparatus of single-chip apparatus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100351797C (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100357893C (en) * | 2006-07-17 | 2007-12-26 | 华为技术有限公司 | Terminal staging method and system |
| CN100384122C (en) * | 2005-05-25 | 2008-04-23 | 深圳创维数字技术股份有限公司 | On-line promotion method for network terminal product |
| CN102081543A (en) * | 2011-01-25 | 2011-06-01 | 冉红 | Online upgrading method of LED (light emitting diode) display control system |
| CN102402444A (en) * | 2011-11-15 | 2012-04-04 | 北京世纪瑞尔技术股份有限公司 | Remote upgrading method for software |
| CN102637009A (en) * | 2012-04-25 | 2012-08-15 | 山东省计算中心 | Online programmable controller and implementation method thereof |
| CN101685401B (en) * | 2008-09-22 | 2013-07-24 | 中国科学院计算技术研究所 | Remote wireless programming method and chip for supporting remote wireless programming |
| CN103530140A (en) * | 2012-07-06 | 2014-01-22 | 河南思维自动化设备股份有限公司 | Online programming system for early-stage single chip microcomputer system and method thereof |
| CN103809995A (en) * | 2012-11-15 | 2014-05-21 | 海尔集团公司 | Single chip microcomputer as well as online upgrading method and online upgrading method of single chip microcomputer |
| CN105354061A (en) * | 2015-11-05 | 2016-02-24 | 邦彦技术股份有限公司 | Method and system for protecting MCU working program |
| CN105426318A (en) * | 2015-11-12 | 2016-03-23 | 宁波伟依特照明电器有限公司 | RAM addressing method for PIC (peripheral interface controller) |
| CN107301068A (en) * | 2017-06-12 | 2017-10-27 | 合肥众志行云科技有限公司 | One-to-many wireless program upgrade-system and method on a kind of single-chip microcomputer |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001024014A1 (en) * | 1999-09-27 | 2001-04-05 | Zf Micro Devices, Inc. | Embedded computer system and method with flash memory interface |
| CN100426220C (en) * | 2001-12-29 | 2008-10-15 | 中兴通讯股份有限公司 | Device for realizing software down loading using single-chip processor in communication system and its method |
| CN1512336A (en) * | 2002-12-28 | 2004-07-14 | 深圳市中兴通讯股份有限公司 | 8051 monolithic system upgrading method and monitoring circuit |
-
2003
- 2003-08-19 CN CNB031542905A patent/CN100351797C/en not_active Expired - Fee Related
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100384122C (en) * | 2005-05-25 | 2008-04-23 | 深圳创维数字技术股份有限公司 | On-line promotion method for network terminal product |
| CN100357893C (en) * | 2006-07-17 | 2007-12-26 | 华为技术有限公司 | Terminal staging method and system |
| CN101685401B (en) * | 2008-09-22 | 2013-07-24 | 中国科学院计算技术研究所 | Remote wireless programming method and chip for supporting remote wireless programming |
| CN102081543A (en) * | 2011-01-25 | 2011-06-01 | 冉红 | Online upgrading method of LED (light emitting diode) display control system |
| CN102402444A (en) * | 2011-11-15 | 2012-04-04 | 北京世纪瑞尔技术股份有限公司 | Remote upgrading method for software |
| CN102637009A (en) * | 2012-04-25 | 2012-08-15 | 山东省计算中心 | Online programmable controller and implementation method thereof |
| CN103530140A (en) * | 2012-07-06 | 2014-01-22 | 河南思维自动化设备股份有限公司 | Online programming system for early-stage single chip microcomputer system and method thereof |
| CN103809995A (en) * | 2012-11-15 | 2014-05-21 | 海尔集团公司 | Single chip microcomputer as well as online upgrading method and online upgrading method of single chip microcomputer |
| CN105354061A (en) * | 2015-11-05 | 2016-02-24 | 邦彦技术股份有限公司 | Method and system for protecting MCU working program |
| CN105426318A (en) * | 2015-11-12 | 2016-03-23 | 宁波伟依特照明电器有限公司 | RAM addressing method for PIC (peripheral interface controller) |
| CN105426318B (en) * | 2015-11-12 | 2018-12-25 | 宁波伟依特照明电器有限公司 | A kind of RAM addressing method of PIC single chip microcomputer |
| CN107301068A (en) * | 2017-06-12 | 2017-10-27 | 合肥众志行云科技有限公司 | One-to-many wireless program upgrade-system and method on a kind of single-chip microcomputer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100351797C (en) | 2007-11-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102792285B (en) | For the treatment of the apparatus and method of data | |
| US7676632B2 (en) | Partial cache way locking | |
| CN100351797C (en) | On-line updating method and apparatus of single-chip apparatus | |
| Vijaykumar et al. | A case for richer cross-layer abstractions: Bridging the semantic gap with expressive memory | |
| CN1235148C (en) | Method and system for managing virtualized physical storage in data processor | |
| US20040117594A1 (en) | Memory management method | |
| CN1227593C (en) | Storage controller and method and system for managing virtualized physical storage in processor | |
| CN105103144A (en) | Apparatuses and methods for adaptive control of memory | |
| CN1084896C (en) | Apparatus for flushing contents of cache memory | |
| CN1834950A (en) | Multicore processor having active and inactive execution cores | |
| CN1825283A (en) | Method for implementing hardware image starting optimizing of embedded operating system | |
| CN1991808A (en) | Method and apparatus for a guest to access a memory mapped device | |
| CN110825319A (en) | Memory system and method of operation for determining availability based on block status | |
| CN1556474A (en) | On line upgrading method of software and its device | |
| CN101059777A (en) | Technique for using memory attributes | |
| CN102985910A (en) | GPU support for garbage collection | |
| CN1489059A (en) | Method and system for managine virtualized physical stroage in multiple processor system | |
| CN1249463A (en) | Microcomputer provided with flash memory and its program store method | |
| CN1430142A (en) | Device for realizing software down loading using single-chip processor in communication system and its method | |
| CN1912833A (en) | Embedded operation system driver dynamic update method | |
| KR20090096721A (en) | Configurable cache for a microprocessor | |
| CN101064192A (en) | System and method for accessing not-and flash memory | |
| CN113487006B (en) | Portable artificial intelligence auxiliary computing equipment | |
| CN1302390C (en) | Method and apparatus for using NOT-AND flash as system memory | |
| CN1694069A (en) | System and method for configuring a computer system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20071128 Termination date: 20150819 |
|
| EXPY | Termination of patent right or utility model |