CN1567913A - A multi-speed optical signal interface board - Google Patents
A multi-speed optical signal interface board Download PDFInfo
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- CN1567913A CN1567913A CN 03131984 CN03131984A CN1567913A CN 1567913 A CN1567913 A CN 1567913A CN 03131984 CN03131984 CN 03131984 CN 03131984 A CN03131984 A CN 03131984A CN 1567913 A CN1567913 A CN 1567913A
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Abstract
The invention is a multirate optical signal interface board compatible with 10G and four-channel 2.5G transmission system in data communication field, including SDH frame structure processor, backboard interface module and also custom optical interface module; it does not change the clock and data pins defined by multi-source protocol organization as well as other defined control and analog pins in the custom optical interface module; it uses FFU pin of MSA300Pin receiving region as the channels 1-4 of the four-channel 2.5G transmission system to receive the clock signal; it uses FFU and NUC pins near to MSA300Pin transmitting region as the channels 1-4 of the four-channel 2.5G transmission system to transmit the clock signal. By reasonably defining the MA300Pin, it can make better pin arrangement on the multirate custom optical interface module. According to different requirements, it can combine the same single plate, and various single or multiple -rate optical interface module into a single plate with multiple functions, largely increasing the production efficiency of single plate, adds functions and simultaneously reduces the kinds of the single plate, and it is flexible to network and simple and convenient to upgrade.
Description
Technical field
The present invention relates to the data communication field, relate in particular to many speed optical signal interface plate.
Background technology
Along with people's increasing sharply to the data communication need, also development fast in the more and more higher requirement of people of data communication system, from early stage PDH (Pseudo-synchronous Digital Hierarchy) (PDH, Plesiochronous digitalhierarchy), to synchronous digital hierarchy (SDH, Synchronous digital hierarchy) and dense wave division multipurpose (DWDM, Dense Wavelength-division multiplexing) system, transmission speed is more and more higher, capacity is also increasing, the actual demand of having satisfied the user of becoming better and better.In the 10G transmission system of extensive use at present, multi-source agreement tissue (MSA tissue, Multi-source Agreementgroup, the tissue of initiating by main optical repeater manufacturers of Agere, Agilent, Alcatel etc. 11 family) pin of the optical repeater (being Transponder) that is used for the 10G transmission rate has been done definition, in this definition, the optical repeater of 10G transmission rate comprises 300 pins, is referred to as the MSA300Pin definition.In fact, MSA300Pin definition can also be widely used in DWDM and based on SONET/SDH (SONET:Synchronousoptical network, Synchronous Optical Network, do not have essential distinction with SDH) the short distance of TDM (Time divisionmultiplexing, time division multiplexing) transmission system and long apart from (IR﹠amp; LR, IR:InterconnectionReach, LR:Long Reach) application, ATM over SONET/SDH (ATM:Asynchronous transfermode Asynchronous Transfer Mode, a kind of data transmission method commonly used, ATM over SONET/SDH installs to a kind of means of transmitting in the frame format of SDH to sealing of ATM mode) and application scenario such as add-drop multiplexer (ADM, Addand drop multiplexer) system, 10,000,000,000 router/switch, optical cross connect system, 10G Ethernet transmission system.The 300PIN 10G speed optical repeater that is used for SDH that uses all meets the MSA300Pin definition at present.
Existing multichannel 2.5G and other speed optical interface plate, substantially all be that each road optical module directly is installed on veneer, and on veneer, place multiplexing demultiplexing device spare (MUX/DEMUX realizes the function that the low speed signal of multidiameter delay is multiplexed into one road high speed signal and one road high speed signal is demultiplexed into the low speed signal of multidiameter delay respectively) and other devices.As shown in Figure 1, Optical Line Board OL is directly received light signal by optical fiber, finish photoelectric converting function by optical module, and a signal of telecommunication of high speed is given the demultiplexing chip, realize the demultiplexing function by the demultiplexing chip, for example, in the application of 2.5G transmission rate, be the road serial 2.5G conversion of signals of sending into 4 tunnel parallel 622M signal or 16 tunnel parallel 155M signal outputs normally.The parallel signal of these relative low speed will be sent into SDH frame structure processor (being FRAMER) then, in this function such as extraction of finishing frame alignment, pointer adjustment, section overhead and the path overhead of SDH, be organized into then with system and keep the data in synchronization signal to offer the backboard side interface.Signal that the backboard side is sent back to then is antipodal process through flow process, and at first signal is sent into SDH frame structure processor and handled, and comprises the functions such as insertion of framing and section overhead and path overhead.Signal will be sent to multiplexing chip and carry out multiplexingly then, to obtain the signal of telecommunication at a high speed and to send into optical module and realize the electric light conversion, send into optical fiber thereby obtain light signal.
Because the optical module kind of 2.5G transmission rate is a lot of at present, the difference of encapsulated type is also bigger.According to prior art, though can arrange the position relation between each optical module and other device flexibly, but a lot of shortcomings have but inevitably been brought: at each new functional requirement of user's proposition, optical module kind of perhaps every replacing, must once change plate completely to the monoblock veneer, not only workload is very big, more is unfavorable for the batch process of many speed optical signal interface plate, and efficient is very low.
Summary of the invention
The objective of the invention is to overcome exist in the prior art be not suitable for batch process, veneer function singleness, the not high shortcoming of efficient, to make full use of existing resource, improve the veneer utilance, and reduce mass production cost, realize the multiple function of same veneer.
For achieving the above object, the present invention has constructed many speed optical signal interface plate of a kind of 10G of being compatible with transmission system and four road 2.5G transmission systems, comprises SDH frame structure processor, backplane interface module, it is characterized in that, also comprises self-defined optical interface module;
In the pin of described self-defined optical interface module, organize defined clock pin and data pins for multi-source agreement, and other various control pins and analog quantity pins of having defined will not change all; FFU (FOR FUTURE USE is for using in the future) pin with the MSA300Pin receiving area uses as four road 2.5G transmission systems the 1st to the 4 road receive clock signal; To use as four road 2.5G transmission systems the 1st to the No. 4 tranmitting data register signal near the FFU and NUC (NO USER CONNECTION, the no user connecting pin) pin of MSA300Pin sending zone.
Described FFU pin with the MSA300Pin receiving area is as four road 2.5G transmission systems the 1st to the 4 road receive clock signal, specifically be meant, four road 2.5G transmission system first via receive clock signal RxPOCLKP_1 and RxPOCLKN_1 use E13, the E14 pin of MSA300Pin, keep the RxPOCLKP/N compatibility with the 10G transmission system; Four road 2.5G transmission systems, the second road receive clock signal RxPOCLKP_2 and RxPOCLKN_2 choose the FFU pin of locating near RxDOUTnP/N (n=4,5,6,7); Four road 2.5G transmission system Third Road receive clock signal RxPOCLKP_3 and RxPOCLKN_3 choose the FFU pin of locating near RxDOUTnP/N (n=8,9,10,11); Four road 2.5G transmission systems the four road receive clock signal RxPOCLKP_4 and RxPOCLKN_4 choose the FFU pin of locating near RxDOUTnP/N (n=12,13,14,15).
Described will be near the FFU of MSA300Pin sending zone and NUC pin as four road 2.5G transmission systems the 1st to the No. 4 tranmitting data register signal, specifically be meant, four road 2.5G transmission system first via tranmitting data register signal TxPICLKP_1 and TxPICLKN_1 use G28, the G29 pin of MSA300PinN, keep the TxPICLKP/N compatibility with the 10G transmission system; Four road 2.5G transmission systems No. the second tranmitting data register signal TxPICLKP_2 and TxPICLKN_2 choose the FFU pin of locating near TxDINnP/N (n=4,5,6,7); Four road 2.5G transmission system Third Road tranmitting data register signal TxPICLKP_3 and TxPICLKN_3 choose the FFU pin of locating near TxDINnP/N (n=8,9,10,11); Four road 2.5G transmission systems the No. four tranmitting data register signal TxPICLKP_4 and TxPICLKN_4 choose the FFU pin of locating near TxDINnP/N (n=12,13,14,15).
The present invention can also be used for the 4x2.5G pattern with other untapped pins of MSA300Pin, line loopback LINELOOPEN, diagnosis loopback DIAGLOOPEN, many rate selection MULTIRATE_SEL being provided, receiving the reference clock rate selection, sending out signals such as reference clock rate selection, and received optical power detects RxPOWMON, laser bias current detects analog signalses such as BMON.
The present invention defines by the effective and reasonable MSA300Pin that utilizes, and the self-defined optical interface module of many speed has been made more suitable pin arranging.On this basis, can be according to different demands, utilize the combination of same veneer, various single-rate or many speed optical interfaces module to realize the veneer of multiple function, thereby improve the efficient that veneer is produced in batches greatly, when function increases, reduce the veneer kind, given full play to networking flexibility, the easy advantage of upgrading.
Description of drawings
Fig. 1 is an Optical Fiber Interface Board structural representation of the prior art.
Fig. 2 is the 10G speed 300Pin pin definition figure that multi-source agreement is organized the MSA definition.
Fig. 3 is many speed optical signal interface structure drawing of device of the present invention.
Fig. 4 is the reception one side structure figure of many speed optical signal interface device of the present invention.
Fig. 5 is the transmission one side structure figure of many speed optical signal interface device of the present invention.
Embodiment
The present invention will be further described below in conjunction with accompanying drawing.
Figure 2 shows that the MSA300Pin definition pin figure that in February, 2002, MSA tissue proposed, be divided into RECEIVER receiving unit into top) and TRANSMITTER (transmission part) part of bottom.In the definition of this 300PIN, also there are a considerable amount of FFU (for future use is for using in the future) and NUC (no userconnection, no user connects) pin.At SDH (Synchronous digital hierarchy, synchronous digital hierarchy) in the standard, having defined multiple standards speed, is respectively STM-1 (155.52M), TM-4 (622.08M), STM-16 (2488.32M), STM-64 (9.95328G), STM-256 (39.81312G).And corresponding these several speed of SONET also have the standard of oneself, are respectively STS3, STS12, and STS48, STS192, several speed of STS768 and SDH are equal fully.Along with the fast development of asic technology, there has been the SDH frame structure processor of many companies exploitation that STS192 and 4xSTS48 pattern are provided simultaneously.
The many speed optical signal interface plate that is compatible with 10G transmission system and four road 2.5G transmission systems shown in Figure 3, the optical signal interface plate that its most basic application is the 4x2.5G transmission system, this interface board are compatible with the optical signal interface plate of 10G transmission system simultaneously.Owing to temporarily do not use a lot of FFU and NUC pin in the 300PIN pin of MSA definition, so the present invention utilizes MSA300Pin to redefine the signaling interface of 4x2.5G transmission system, its design principle is: realize the pin compatibility of 10G transmission system and four road 2.5G transmission systems as far as possible, and make newly-increased clock signal pin near corresponding data-signal as far as possible.According to mentioned above principle, many speed optical signal interface plate of the present invention comprises SDH frame structure processor, backplane interface module, has also comprised self-defined optical interface module.In the pin of described self-defined optical interface module, optical interface for compatible 10G, make full use of multi-source agreement and organized the pin definitions of MSA, organize defined clock pin and data pins for multi-source agreement, and other various control pins and analog quantity pins of having defined all will not change, and guarantee the compatibility between two systems; Simultaneously, consider from now on technological development direction and the needs of different manufacturers, the multi-source agreement tissue has been reserved quite a few NUC (NO USER CONNECTION no user connecting pin) and FFU (FOR FUTURE USE is for using in the future) pin, and the present invention has made full use of above-mentioned pin.
In 10G TRANSPONDER, only need a RxPOCLK clock; And under the situation of four road 2.5G signals, row clock RxPOCLK is necessary under each road, so the present invention need utilize the RECEIVER district FFU pin of 300PIN to use as the 1st to the 4 tunnel clock signal.Wherein four road 2.5G transmission system first via receive clock signal RxPOCLKP_1 and RxPOCLKN_1 use E13, the E14 pin of 300PIN, keep the RxPOCLKP/N compatibility with the 10G transmission system; Four road 2.5G transmission systems, the second road receive clock signal RxPOCLKP_2 and RxPOCLKN_2 choose the FFU pin of locating near RxDOUTnP/N (n=4,5,6,7); Four road 2.5G transmission system Third Road receive clock signal RxPOCLKP_3 and RxPOCLKN_3 choose the FFU pin of locating near RxDOUTnP/N (n=8,9,10,11); Four road 2.5G transmission systems the four road receive clock signal RxPOCLKP_4 and RxPOCLKN_4 choose the FFU pin of locating near RxDOUTnP/N (n=12,13,14,15), as shown in Figure 4.In like manner, utilize FFU and NUC pin near the 300PIN sending zone, use as four road 2.5G transmission systems the 1st to the No. 4 tranmitting data register signal: wherein four road 2.5G transmission system first via tranmitting data register signal TxPICLKP_1 and TxPICLKN_1 use G28, the G29 pin of 300PIN, keep the TxPICLKP/N compatibility with the 10G transmission system; Four road 2.5G transmission systems No. the second tranmitting data register signal TxPICLKP_2 and TxPICLKN_2 choose the FFU pin of locating near TxDINnP/N (n=4,5,6,7); Four road 2.5G transmission system Third Road tranmitting data register signal TxPICLKP_3 and TxPICLKN_3 choose the FFU pin of locating near TxDINnP/N (n=8,9,10,11); Four road 2.5G transmission systems the No. four tranmitting data register signal TxPICLKP_4 and TxPICLKN_4 choose the FFU pin of locating near TxDINnP/N (n=12,13,14,15), as shown in Figure 5.
In addition, for making full use of additional FFU and NUC pin, for the signal under the 4x2.5G transmission mode provides line loopback LINELOOPEN, diagnosis loopback DIAGLOOPEN, many rate selection MULTIRATE_SEL, receives signal and analog signalses such as received optical power detection RxPOWMON, laser bias current detection BMON such as reference clock rate selection, a reference clock rate selection.For these expanded functions, can choose the appropriate interface definition according to concrete needs.
By many speed optical signal interface plate that the present invention constructed, change at needs under the situation of optical module kind, only need once simply change plate to the less self-defined optical interface module of size just can realize, and the monoblock veneer of needn't upgrading, thereby provide cost savings and improved production efficiency; The present invention simultaneously utilizes the redundant pin of MSA300Pin to do fully effectively definition, and the new requirement at occurring on the function reserves the part pin, thereby realizes the support to new unit.
Present FEC technology can improve transmission range by phase error correcting code before increasing part, its speed is just than the STM grade of transmission height of standard like this, according to the rules: the speed of corresponding 10G has two kinds of 10.664/10.709Gbps, and the speed of corresponding 2.5G is 2.666Gbps.Meanwhile, for using FEC (Forward ErrorCorrection forward error correction) optical interface module, also can change and realize by carrying out part, only need increase the chip that can carry out the FEC processing in the self defined interface module can finish, and needn't be as prior art, must carry out again very complicated processing such as layout, cabling to whole optical signal interface plate, so just realize the design of many speed optical signal interface very easily.Moreover, the present invention can also realize the mixing use of part FEC, the basic 2.5G optical interface of part, and need not develop a veneer again at each usage.
In addition, when the veneer of four road 2.5G transmission systems need be upgraded to the veneer of 10G transmission system, only the module that need provide for simple replacement of on the plate can realize.Thereby make networking have more flexibility.In like manner, also can difference according to demand be configured to 1 the tunnel, the 2 tunnel, the 3 tunnel, the 4 tunnel or longly mix different combinations such as use apart from, short distance module.
Claims (11)
1, a kind of many speed optical signal interface plate comprises SDH frame structure processor, backplane interface module, it is characterized in that, also comprises self-defined optical interface module;
In the pin of described self-defined optical interface module, organize defined clock pin and data pins for multi-source agreement, and other various control pins and analog quantity pins of having defined will not change all; With the FFU pin of MSA300Pin receiving area, use as four road 2.5G transmission systems the 1st to the 4 road receive clock signal; To use as four road 2.5G transmission systems the 1st to the No. 4 tranmitting data register signal near the FFU and the NUC pin of MSA300Pin sending zone.
2. a kind of many speed optical signal interface plate as claimed in claim 1, it is characterized in that, described self-defined optical interface module comprises multiplex/demultiplex chip, optical module, and the multiplex/demultiplex chip comprises the function that forward error correction is handled, and this time mouth speed is 2.666Gb/s; Allow all or part of light mouth to adopt forward error correction to handle.
3, many speed optical signal interface plate as claimed in claim 1, it is characterized in that, described FFU pin with the MSA300Pin receiving area is as four road 2.5G transmission systems the 1st to the 4 road receive clock signal, be meant that four road 2.5G transmission system first via receive clock signal RxPOCLKP_1 and RxPOCLKN_1 use E13, the E14 pin of MSA300Pin, keep the RxPOCLKP/N compatibility with the 10G transmission system; Four road 2.5G transmission systems, the second road receive clock signal RxPOCLKP_2 and RxPOCLKN_2 choose the FFU pin near the RxDOUTnP/N place; Four road 2.5G transmission system Third Road receive clock signal RxPOCLKP_3 and RxPOCLKN_3 choose the FFU pin near the RxDOUTnP/N place; Four road 2.5G transmission systems the four road receive clock signal RxPOCLKP_4 and RxPOCLKN_4 choose the FFU pin near the RxDOUTnP/N place.
4, many speed optical signal interface plate as claimed in claim 2 is characterized in that, described four road 2.5G transmission systems, the second road receive clock signal RxPOCLKP_2 and RxPOCLKN_2 close RxDOUTnP/N, the range of choice of its n value is 4,5,6 and 7.
5, many speed optical signal interface plate as claimed in claim 2, it is characterized in that, described four road 2.5G transmission system Third Road receive clock signal RxPOCLKP_3 and RxPOCLKN_3 close RxDOUTnP/N, the range of choice of its n value is 8,9,10 and 11.
6, many speed optical signal interface plate as claimed in claim 2, it is characterized in that, described four road 2.5G transmission systems the four road receive clock signal RxPOCLKP_4 and RxPOCLKN_4 close RxDOUTnP/N, the range of choice of its n value is 12,13,14 and 15.
7, many speed optical signal interface plate as claimed in claim 1, it is characterized in that, described will the use as four road 2.5G transmission systems the 1st to the No. 4 tranmitting data register signal near the FFU and the NUC pin of MSA300Pin sending zone, wherein four road 2.5G transmission system first via tranmitting data register signal TxPICLKP_1 and TxPICLKN_1 use G28, the G29 pin of MSA300PinN, keep the TxPICLKP/N compatibility with the 10G transmission system; Four road 2.5G transmission systems No. the second tranmitting data register signal TxPICLKP_2 and TxPICLKN_2 choose the FFU pin near the TxDINnP/N place; Four road 2.5G transmission system Third Road tranmitting data register signal TxPICLKP_3 and TxPICLKN_3 choose the FFU pin near the TxDINnP/N place; Four road 2.5G transmission systems the No. four tranmitting data register signal TxPICLKP_4 and TxPICLKN_4 choose the FFU pin near the TxDINnP/N place.
8, many speed optical signal interface plate as claimed in claim 6 is characterized in that, described four road 2.5G transmission systems No. the second tranmitting data register signal TxPICLKP_2 and TxPICLKN_2 close TxDINnP/N, the range of choice of its n value is 4,5,6 and 7.
9, many speed optical signal interface plate as claimed in claim 6 is characterized in that, described four road 2.5G transmission system Third Road tranmitting data register signal TxPICLKP_3 and TxPICLKN_3 close TxDINnP/N, the range of choice of its n value is 8,9,10 and 11.
10, many speed optical signal interface plate as claimed in claim 6, it is characterized in that, described four road 2.5G transmission systems the No. four tranmitting data register signal TxPICLKP_4 and TxPICLKN_4 close TxDINnP/N, the range of choice of its n value is 12,13,14 and 15.
11, many speed optical signal interface plate as claimed in claim 1, it is characterized in that, other untapped pins of MSA300Pin are used for four road 2.5G transmission systems, line loopback LINELOOPEN, diagnosis loopback DIAGLOOPEN, many rate selection MULTIRATE_SEL being provided, receiving the reference clock rate selection, sending out signals such as reference clock rate selection, and received optical power detects RxPOWMON, laser bias current detects analog signalses such as BMON.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB03131984XA CN100401728C (en) | 2003-06-21 | 2003-06-21 | A multi-speed optical signal interface board |
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| CNB03131984XA CN100401728C (en) | 2003-06-21 | 2003-06-21 | A multi-speed optical signal interface board |
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| CN1567913A true CN1567913A (en) | 2005-01-19 |
| CN100401728C CN100401728C (en) | 2008-07-09 |
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| CNB03131984XA Expired - Fee Related CN100401728C (en) | 2003-06-21 | 2003-06-21 | A multi-speed optical signal interface board |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010009647A1 (en) * | 2008-07-24 | 2010-01-28 | 中兴通讯股份有限公司 | Method and apparatus for implementing an optical interface with a plurality of velocities |
| CN104618053A (en) * | 2015-01-04 | 2015-05-13 | 北京北方烽火科技有限公司 | Signal interconnecting method based on WDM (wavelength division multiplex) and baseband unit |
| CN104717016A (en) * | 2013-12-12 | 2015-06-17 | 华为技术有限公司 | Optical module, wire card and optical communication system |
| CN106656595A (en) * | 2016-12-21 | 2017-05-10 | 深圳市恒扬数据股份有限公司 | Data transmission method and device |
| CN107908418A (en) * | 2017-12-12 | 2018-04-13 | 上海赛治信息技术有限公司 | The logical program upgrade method and optical-fibre channel bus apparatus of optical-fibre channel node card |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6567413B1 (en) * | 2001-05-18 | 2003-05-20 | Network Elements, Inc. | Optical networking module including protocol processing and unified software control |
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2003
- 2003-06-21 CN CNB03131984XA patent/CN100401728C/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010009647A1 (en) * | 2008-07-24 | 2010-01-28 | 中兴通讯股份有限公司 | Method and apparatus for implementing an optical interface with a plurality of velocities |
| CN101330328B (en) * | 2008-07-24 | 2012-07-04 | 中兴通讯股份有限公司 | Method and apparatus for implementing multi-speed optical interface |
| CN104717016A (en) * | 2013-12-12 | 2015-06-17 | 华为技术有限公司 | Optical module, wire card and optical communication system |
| CN104717016B (en) * | 2013-12-12 | 2018-03-09 | 华为技术有限公司 | A kind of optical module, line card and optical communication system |
| CN104618053A (en) * | 2015-01-04 | 2015-05-13 | 北京北方烽火科技有限公司 | Signal interconnecting method based on WDM (wavelength division multiplex) and baseband unit |
| CN104618053B (en) * | 2015-01-04 | 2017-07-07 | 北京北方烽火科技有限公司 | Signal interconnection method and Base Band Unit based on WDM |
| CN106656595A (en) * | 2016-12-21 | 2017-05-10 | 深圳市恒扬数据股份有限公司 | Data transmission method and device |
| CN107908418A (en) * | 2017-12-12 | 2018-04-13 | 上海赛治信息技术有限公司 | The logical program upgrade method and optical-fibre channel bus apparatus of optical-fibre channel node card |
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| CN100401728C (en) | 2008-07-09 |
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