CN1542772A - Method for producing tracking error signal and related equipment - Google Patents
Method for producing tracking error signal and related equipment Download PDFInfo
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Abstract
The present invention provides one method of utilizing the first analog detecting signal and the second analog detecting signal to produce one tracking error signal. The method includes adding the first analog detecting signal and the second analog detecting signal to produce one analog added signal, delaying the analog added signal with one analog delayer to produce one delayed signal, converting the delayed signal into one digital delayed signal, converting the first analog detecting signal and the second analog detecting signal into the first digital detecting signal and the second digital detecting signal, and comparing the digital delayed signal with the first digital detecting signal and the second digital detecting signal separately to produce the tracking error signal.
Description
Technical field
The present invention relates to a kind of method that in an optical memory system, produces a tracking error signal (Tracking ErrorSignal), be particularly related to a kind ofly in an optical memory system, utilize one first analog detection signal and one second analog detection signal to produce the method for this tracking error signal.
Background technology
In the middle of various optical memory system, optical pickup (Optical Pick-Up Head) is one of parts of most critical, is responsible for reading or writing of data.With the CD player is example, its basic formation as shown in Figure 1, Fig. 1 is the synoptic diagram that general CD player 10 parts constitute, and has comprised a read/write head 12, a rotation motor 14 and a mobile platform 16.Read/write head 12 accumulates in a laser beam 18 surface, formation and the close focal spot of data field size of a recording medium 20 (Record Carrier) (being discs).Discs is by rotation motor 14 driven rotary, and in ideally, focal spot is advanced along an orbital direction of data-track (track) on discs 20 surfaces, forms focal spot track 22 shown in Figure 1, to read or to write data.Read/write head 12 is connected in a mobile platform 16, mobile platform 16 aiding in literacy heads 12 carry out the track search and the rail operation is striden in execution, read/write head 12 is done suitable displacement on discs 20, the operation that read head is moved to carry out reading of data on the target track or write data.Principle with data read is an example, in simple terms, read head sends and shines after the focal spot of discs 20 reflects from discs 20 data surfaces (Information Plane), received by an optical sensor through a beam splitting system, represent 0 zone different on the data surface according to discs 20 with 1, reflected light has the different intensity of light and shade, just can convert the electric signal of height different potentials via optical sensor to.In addition, during the CD player reading of data, in order to read fast and continuously, disc must be done rotation at a high speed, because discs 20 is subject to external force, the influence of factor such as environment or temperature distributing disproportionation and be out of shape warpage a little, add that discs 20 is the recording mediums that belong to extractable and changeable, the rotation center of discs 20 may depart to some extent when rotated, therefore data-track when rotated can be up and down, right ground beat when time thes be left, cause focusing error (Focus Error) and tracking error (TrackingError) etc. and cause data to read, so the effect of read head is except producing focal spot radiation data track and detecting from the light signal of discs 20 reflections, also want focal spot to be locked on the data-track desiring to read, could be fast and reading of data continuously.
Moreover, storing quite highdensity data on Fig. 1 discs 20, the distance between data-track width and the data-track is all very little, so offset track data are just incorrect slightly when reading.Therefore the precision that laser focusing luminous point that optical read head sent and orbit centre are agreed with becomes most important key when carrying out data read.Ask for an interview Fig. 2, Fig. 2 is the synoptic diagram of an optical sensor 30 relativenesses of data-track on Fig. 1 discs 20 and read head 12.Data-track is to come record data with the tunnel mark 32 (pit) that interruption distributes, length is different, an orbital direction (Track Direction) of data-track on the arrow 34 display light discs 20 among Fig. 2, the optical sensor 30 of read head 12 promptly prolongs this orbital direction readout data signal in the data-track of discs 20.Optical sensor 30 is a four-quadrant sensor, is divided into regional A, area B, zone C, reaches region D.When each tunnel mark 32 on the data track skims over the optical sensor 30 of read head, optical sensor 30 can receive the light beam of Fig. 1 one laser beam 18 behind a little tunnel mark 32 reflections and diffraction thus, and the received light beam of foundation is positioned at this four zone (regional A in the space, B, C, D) different composition is to produce a tracking error signal (Tracking Error Signal, TE) and a focus error signal (Focus ErrorSignal, FE), tracking error signal TE represents the degree of aforementioned focal spot off-line data track, the focus (Focal Point) of the laser beam 18 that focus error signal FE representative graph 1 optical read head is sent and discs 20 data surfaces degree apart, relevant device can dynamically be adjusted the position of optical read head according to tracking error signal TE and focus error signal FE.Appeared in some pertinent literatures and the patent documentation with the known technology that produces tracking error signal TE based on above-mentioned optical sensor 30 structures.At US Patent No.4,057,833, in " Centering detection system for an apparatus forplaying optically readable record carriers ", people such as Braat have used the method for full simulation, optical sensor is produced corresponding output signal according to folded light beam different composition in the space, utilize mistiming (Time Difference) or phase differential (Phase Difference) between these output signals again, in addition comparison process is to produce tracking error signal TE.Afterwards, for increasing the precision of signal Processing, people such as Bakx are at US Patent No.6,137,755, in " Deriving a tracking error signal from a timedifference between detector signals ", utilize digital mode fully, carry out relevant signal processing operations, equally mistiming between Fig. 2 optical sensor 30 output signals or phase differential are converted into tracking error signal TE.
See also Fig. 3 about the disclosed structure of above-mentioned known patent (US Patent No.6,137,755), Fig. 3 is the functional block diagram of a known tracking error signal generation device 40.Fig. 3 tracking error signal generation device 40 includes binary signal input end (one first signal input part 42 and a secondary signal input end 44), two analog-to-digital conversion circuits (one first digitizer 46 and one second digitizer 48), a digital delay device 50, two comparison means (one first comparison means 52 and one second comparison means 54) and a signal generator 56.First signal input part 42 receives one first analog detection signal A1, secondary signal input end 44 receives one second analog detection signal A2, please contrast simultaneously and consult Fig. 2, four regional A of Fig. 2 optical sensor 30, B, C, D can according to (via tunnel mark 32 reflection and diffraction it) light beam corresponding composition in the space, produce the output signal a of four correspondences respectively, b, c, d, because Fig. 2 focal spot has departed from data-track slightly in the space, so output signal a, b, c, d separately between once-existing difference, in order to tell the degree of focal spot off-line data track in the space, the value of the first analog detection signal A1 is made as output signal a and adds output signal c (A1=a+c), and the value of the second analog detection signal A2 adds output signal d (A2=b+d) for output signal b.Please continue to consult figure three, first signal input part 42 and secondary signal input end 44 are connected to first digitizer 46 and second digitizer 48 respectively, are used for respectively the first analog detection signal A1 and the second analog detection signal A2 being converted to one first digital detection signal D1 and one second digital detection signal D2.Please consult Fig. 4 simultaneously, Fig. 4 is the sequential chart of the corresponding relation of a plurality of signals of Fig. 3.Show once-existing poor Δ between the first digital detection signal D1 and the second digital detection signal D2 among Fig. 4, represented the degree of focal spot off-line data track in the space.
As shown in Figure 3, digital delay device 50 is electrically connected on first digitizer 46, is used for the first digital detection signal D1 is made a digital delay (Td), produces a digital delay signal DR.Fig. 4 has shown the state of digital delay signal DR on time domain equally.Then the digital delay signal DR and the first digital detection signal D1 produce one first digital comparison signal DC1 through first comparison means 52, this first comparison means 52 is an XOR (Exclusive OR, XOR) logic gate, mainly can be used to parse the leading edge and the trailing edge of digital delay signal DR and the first digital detection signal D1, two signals, in like manner, the digital delay signal DR and the second digital detection signal D2 produce one second digital comparison signal DC2 through second comparison means 54 that can be an exclusive or logic gate, and the first digital comparison signal DC1 and the second digital comparison signal DC2 also are shown among Fig. 4.After first comparison means 52 and second comparison means 54, be connected to signal generator 56 jointly, in signal generator 56, the second digital comparison signal DC2 can be deducted the first digital comparison signal DC1, to produce a time difference signal DT, hereto, state according to time difference signal DT, the interlock circuit deviser can tell between the original first digital detection signal D1 and the second digital detection signal D2 and fall behind or leading relativeness, as shown in Figure 4, under the situation of present embodiment, time difference signal DT is that a negative value has represented that the first digital detection signal D1 is ahead of the second digital detection signal D2 in this clock (Clock).Again through correlation filtering function operations in signal generator 56, just produce desirable tracking error signal TE, thus, relevant design person just can dynamically accurately advance the focal spot of control chart 1 optical read head 12 according to tracking error signal TE along data-track (orbital direction shown in Fig. 2 arrow 34), finish the operation of data read.
Another disclosed structure of known patent document sees also Fig. 5, and Fig. 5 is the functional block diagram of known another tracking error signal generation device 60.Fig. 5 embodiment and Fig. 3 embodiment difference are that Fig. 5 embodiment comprises four signal input parts 62, do not carry out the program of signal combination, directly receive four regional A of Fig. 2 optical sensor 30 respectively, B, C, the output signal a of four correspondences that D produced, b, c, d, and with it respectively as the first analog detection signal A1 of tracking error signal generation device 60, the second analog detection signal A2, the 3rd analog detection signal A3, and the 4th analog detection signal A4, all the other technical characterictics are then identical with precedent, utilize digital mode fully, carry out relevant signal processing operations.Tracking error signal generation device 60 also includes four digitizers 64, be electrically connected on four signal input parts 62 respectively, be used for the first analog detection signal A1, the second analog detection signal A2, the 3rd analog detection signal A3 and the 4th analog detection signal A4 are converted to one first digital detection signal D1, one second digital detection signal D2, one the 3rd digital detection signal D3 and one the 4th digital detection signal D4 respectively.Fig. 5 embodiment comprises two digital delay devices 70, respectively the first digital detection signal D1 and the 3rd digital detection signal D3 is postponed to become one first digital delay signal DR1 and one the 3rd digital delay signal DR3.Similar to Fig. 3, through four comparison means 68 (exclusive or logic gate), relatively the first digital delay signal DR1 and the first digital detection signal D1 produce one first digital comparison signal DC1 respectively; Relatively the first digital delay signal DR1 and the second digital detection signal D2 produce one second digital comparison signal DC2, comparison the 3rd digital delay signal DR3 and the 3rd digital detection signal D3 produce one the 3rd digital comparison signal DC3 and relatively the 3rd digital delay signal DR3 and the 4th digital detection signal D4 to produce one the 4th digital comparison signal DC4, at last again through a signal generator 66 with four digital comparison signal do plus-minus make up (is DC2+DC4-DC1-DC3 at present embodiment) also handled after generation tracking error signal TE.
Though above-mentioned known structure and the method that is used for producing tracking error signal TE is verified widely and uses, but still there are many problems and are badly in need of improved space, at first, in Fig. 3 embodiment, have only the delay of the first digital detection signal D1 through digital delay device 50, and will be through the first digital detection signal D1 that postpones simultaneously as the first digital detection signal D1 and the second digital detection signal D2 comparative standard, and ignored consideration and the comparative standard of the second digital detection signal D2 also being included in delay, thus, under some specific situation, can cause the while in the uneven effect of carrying out between two rails of signal Processing, this effect can be more obvious at Fig. 5 embodiment.Moreover, when the CD player rotating speed changes, (this data-signal can be considered four regional A of Fig. 2 to data (RF) signal that Fig. 2 optical sensor 30 is read, B, C, the output signal a of four correspondences that D produced, b, c, the summation of d) frequency also in response to and change, digital delay device (50 among the known embodiment, 70) also must corresponding change its time delay, therefore be that the digital delay device 70 of the digital delay device 50 of Fig. 3 or Fig. 5 all must be external again or the adjustment circuit (TuningCircuit) of a built-in digital delaying circuit, go to judge accurate and suitable time delay in response to different frequency data signals, this has suitable difficulty to Design of Digital Circuit itself, significantly increase the circuit area of digital delay device easily, more can cause sizable burden tracking error signal generation device and overall optical stocking system.
Summary of the invention
Therefore fundamental purpose of the present invention is to provide a kind of one first analog detection signal and method and the relevant apparatus of one second analog detection signal to produce a tracking error signal of utilizing in an optical memory system, to address the above problem.
In the present invention disclosed method and structure, we utilize an ADU analog delay unit to finish the operation of delayed analog signal, this ADU analog delay unit can be a balanced device (Equalizer) and is electrically connected a digitizer, a hysteresis circuitry (Relay) or balanced device is electrically connected hysteresis circuitry to finish jointly, so can adjustment external or a built-in digital delaying circuit can do suitable time delay in response to different frequency data signals.Moreover, in company with the synthesizer in the system of the present invention, a plurality of analog detection signals that the optical sensor zones of different is produced give finishing through ADU analog delay unit of the present invention after the addition operation of delayed analog signal again, to all include in corresponding to a plurality of analog detection signals of zones of different in the space and postpone and comparative standard, can improve the uneven effect between signal, also can make the susceptibility reduction of structure of the present invention accuracy time delay.
Purpose of the present invention is for providing a kind of one first analog detection signal and one second analog detection signal of utilizing to produce the method for a tracking error signal (Tracking Error Signal), and it includes becomes a simulation sum signal with this first analog detection signal and this second analog detection signal addition; Use an ADU analog delay unit should simulate sum signal and postpone to become an inhibit signal; It is a digital delay signal that this inhibit signal is digitized into; This first analog detection signal and this second analog detection signal are converted to one first digital detection signal and one second digital detection signal respectively; And this digital delay signal produced this tracking error signal with this first digital detection signal and this second digital detection signal through a compare operation (Comparing Operation) respectively.
The present invention produces the method for a tracking error signal (Tracking Error Siganl), comprise the following step (a) and receive one via the light beam behind a recording medium (Record Carrier) reflection and the diffraction, this light beam is to advance with the orbital direction on this recording medium (Track Direction) according to this tracking error signal; (b) after carrying out step (a), according to received this light beam a plurality of different compositions (Portion) in the space, produce one first analog detection signal and one second analog detection signal, wherein once-existing difference (Time Difference) between this first analog detection signal and this second analog detection signal; (c) after carrying out step (b), respectively this first analog detection signal and this second analog detection signal are converted to one first digital detection signal and one second digital detection signal; (d) after carrying out step (b), this first analog detection signal and this second analog detection signal addition are become a simulation sum signal; (e) after carrying out step (d), should simulate sum signal becomes an inhibit signal through a delay operation (Delay Operation); (f) after carrying out step (e), it is a digital delay signal that this inhibit signal is digitized into; And (g) after carrying out step (e) and step (f), with this digital delay signal respectively with this first digital detection signal and this second digital detection signal through a compare operation (Comparing Operation), to produce this tracking error signal.
Another object of the present invention is for providing a kind of tracking error signal generation device (Tracking ErrorSignal Generator), it is used for an optical memory system and is used for producing a tracking error signal, this tracking error signal generation device includes the binary signal end for process, be used for providing respectively one first analog detection signal and one second analog detection signal, wherein once-existing difference (Time Difference) between this first analog detection signal and this second analog detection signal; One synthesizer is connected in this binary signal end for process, is used for this first analog detection signal and this second analog detection signal are synthesized a simulation sum signal; One ADU analog delay unit is electrically connected on this synthesizer, and being used for this simulation sum signal is postponed and is digitized into is a digital delay signal; Two digitizers are electrically connected on this binary signal end for process respectively, are used for this first analog detection signal and this second analog detection signal are converted to one first digital detection signal and one second digital detection signal respectively; And a comparison module, be electrically connected on this deferred mount and this two digitizer, be used for this digital delay signal is produced this tracking error signal with this first digital detection signal and this second digital detection signal respectively after a compare operation.
Tracking error signal generation device of the present invention includes four signal ends, is used for providing respectively one first analog detection signal, one second analog detection signal, one the 3rd analog detection signal and one the 4th analog detection signal; One synthesizer is electrically connected on this four signal Processing end, is used for that this first analog detection signal, this second analog detection signal, the 3rd analog detection signal and the 4th analog detection signal are synthesized a simulation and adds resultant signal; One ADU analog delay unit is electrically connected on this synthesizer, and being used for this simulation is added up signal delay and is digitized into is that a digital delay adds resultant signal; Four digitizers, be electrically connected on this four signal end respectively, be used for this first analog detection signal, this second analog detection signal, the 3rd analog detection signal and the 4th analog detection signal are converted to one first digital detection signal, one second digital detection signal, one the 3rd digital detection signal and one the 4th digital detection signal respectively; An and comparison module, be electrically connected on this ADU analog delay unit and this four digitizer, be used for that this digital delay is added resultant signal and after a compare operation, produce this tracking error signal with this first digital detection signal, this second digital detection signal, the 3rd digital detection signal and the 4th digital detection signal respectively.
Description of drawings
Fig. 1 is the synoptic diagram of general CD player part-structure.
Fig. 2 is the synoptic diagram of an optical sensor relativeness of the data-track read head on Fig. 1 discs.
Fig. 3 is the functional block diagram of known tracking error signal generation device one embodiment.
Fig. 4 is the sequential chart of the corresponding relation of a plurality of signals among Fig. 3.
Fig. 5 is the functional block diagram of known another embodiment of tracking error signal generation device.
Fig. 6 is the functional block diagram of tracking error signal generation device one embodiment of the present invention.
Fig. 7 is the process flow diagram of the present invention one method embodiment.
Fig. 8 is the functional block diagram of Fig. 6 tracking error signal generation device one specific embodiment.
Fig. 9 is the sequential chart of the corresponding relation of a plurality of signals among Fig. 8.
Figure 10 is the functional block diagram of another embodiment of tracking error signal generation device of the present invention.
Figure 11 is the functional block diagram of Figure 10 embodiment one specific embodiment.
Figure 12 is the functional block diagram of the another embodiment of tracking error signal generation device of the present invention.
The reference numeral explanation
10 CD player, 12 read/write heads
14 rotation motors, 16 mobile platforms
18 laser beams, 20 recording mediums
22 focal spot tracks, 30 optical sensors
32 tunnel marks, 34 orbital directions
40,60,80,100,120 tracking error signal generation device
42 first signal input parts
44 secondary signal input ends, 46,86 first digitizers
48,88 second digitizers, 50,70 digital delay devices
52,92 first comparison means, 54,94 second comparison means
56,66 signal generators, 62 signal input parts
64,104,124 digitizers
68,128 comparison means, 81 first Hi-pass filters
82 first signal Processing ends, 83 second Hi-pass filters
84 secondary signal end for process, 85,105 synthesizers
87,107 totalizers, 89,109 balanced devices
90,110 ADU analog delay units
91,111,131 hysteresis circuitry
93,113 comparison modules
96,116,136 arithmetical unit
98,118,138 low-pass filters
102,122 signal Processing ends
103,123 Hi-pass filters
Embodiment
Method that the present invention is disclosed and structure also are based on optical sensor 30 structures of above-mentioned Fig. 2 to produce a tracking error signal FE, see also Fig. 6, and Fig. 6 is the functional block diagram of an embodiment of tracking error signal generation device 80 of the present invention.Tracking error signal generation device 80 is to be used for an optical memory system to be used for producing a tracking error signal TE, and it includes one first signal Processing end 82, a secondary signal end for process 84, a synthesizer 85, an ADU analog delay unit 90, first digitizer 86, second digitizer 88 and a comparison module 93.First and second signal Processing end 82,84 provide one first analog detection signal A1 and one second analog detection signal A2 respectively, contrast four regional A in Fig. 2 optical sensor 30, B, C, D produces the output signal a of four correspondences, b, c, d, the first analog detection signal A1 adds the value (A1=a+c) of output signal c corresponding to output signal a, and the second analog detection signal A2 is the value (A2=b+d) that adds output signal d corresponding to output signal b, as long as Fig. 1 read/write head 12, the advancing of Fig. 2 optical sensor 30 grades depart from the data-track desiring to read, be once-existing difference (Time Difference) between the first analog detection signal A1 and the second analog detection signal A2.One of important technology feature of tracking error signal TE generation device 80 of the present invention promptly comprises the synthesizer 85 that is electrically connected on binary signal end for process 82,84, can be used to the first analog detection signal A1 and the second analog detection signal A2 are synthesized a simulation sum signal MA.Next, the setting that another important technology feature of the present invention is an ADU analog delay unit 90, ADU analog delay unit 90 is electrically connected on synthesizer 85, to simulate sum signal MA delay and be digitized into is a digital delay signal DR, and first and second digitizer 86,88 also are electrically connected on binary signal end for process 82 respectively, 84, be used for the first analog detection signal A1 and the second analog detection signal A2 are converted to one first digital detection signal D1 and one second digital detection signal D2 respectively, last digital delay signal DR respectively with the first digital detection signal D1 and the second digital detection signal D2 through comparison module 93, produce tracking error signal TE after carrying out a compare operation.
Please note, the major technique of above-mentioned present embodiment tracking error signal generation device 80 be characterized as with between have a mistiming two analog detection signals (the first analog detection signal A1 and one second analog detection signal A2) resolved to produce tracking error signal TE, therefore, the first analog detection signal A1 and the second analog detection signal A2 are not defined as output signal a, b, c, the particular combinations that d is above-mentioned, meaning promptly, as long as the first analog detection signal A1 and the second analog detection signal A2 are corresponding to output signal a, b, c, the combination of d can make the mistiming that exists between two analog detection signals can reflect correctly that the degree of focal spot (laser beam that optical sensor 30 is sent is positioned at the center on the recording medium (Fig. 1 discs 20)) off-line data track gets final product, in like manner, tracking error signal generation device 80 of the present invention also is applicable to the optical sensor 30 (for example greater than the optical matrix sensor 30 of 2 * 2 specifications or be divided into the optical sensor 30 of more quadrants) of other kinds that are not Fig. 2 four-quadrant sensor.Moreover, the synthesizer 85 of present embodiment can be a totalizer (Adder), with the first analog detection signal A1 and the second analog detection signal A2 addition, two analog detection signals are all included in the analogue delay operation and compare operation afterwards of ADU analog delay unit 90, avoided the uneven effect between signal.
Then note that ADU analog delay unit 90 of the present invention use a balanced device (Equalizer) to be electrically connected a digitizer, a hysteresis circuitry (Relay) or balanced device is electrically connected hysteresis circuitry to be finished jointly.When reality is implemented, balanced device as the usefulness of signal quality control is the existing equipment of optical memory system that the present invention is suitable for, be applied to bring into play its existing function as ADU analog delay unit 90 among the present invention and adjust time delay, save the shared chip area of ADU analog delay unit 90 according to frequency data signal.And hysteresis circuitry is because of utilizing the foundation of default potential difference (PD) as time delay, therefore when the frequency height (cycle in time domain is shorter) of the data-signal of reading by recording medium (Fig. 1 discs 20) data surface, the time delay of judging also can be shorter, in like manner, during the frequency of data-signal low (cycle in time domain is longer), the time delay of judging is also longer thereupon, thus, the ADU analog delay unit 90 that utilizes hysteresis circuitry to finish, even relate to the operation of suitable high frequency, but also suitable time delay is judged on Simple Dynamic ground in response to different frequency data signals.Compare with Fig. 3 known technology, present embodiment tracking error signal generation device 80 can be considered one hybrid (Mixed) tracking error signal generation device 80, neither utilize digital mode completely, also not exclusively utilize the simulated mode operation, but simplify the operation of signal delay in the mode of analogue delay, and the precision of employing digital signal processing, produce accurate reliable tracking error signal TE.
Tracking error signal generation device 80 according to above-mentioned Fig. 6 embodiment, the present invention utilizes the first analog detection signal A1 and the second analog detection signal A2 can be summarized in the following step with a method embodiment who produces tracking error signal TE, and ask for an interview Fig. 7, Fig. 7 is the process flow diagram of one embodiment of the invention:
Step 100: the first analog detection signal A1 and the second analog detection signal A2 addition are become a simulation sum signal MA;
Step 101: use ADU analog delay unit 90 will simulate sum signal MA and postpone to become an inhibit signal AR;
Step 102: it is a digital delay signal DR that inhibit signal AR is digitized into;
Step 103: the first analog detection signal A1 and the second analog detection signal A2 are converted to the first digital detection signal D1 and the second digital detection signal D2 respectively;
Step 104: digital delay signal DR is produced tracking error signal TE with the first digital detection signal D1 and the second digital detection signal D2 respectively after comparison module 93 is carried out a compare operation (Comparing Operation).
See also Fig. 8, Fig. 8 is the functional block diagram of a specific embodiment of Fig. 6 tracking error signal generation device 80, can more clearly understand the built-in function of Fig. 6 tracking error signal generation device 80 of the present invention.By one first Hi-pass filter 81, with filtering low frequency noise and obtain the first analog detection signal A1, describe with mathematical expression and be: A1=G by its operation with the value of (being produced by Fig. 2 optical sensor 30) output signal (a+c) for the first signal Processing end 82
Hp1(a+c), G wherein
Hp1It is the transfer function of first Hi-pass filter 81.In like manner to produce the second analog detection signal A2, mathematical expression is the value of output signal (b+d) secondary signal end for process 84: A2=G by one second Hi-pass filter 83 with (being produced by Fig. 2 optical sensor 30)
Hp2(b+d), G
Hp2Be the transfer function of second Hi-pass filter 83, can with G
Hp1Identical or different.Please consult Fig. 9 this moment simultaneously, Fig. 9 is the sequential chart of the corresponding relation of a plurality of signals among Fig. 8, demonstrates the relativeness of tracking error signal TE on time domain of the first analog detection signal A1, the second analog detection signal A2, simulation sum signal MA, inhibit signal AR, digital delay signal DR, the first digital detection signal D1, the second digital detection signal D2, one first comparison signal DC1, one second comparison signal DC2, a time difference signal DT and last gained.The synthesizer 85 of Fig. 6 is finished with a totalizer 87 in Fig. 9, and the simulation sum signal MA of first and second analog detection signal A1, A2 gained after these totalizer 87 additions (and through a normalization (Normalized) processing) also is shown among 9.First and second digitizer 86,88 is converted to first and second analog detection signal A1, A2 the first digital detection signal D1 and the second digital detection signal D2 respectively, and the mathematical expression of associative operation can be described as respectively:
The ADU analog delay unit 90 of present embodiment comprises balanced device 89 and hysteresis circuitry 91 simultaneously, and simulation sum signal MA (MA=A1+A2) becomes inhibit signal AR after balanced device 89 is handled, and relationship is:
AR＝f(A1，A2，Δτ)＝G
eq(A1+A2)＝|G
ep|e
jsΔτ(A1+A2).
G wherein
EqBe the transfer function of balanced device 89, Δ τ is the time delay of balanced device 89.Inhibit signal AR produces digital delay signal DR again after hysteresis circuitry 91 is handled, relationship is:
Wherein α is predefined level.Inhibit signal AR and digital delay signal DR also all are shown among Fig. 9.Comparison module 93 comprises one first comparison means 92, one second comparison means 94, an arithmetical unit 96 and a low-pass filter 98.First and second comparison means 92,94 all is respectively an XOR (Exclusive OR, XOR) logic gate can be used to parse respectively leading edge and the trailing edge of two input signals (digital delay signal DR and the first digital detection signal D1, digital delay signal DR and the second digital detection signal D2).The digital delay signal DR and the first digital detection signal D1 can (mathematical expression: DC1=D1 xor DR), and the digital delay signal DR and the second digital detection signal D2 can be by second comparison means 94 to produce the second comparison signal DC2 (mathematical expression: DC2=D2 xor DR) to produce the first comparison signal DC1 by first comparison means 92.Arithmetical unit 96 subtracts each other the first comparison signal DC1 and the second comparison signal DC2, produces time difference signal DT, and then time difference signal DT can be by low-pass filter 98 to produce tracking error signal TE, and relationship is: TE=G
Lpf(DC1=DC2), its G
LpfTransfer function for low-pass filter 98.
After understanding major technology feature of the present invention, next all the other several important embodiment of the present invention are described in detail in detail, see also Figure 10, Figure 10 is the functional block diagram of another embodiment of tracking error signal generation device 100 of the present invention, be that with the different part of Fig. 6 embodiment present embodiment comprises four signal Processing ends 102, directly receive four regional A of optical sensor shown in Figure 2 30 respectively, B, C, the output signal a of four correspondences that D produced, b, c, d, handled with it respectively as one first analog detection signal A1, one second analog detection signal A2, one the 3rd analog detection signal A3, and one the 4th analog detection signal A4, the tracking error signal generation device 100 of present embodiment also includes a synthesizer 105, one ADU analog delay unit 110, four digitizers 104, an and comparison module 113.Synthesizer 105 is electrically connected on four signal Processing ends 102, be used for the first analog detection signal A1, the second analog detection signal A2, the 3rd analog detection signal A3, and the 4th analog detection signal A4 synthesize a simulation and add resultant signal AS, ADU analog delay unit 110 then is electrically connected on after the synthesizer 105, being used for simulation is added resultant signal AS delay and is digitized into is that a digital delay adds resultant signal DSR, simultaneously, four digitizers 104 that are electrically connected on four signal Processing ends 102 can be with the first analog detection signal A1, the second analog detection signal A2, the 3rd analog detection signal A3, and the 4th analog detection signal A4 be converted to one first digital detection signal D1 respectively, one second digital detection signal D2, one the 3rd digital detection signal D3, and one the 4th digital detection signal D4, last comparison module 113 with digital delay add resultant signal DSR respectively with the first digital detection signal D1, the second digital detection signal D2, the 3rd digital detection signal D3, and the 4th digital detection signal D4 after a compare operation, produce tracking error signal TE.
Roughly, the technical characterictic of present embodiment is similar to Fig. 6 embodiment, if contrast known embodiment in Fig. 5, a plurality of analog detection signals that present embodiment is produced Fig. 2 optical sensor 30 zoness of different are postponed and comparison after being synthesized (addition) again, can improve the uneven effect between the known technology signal, cooperate again with balanced device or hysteresis circuitry design simulation deferred mount 110, can make structure of the present invention to time delay accuracy susceptibility be low than known technology, the circuit area of ADU analog delay unit 110 shared chips is also low than the known digital deferred mount.Ask for an interview Figure 11, Figure 11 is the functional block diagram of the specific embodiment of Figure 10 embodiment.Four signal Processing ends 102 receive output signal a, b, c, the d that is produced by Fig. 2 optical sensor 30 respectively, and with it respectively by four Hi-pass filters 103, filtering low frequency noise is to obtain the first analog detection signal A1, the second analog detection signal A2, the 3rd analog detection signal A3 and the 4th analog detection signal A4 respectively, and the mathematical expression of its operation is respectively:
A1=G
Hp(a); A2=G
Hp(b); A3=G
Hp(c); A4=G
Hp(d), G wherein
HpThe transfer function of four Hi-pass filters 103 for this reason, when reality was implemented, the transfer function of four Hi-pass filters 103 needn't be identical.Next, the totalizer 107 of Figure 11, promptly the synthesizer 105 of Figure 10 becomes a simulation with the first analog detection signal A1, the second analog detection signal A2, the 3rd analog detection signal A3 and the 4th analog detection signal A4 addition and adds resultant signal AS.The ADU analog delay unit 110 of present embodiment also comprises balanced device 109 and hysteresis circuitry 111 simultaneously, and balanced device 109 can add simulation resultant signal AS and postpone to become one and postpone to add resultant signal ASR, and relationship is:
ASR=f (A1, A2, A3, A4, Δ τ)=G
Eq(A1+A2+A3+A4)=| G
Eq| e
Js Δ τ(A1+A2+A3+A4), wherein Geq is the transfer function of balanced device 109, and Δ τ is the time delay of balanced device 109.Postpone to add resultant signal ASR and produce digital delay signal DSR again after hysteresis circuitry 111 is handled, relationship is:
, wherein α is predefined level.At the same time, four digitizers 104 are respectively with first, second, third, be converted to the first analog detection signal D1, the second analog detection signal D2, the 3rd analog detection signal D3 and the 4th analog detection signal D4 with the 4th analog detection signal A1～A4, and the mathematical expression of associative operation can be described as respectively:
。Comparison module 113 comprises four comparison means 108, an arithmetical unit 116 and a low-pass filter 118.Four comparison means 108 all are respectively an exclusive or logic gate, can be used to parse respectively the leading edge and the trailing edge of two input signals.Digital delay adds resultant signal DSR and the first digital detection signal D1 and produces first after relatively and relatively add resultant signal DSC1 (mathematical expression: DSC1=D1 xor DSR); Digital delay adds resultant signal DSR and the second digital detection signal D2 and produces second after relatively and relatively add resultant signal DSC2 (mathematical expression: DSC2=D2 xorDSR); Digital delay adds resultant signal DSR and the 3rd digital detection signal D3 and produces the 3rd after relatively and relatively add resultant signal DSC3 (mathematical expression: DSC3=D3 xorDSR); Digital delay adds resultant signal DSR and the 4th digital detection signal D4 and produces the 4th after relatively and relatively add resultant signal DSC4 (mathematical expression: DSC4=D4 xor DSR).Arithmetical unit 116 relatively adds up signal plus with the first and the 3rd, and deducts the second and the 4th and relatively add resultant signal, at last by low-pass filter 118 to produce tracking error signal TE, relationship is:
TE=G
Lpf(DSC1-DSC2+DSC3-DSC4), G wherein
LpfTransfer function for low-pass filter 118.
See also Figure 12, Figure 12 is the functional block diagram of the another embodiment of tracking error signal generation device 120 of the present invention, this embodiment emphasizes to finish ADU analog delay unit 130 with a kind of hysteresis circuitry (Relay) 131 separately, basic structure proximate is in the known embodiment of Fig. 5, but still follow the wherein important technology feature of Fig. 6 to Figure 11 of the present invention, utilize this non-a kind of hybrid (Mixed) tracking error signal generation device of utilizing numeral or simulated mode operation completely, improve the problem of known technology.Identical with Figure 11 embodiment, four signal Processing ends 122 receive output signal a, b, c, the d that is produced by Fig. 2 optical sensor 30 respectively, and with it respectively by four Hi-pass filters 123, filtering low frequency noise is to obtain the first analog detection signal A1, the second analog detection signal A2, the 3rd analog detection signal A3 and the 4th analog detection signal A4 respectively, and the mathematical expression of its operation is respectively: A1=G
Hp(a); A2=G
Hp(b); A3=G
Hp(c); A4=G
Hp(d), G wherein
HpThe transfer function of four Hi-pass filters 123 for this reason.Present embodiment tracking error signal generation device 120 comprises four digitizers 124 equally, be electrically connected on four signal Processing ends 122 respectively, be used for respectively first, second, third, be converted to the first analog detection signal D1, the second digital detection signal D2, the 3rd digital detection signal D3 and the 4th digital detection signal D4 with the 4th analog detection signal A1～A4, the mathematical expression of associative operation can be described as respectively:
。Present embodiment comprises two hysteresis circuitry 131, owing to the characteristic of hysteresis circuitry 131 can be simple and easy and dynamically judge suitable time delay in response to different frequency data signals, and the digitizing in addition again of the relevant simulating signal after will postponing, therefore this two hysteresis circuitry 131 can postpone to become one first delay detection signal AR1 and one the 3rd delay detection signal AR3 with the first analog detection signal A1 and the 3rd analog detection signal A3 earlier respectively, postponing detection signal AR1 and the 3rd with first again, to postpone that detection signal AR3 is digitized into respectively be one first digital delay detection signal DR1 and one the 3rd digital delay detection signal DR3, more than describes available
Expression, and wherein a is predefined current potential standard.Next, through four comparison means 128 (exclusive or logic gate), relatively the first digital delay detection signal DR1 and the first digital detection signal D1 produce one first digital comparison signal DC1 (mathematical expression: DC1=D1 xor DR1) respectively; Relatively the first digital delay detection signal DR1 and the second digital detection signal D2 produce one second digital comparison signal DC2 (mathematical expression: DC2=D2 xor DR1); Relatively the 3rd digital delay detection signal DR3 and the 3rd digital detection signal D3 produce one the 3rd digital comparison signal DC3 (mathematical expression: DC3=D3 xor DR3); And relatively the 3rd digital delay detection signal DR3 and the 4th digital detection signal D4 to produce one the 4th digital comparison signal DC4 (mathematical expression: DC4=D4 xor DR3).One arithmetical unit 136 is done four digital comparison signals plus-minus combination (DC1+DC3-DC2-DC4), is produced tracking error signal TE through a low-pass filter 138 more at last, and relationship is: TE=G
Lpf(DC1-DC2+DC3-DC4), G wherein
KyTransfer function for low-pass filter 138.
The method that the present invention is disclosed and the structure of tracking error signal generation device are applicable to various the have optical memory system that is similar to Fig. 2 optical sensor 30, various recording medium (for example more the discs that stores of high density or multi-layer data etc.), and relevant mistiming extracting process.Compared to the prior art, at first, a plurality of analog detection signals that method of the present invention is produced the optical sensor zones of different give addition synthetic after again through the operation of signal delay and comparison, can improve the uneven effect between signal, moreover, the present invention utilizes one or more ADU analog delay units to finish the operation of delayed analog signal, in the disclosed embodiment of the present invention, be electrically connected a digitizer design simulation deferred mount with existing balanced device (Equalizer), with hysteresis circuitry design simulation deferred mount, or with the balanced device hysteresis circuitry design simulation deferred mount that is electrically connected, all can do suitable time delay in response to different frequency data signals judges, and need not need the adjustment circuit of external or a built-in digital delaying circuit as the known structure of finishing with digital form completely, thus, then can significantly reduce on the chip as the circuit area that postpones operation.
The above only is of the present invention good for embodiment, and all equalizations of doing according to claims of the present invention change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (27)
1. one kind is utilized one first analog detection signal and one second analog detection signal to produce the method for a tracking error signal, and it includes:
This first analog detection signal and this second analog detection signal addition are become a simulation sum signal;
Use an ADU analog delay unit should simulate sum signal and postpone to become an inhibit signal;
It is a digital delay signal that this inhibit signal is digitized into;
This first analog detection signal and this second analog detection signal are converted to one first digital detection signal and one second digital detection signal respectively; And
This digital delay signal is produced this tracking error signal with this first digital detection signal and this second digital detection signal through a compare operation respectively.
2. the method for claim 1, wherein this ADU analog delay unit is that a balanced device is electrically connected a digitizer or a hysteresis circuitry.
3. the method for claim 1, wherein this ADU analog delay unit is the balanced device hysteresis circuitry that is electrically connected.
4. the method for claim 1, once-existing difference between this first analog detection signal and this second analog detection signal wherein, this tracking error signal is to produce according to this mistiming.
5. the method for claim 1, it also includes:
One the 3rd analog detection signal and one the 4th analog detection signal are provided;
This first analog detection signal, this second analog detection signal, the 3rd analog detection signal and the 4th analog detection signal addition are become a simulation add resultant signal;
Use this ADU analog delay unit to simulate to add up signal delay to become one and postpone to add resultant signal;
Should postpone to add up the signal digitalized digital delay that becomes and add resultant signal;
The 3rd analog detection signal and the 4th analog detection signal are converted to one the 3rd digital detection signal and one the 4th digital detection signal respectively; And
With this digital delay add resultant signal respectively with this first digital detection signal, this second digital detection signal, the 3rd digital detection signal and the 4th digital detection signal after a plurality of comparison program, produce this tracking error signal.
6. the method for claim 1, it also includes:
One the 3rd analog detection signal and one the 4th analog detection signal are provided;
Use this ADU analog delay unit that this first analog detection signal and the 3rd analog detection signal are postponed to become one first delay detection signal and one the 3rd delay detection signal respectively;
This first is postponed detection signal and the 3rd to postpone that detection signal is digitized into respectively be one first digital delay detection signal and one the 3rd digital delay detection signal;
The 3rd analog detection signal and the 4th analog detection signal are converted to one the 3rd digital detection signal and one the 4th digital detection signal respectively; And
This first digital delay detection signal, the 3rd digital delay detection signal, this first digital detection signal, this second digital detection signal, the 3rd digital detection signal and the 4th digital detection signal after a plurality of comparison program, are produced this tracking error signal.
7. method that in an optical memory system, produces a tracking error signal, it includes the following step:
(a) receive one via the light beam behind a recording medium reflection and the diffraction, this light beam is to advance with the orbital direction on this recording medium according to this tracking error signal;
(b) after carrying out step (a), according to received this light beam a plurality of different compositions in the space, produce one first analog detection signal and one second analog detection signal, wherein once-existing difference between this first analog detection signal and this second analog detection signal;
(c) after carrying out step (b), respectively this first analog detection signal and this second analog detection signal are converted to one first digital detection signal and one second digital detection signal;
(d) after carrying out step (b), this first analog detection signal and this second analog detection signal addition are become a simulation sum signal;
(e) after carrying out step (d), should simulate sum signal becomes an inhibit signal through a delay operation;
(f) after carrying out step (e), it is a digital delay signal that this inhibit signal is digitized into; And
(g) after carrying out step (e) and step (f), with this digital delay signal respectively with this first digital detection signal and this second digital detection signal through a compare operation, to produce this tracking error signal.
8. method as claimed in claim 7, wherein this optical memory system includes an optical sensor, this optical sensor comprises a plurality of sensing areas, these sensing areas are to correspond respectively to this light beam a plurality of different compositions in the space, are used for producing according to this light beam a plurality of different compositions in the space output signal of a plurality of correspondences.
9. method as claimed in claim 7, wherein this optical memory system also includes a detection signal generation module, be electrically connected on this optical sensor, be used for these output signals through an anabolic process to produce this first analog detection signal and this second analog detection signal, make the degree that on behalf of this light beam, this mistiming between this first analog detection signal and this second analog detection signal depart between the center on this recording medium and this orbital direction.
10. method as claimed in claim 7, wherein this optical memory system comprises a balanced device, is used for this delay operation in the execution in step (e).
11. method as claimed in claim 6, wherein this optical memory system comprises a hysteresis circuitry, is used for this delay operation in the execution in step (e).
12. method as claimed in claim 7, wherein this optical memory system comprises a balanced device and a hysteresis circuitry, and this balanced device and this hysteresis circuitry are to be electrically connected mutually, is used for this delay operation in the execution in step (e).
13. method as claimed in claim 7, wherein this optical memory system comprises one first comparison means, one second comparison means and a filter, and this method also includes:
(h) in step (g), with this digital delay signal and this first digital detection signal by this first comparison means producing one first comparison signal, and with this digital delay signal and this second digital detection signal by this second comparison means to produce one second comparison signal; And
(i) in step (g) and after carrying out step (h), this first comparison signal and this second comparison signal are subtracted each other producing a time difference signal, and with this time difference signal by this filter to produce this tracking error signal.
14. method as claimed in claim 13, wherein this first comparison means and this second comparison means are to be respectively an exclusive or logic gate.
15. method as claimed in claim 7, it also includes:
(j) in step (b), this light beam a plurality of different compositions in the space according to received also produce one the 3rd analog detection signal and one the 4th analog detection signal;
(k) after carrying out step (j), this first analog detection signal, this second analog detection signal, the 3rd analog detection signal and the 4th analog detection signal addition are become a simulation add resultant signal, and this simulation is added resultant signal become a delay through this delays operation and add resultant signal;
(l) after carrying out step (k), should postpone to add up the signal digitalized digital delay that becomes and add resultant signal;
(m) carrying out step (j)) after, respectively the 3rd analog detection signal and the 4th analog detection signal are converted to one the 3rd digital detection signal and one the 4th digital detection signal; And
(n) after carrying out step (l) and step (m), with this digital delay add resultant signal respectively with this first digital detection signal, this second digital detection signal, the 3rd digital detection signal and the 4th digital detection signal through a plurality of comparison program, to produce this tracking error signal.
16. method as claimed in claim 7, it also includes:
(o) in step (b), this light beam a plurality of different compositions in the space according to received also produce one the 3rd analog detection signal and one the 4th analog detection signal;
(p) after carrying out step (o), this first analog detection signal and the 3rd analog detection signal are become one first delay detection signal and one the 3rd delay detection signal through this delay operation respectively;
(q) after carrying out step (p), this first is postponed detection signal and the 3rd to postpone that detection signal is digitized into respectively be one first digital delay detection signal and one the 3rd digital delay detection signal;
(r) after carrying out step (o), respectively the 3rd analog detection signal and the 4th analog detection signal are converted to one the 3rd digital detection signal and one the 4th digital detection signal; And
(s) after carrying out step (q) and step (r), this first digital delay detection signal, the 3rd digital delay detection signal, this first digital detection signal and the 4th digital detection signal after a plurality of comparison program, are produced this tracking error signal.
17. a tracking error signal generation device, it is used for an optical memory system and is used for producing a tracking error signal, and this tracking error signal generation device includes:
The binary signal end for process is used for providing respectively one first analog detection signal and one second analog detection signal, wherein once-existing difference between this first analog detection signal and this second analog detection signal;
One synthesizer is connected in this binary signal end for process, is used for this first analog detection signal and this second analog detection signal are synthesized a simulation sum signal;
One ADU analog delay unit is electrically connected on this synthesizer, and being used for this simulation sum signal is postponed and is digitized into is a digital delay signal;
Two digitizers are electrically connected on this binary signal end for process respectively, are used for this first analog detection signal and this second analog detection signal are converted to one first digital detection signal and one second digital detection signal respectively; And
One comparison module is electrically connected on this deferred mount and this two digitizer, is used for this digital delay signal is produced this tracking error signal with this first digital detection signal and this second digital detection signal respectively after a compare operation.
18. tracking error signal generation device as claimed in claim 17, wherein this ADU analog delay unit is that a balanced device is electrically connected a digitizer or a hysteresis circuitry.
19. tracking error signal generation device as claimed in claim 17, wherein this ADU analog delay unit is that a balanced device is electrically connected a hysteresis circuitry.
20. tracking error signal generation device as claimed in claim 17, wherein this optical memory system also comprises an optical sensor, be electrically connected on this tracking error signal generation device, be used for receiving one via the light beam behind a recording medium reflection and the diffraction, this light beam is to carry out with the orbital direction on this recording medium according to this tracking error signal.
21. tracking error signal generation device as claimed in claim 20, wherein this optical sensor comprises a plurality of sensing areas, these sensing areas are to correspond respectively to this light beam a plurality of different compositions in the space, are used for producing according to this light beam a plurality of different compositions in the space output signal of a plurality of correspondences.
22. tracking error signal generation device as claimed in claim 21, wherein this binary signal end for process be with these output signals through an anabolic process to produce this first analog detection signal and this second analog detection signal, make the degree that on behalf of this light beam, this mistiming between this first analog detection signal and this second analog detection signal depart between the center on this recording medium and this orbital direction.
23. tracking error signal generation device as claimed in claim 17, wherein this synthesizer is a totalizer.
24. a tracking error signal generation device, this tracking error signal generation device includes:
Manage signal end everywhere, be used for providing respectively one first analog detection signal, one second analog detection signal, one the 3rd analog detection signal and one the 4th analog detection signal;
One synthesizer is electrically connected on this four signal Processing end, is used for that this first analog detection signal, this second analog detection signal, the 3rd analog detection signal and the 4th analog detection signal are synthesized a simulation and adds resultant signal;
One ADU analog delay unit is electrically connected on this synthesizer, and being used for this simulation is added up signal delay and is digitized into is that a digital delay adds resultant signal;
Four digitizers, be electrically connected on this four signal Processing end respectively, be used for this first analog detection signal, this second analog detection signal, the 3rd analog detection signal and the 4th analog detection signal are converted to one first digital detection signal, one second digital detection signal, one the 3rd digital detection signal and one the 4th digital detection signal respectively; And
One comparison module, be electrically connected on this ADU analog delay unit and this four digitizer, be used for that this digital delay is added resultant signal and after a compare operation, produce this tracking error signal with this first digital detection signal, this second digital detection signal, the 3rd digital detection signal and the 4th digital detection signal respectively.
25. tracking error signal generation device as claimed in claim 24, wherein this first analog detection signal, this second analog detection signal, the 3rd analog detection signal and the 4th analog detection signal are distinguished once-existing difference each other.
26. tracking error signal generation device as claimed in claim 24, wherein this ADU analog delay unit is that a balanced device is electrically connected a digitizer or a hysteresis circuitry.
27. tracking error signal generation device as claimed in claim 24, wherein this ADU analog delay unit is that a balanced device is electrically connected a hysteresis circuitry.
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| CN101854193B (en) * | 2009-04-03 | 2013-06-05 | 瑞昱半导体股份有限公司 | Echo processing device and correlation method thereof |
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