CN1534581A - Driving of active matrix liquid crystal display device and document voltage signal regulation method - Google Patents
Driving of active matrix liquid crystal display device and document voltage signal regulation method Download PDFInfo
- Publication number
- CN1534581A CN1534581A CNA031212816A CN03121281A CN1534581A CN 1534581 A CN1534581 A CN 1534581A CN A031212816 A CNA031212816 A CN A031212816A CN 03121281 A CN03121281 A CN 03121281A CN 1534581 A CN1534581 A CN 1534581A
- Authority
- CN
- China
- Prior art keywords
- vasy
- voltage signal
- pixel electrode
- bucking
- active
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
A method for driving the active array type LCD which has pixel unit array consisting of pixel units, which has a pixel electrode, relative common electrode and a LC layer, includes applying a data voltage signal to pixel electrode, applying the first compensating voltage at same time for compensating the potential shift caused by parasitic capacitor and coupling capacitor, and applying the second compensating voltage at same time for compensating the potential shift caused by the asymmetrical material and shape.
Description
Technical field
The present invention relates to a kind of driving method of LCD, particularly a kind of driving of active-matrix formula LCD and data voltage signal method of adjustment.
Background technology
Quick progress along with the making thin-film electronic crystal technology, advantages such as LCD is frivolous owing to having possessed, power saving, no width of cloth ray, and a large amount of being applied in the various electronic products such as personal digital aid (PDA) (PDA), notebook computer, digital camera, Video Camera, mobile phone.Add the positive input research and development of industry and adopt the production equipment that maximizes, the quality of LCD is constantly promoted, and the lasting decline of price, more make the application of LCD enlarge rapidly.
Please refer to Fig. 1, this figure has shown the circuit structure of unit picture element in the LCD.This unit picture element is to use as switch by a membrane transistor 10.Wherein, the grid of membrane transistor 10 is connected in scanning linear, and source electrode then is connected in data line, then is connected to auxiliary capacitor Cst and pixel electrode as for its drain electrode.When scanning signal during with membrane transistor 10 conductings, the document signal of source electrode can be sent to pixel electrode via drain electrode end, and puts on liquid crystal layer 12 and produce required image.
In general, owing in the liquid crystal material or the relevant processing procedure of LCD of made, tend to leave impurity such as ionic charge at liquid crystal layer or alignment layer surface.Therefore, after the DC voltage of liquid crystal layer both sides applied a period of time, the ionic charge in the liquid crystal layer can be subjected to the attraction of high electronegative potential, accumulated on the alignment layer surface of liquid crystal layer both sides respectively.In case after putting on the DC voltage of liquid crystal layer both sides and removing, the ionic charge that accumulates on alignment layer surface still can continue to produce residual inside DC voltage in liquid crystal layer, and causes serious image residue (image sticking) problem.
In order to solve the above-mentioned image residue problem that is caused with the direct voltage drive LCD, present LCD is to utilize alternating voltage to drive.But it should be noted that, be limited by stray capacitance (parasitic capacitance) and coupling capacitance (coupling capacitance) influence in the unit picture element, when utilizing alternating voltage to drive LCD, still can produce DC voltage at the two ends of liquid crystal layer.Please refer to Fig. 2, this figure has shown the suffered voltage signal waveform of membrane transistor 10 each electrodes in the unit picture element.Wherein, when the suffered scanning signal Vg of gate terminal is noble potential signal Vgh, but this membrane transistor 10 of conducting, on the contrary when scanning signal Vg is electronegative potential signal Vgl, then can close this membrane transistor 10.Owing to used alternating voltage to drive, therefore along with the action of scanning signal Vg switch film electric crystal 10, the document signal that is write by source terminal can present the phenomenon of reversal of poles.
Yet what will particularly point out is, owing to be subjected to stray capacitance Cgd, auxiliary capacitor Cst between grid and drain electrode and the influence of liquid crystal layer capacitor C lc, it is Δ V (Cg, Cst, potential shift Clc) that the document signal Vdata that is sent to drain electrode end can produce size.As shown in jai 2, no matter the document signal Vs polarity that writes of source terminal why, at all can descend Δ V and this unit picture element produced the effect that DC voltage applies of its current potential of document signal Vdata that drain electrode end transmitted.Particularly for the document signal of different GTG sizes, its potential shift Δ V size is also inequality, and causes the DC voltage of importing to vary in size.
Please refer to Fig. 3, this figure shows the situation of the alternating voltage potential shift that signal produces of different GTGs.Wherein be to be example, show the 0th, the 63rd, the 127th, the 191st signal waveform with the 255th GTG respectively with document signal with 256 GTGs.
By can obviously finding out among the figure, be subjected to the influence of above-mentioned potential shift Δ V, except the 127th GTG, the document signal of other GTG all presents the asymmetric situation of positive and negative two side waveform, and causes the effect of Dc bias in liquid crystal layer.In order to solve this problem, driving in the design at present display, is when transmitting document signal Vdata, adds gamma revisal (Gamma correction) circuit, in order to adjust the extra bucking voltage signal that produces each GTG, so that the interchange document signal of input is carried out the current potential adjustment.
As shown in Figure 3, (promptly be positioned at the liquid crystal layer opposite side compared to original voltage level Vcdc, its signal level of the common electrode relative) with pixel electrodes, document signal Vdata=Vcdc ± V (0) ten V ' (0) that is provided, wherein V (0) is the document signal on the 0th rank, and V ' (0) then is the bucking voltage signal on the 0th rank.Thus, can adjust the position standard of common electrode (commonelectrode), make the direct current position standard on the 0th rank become Vcdc ten V ' (0), and effectively avoid the influence of remnant DC voltages by gamma revisal voltage V ' (0).In addition, as above-mentioned, because each different GTG, can produce the potential shift Δ V of different sizes, therefore employed gamma revisal voltage signal V ' (0), V ' (63), V ' (191), V ' (255) are also inequality.And for example the document signal on the 127th rank owing to do not produce potential shift, does not need extra gamma revisal item.
Yet, it should be noted that in order to promote the video picture usefulness of display, in the design of panel, be positioned at the electrode or the both alignment layers of liquid crystal layer both sides at present, often adopt different materials or be made into different geometric configuratioies.Typical structure, for example reflective liquid-crystal display (RLCD; Reflective Liquid CrystalDisplay), multizone vertically aligned liquid crystal display (MVA; Multi-Domain VerticalAlignment), projection-slit-type LCD (Protrusion-slit type) or mixed orientation type LCD (hybrid-aligned nematic, HAN) etc.. its relative two lateral electrodes-alignment layer material is often different, and the geometric configuration of two lateral electrodes is also asymmetric, therefore the catch rate (trapping ratio) of the ion-conductance material that includes for liquid crystal of its two layers of material and inequality, and then cause above-mentioned " direct current is residual " and " image residue " to worsen more.Therefore how effectively to address the above problem, become problem very important in the current LCD processing procedure.
Summary of the invention
Technical matters to be solved by this invention is, at the above-mentioned deficiency of prior art, and provide a kind of can the compensation information voltage signal because the potential shift that pixel cell stray capacitance and coupling capacitance are produced and can compensating owing to the pixel electrode extremely driving and the data voltage signal method of adjustment of the active-matrix formula LCD of material or the asymmetric potential shift that produces of geometric configuration of electricity consumption together.
The driving of active-matrix formula LCD provided by the present invention and data voltage signal method of adjustment are realized by following technical scheme.
A kind of driving method of active-matrix formula LCD, wherein this LCD has pixel unit array, and each this pixel cell comprised a pixel electrode, corresponding to the common electrode of this pixel electrode and be positioned at this pixel electrode and this common electrode between liquid crystal layer, it is characterized in that comprising the following step:
This pixel electrode is applied a data voltage signal, wherein this data voltage signal alternating voltage signal V (n) that is a specific grey-scale:
When applying this alternating voltage signal, this pixel electrode is applied the first bucking voltage signal V ' (n), wherein this first bucking voltage signal V ' is to change along with this specific grey-scale alternating voltage signal (n), in order to compensate the potential shift that this data voltage signal is produced owing to this pixel cell stray capacitance and coupling capacitance; And
When applying this alternating voltage signal, this pixel electrode is applied the second bucking voltage signal Vasy (n), wherein this second bucking voltage signal Vasy (n) changes along with this specific grey-scale alternating voltage signal, in order to compensate because this pixel electrode and its material of this common electrode or the asymmetric potential shift that produces of geometric configuration.
Except that above-mentioned essential features, in specific implementation process, also can replenish following technology contents:
The above-mentioned first bucking voltage signal V ' (n) has n+1, and can divide into V ' (0), V ' (1), V ' (2) according to different GTG sizes ... V ' (n), wherein when above-mentioned V ' (0) is the ceiling voltage GTG, and satisfy 500mV＞V ' (0)＞V ' (1)＞...＞V ' ((n-1)/2)=0＞V ' (n-1)＞V ' (n)＞-500mV.
The above-mentioned second bucking voltage signal has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) according to different GTG sizes ... Vasy (n).
The above-mentioned second bucking voltage signal satisfy 500mV＞Vasy (0)＞Vasy (1)＞...＞Vasy (n-1)＞Vasy (n)＞0.
The above-mentioned second bucking voltage signal satisfies-500mV＜Vasy (0)＜Vasy (1)＜...＜Vasy (n-1)＜Vasy (n)＜0.
The present invention also provides a kind of data voltage signal method of adjustment of active-matrix formula LCD, in order to prevent this LCD generation image residue, wherein this LCD has pixel unit array, and each this pixel cell comprised a pixel electrode, corresponding to the common electrode of this pixel electrode and be positioned at this pixel electrode and this common electrode between liquid crystal layer, it is characterized in that comprising the following step:
This pixel electrode is applied an interchange data voltage signal V (n) with specific grey-scale; And
Should add a bucking voltage signal Vasy (n) by interchange data voltage signal V (n), wherein this bucking voltage signal Vasy (n) is corresponding to this specific grey-scale, in order to compensate because this pixel electrode and its material of this common electrode or the asymmetric potential shift that produces of geometric configuration.
The data voltage signal method of adjustment of active-matrix formula LCD provided by the present invention, except that above-mentioned essential features, in specific implementation process, also can replenish following technology contents:
More comprise the steps:
This interchange data voltage signal added utilize the extra bucking voltage signal of each GTG V ' that the adjustment of gamma correcting circuit produces (n), wherein this gamma revisal voltage signal V ' is (n) corresponding to this specific grey-scale, in order to compensate the potential shift that this data voltage signal is produced owing to this pixel cell stray capacitance and coupling capacitance.
Above-mentioned gamma revisal voltage signal V ' (n) has n+1, and can divide into V ' (0), V ' (1), V ' (2) ... V ' (n) according to different GTG sizes, and when above-mentioned V ' (0) is ceiling voltage GTG V ' (n) when being the minimum voltage GTG, satisfy 500mV＞V ' (0)＞V ' (1)＞...＞V ' ((n-1)/2)=0＞V ' (n-1)＞V ' (n)＞-500mV.
Above-mentioned bucking voltage signal has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) according to different GTGs sizes ... Vasy (n), and satisfy 500mV＞Vasy (0)＞Vasy (1)＞...＞Vasy (n-1)＞Vasy (n)＞0.
Above-mentioned bucking voltage signal has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) according to different GTG sizes ... Vasy (n), and satisfy-500mV＜Vasy (0)＜Vasy (1)＜...＜Vasy (n-1)＜Vasy (n)＜0.
The present invention has disclosed a kind of driving method of active-matrix formula LCD.Wherein, LCD has pixel unit array, and each pixel cell comprises the common electrode of a pixel electrode, correspondence and is positioned at two interelectrode liquid crystal layers.Described method comprises the following step at least.At first, pixel electrode is applied a data voltage signal.This data voltage signal is the alternating voltage signal V (n) of a specific grey-scale (n rank).When applying the alternating voltage signal, pixel electrode is applied the first bucking voltage signal V ' (n).Wherein, the first bucking voltage signal V ' is to change along with specific grey-scale alternating voltage signal (n), in order to the compensation information voltage signal because the potential shift that produced of pixel cell stray capacitance and coupling capacitance.And, when applying the alternating voltage signal, pixel electrode is applied the second bucking voltage signal Vasy (n).The second bucking voltage signal Vasy (n) changes along with specific grey-scale alternating voltage signal, in order to compensation because pixel electrode extremely material or the asymmetric potential shift that produces of geometric configuration of electricity consumption together.
Above-mentioned data voltage signal V (n) can divide into V (0), V (1), V (2) according to different GTG sizes ... V (n) is n+1 GTG size altogether.(n) also have n+1 as for the first bucking voltage signal V ', divide into V ' (0), V ' (1), V ' (2) according to different GTG sizes ... V ' (n).When the 0th rank are the ceiling voltage GTG, and the n rank are when being the minimum voltage GTG, satisfy V ' (0)＞V ' (1)＞...＞V ' ((n-1)/2)=0＞V ' (n-1)＞V ' (n), and V ' (0)＜500mV and V ' (n)＞-500mV.
The above-mentioned second bucking voltage signal also has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) according to different GTG sizes ... Vasy (n).Wherein when Vasy (0)＞Vasy (1)＞...＞Vasy (n-1)＞Vasy (n)＞0.The time, Vasy (0)＜500mV then.
Otherwise, when Vasy (0)＜Vasy (1)＜...＜Vasy (n-1)＜Vasy (n)＜0 o'clock, then Vasy (0)＞-500mV.
The invention has the advantages that:
The driving method of active-matrix formula LCD provided by the present invention, owing to considered liquid crystal layer two lateral electrodes (being pixel electrode and common electrode) its structure or the asymmetric situation of material, and, therefore can apply to reflective liquid-crystal display (RLCD with the influence that the second bucking voltage signal Vasy reduces remnant DC voltages; Reflective Liquid Crystal Display), multizone vertically aligned liquid crystal display (MVA; Multi-Domain Vertical Alignment), projection-slit-type LCD (Protrusion-slit type) or mixed orientation type LCD (hybrid-alignednematic, HAN) etc.. its relative two lateral electrodes-alignment layer material or the asymmetric LCD of geometric configuration, the remnant DC voltages problem that is caused owing to the interfacial charge accumulation with effective solution.
By the detailed description of following examples and in conjunction with the accompanying drawings, can understand the plurality of advantages of foregoing and the present invention easily.
Description of drawings
Fig. 1 has shown the circuit structure of unit picture element in the LCD.
Fig. 2 has shown the suffered voltage signal waveform of each electrode of membrane transistor in the unit picture element.
Fig. 3 has shown the situation of the alternating voltage potential shift that signal produces of the different GTGs of conventional liquid crystal.
Fig. 4 has shown the situation of the alternating voltage potential shift that signal produces of the different GTGs of LCD among the present invention.
Fig. 5 show among the present invention liquid crystal layer applied one hour Dc bias after, measure the situation of remnant DC voltages.And
Fig. 6 shows among the present invention with positive and negative DC voltage, when putting on both sides and having the liquid crystal layer of different electrode materials, and the situation of the remnant DC voltages that measures.
Embodiment
The invention provides a kind of driving method of active-matrix formula LCD, wherein LCD has pixel unit array, and each pixel cell has comprised a pixel electrode, corresponding to the common electrode of pixel electrode and be positioned at pixel electrode and use interelectrode liquid crystal layer together.The method according to this invention when pixel electrode being applied a data voltage signal, at first provides the alternating voltage signal V (n) of a specific grey-scale.Alternating voltage signal with 256 GTGs is an example, and wherein the voltage signal of each GTG as V (0), V (53), V (127), the V (191) and V (255) that shows among Fig. 4, is to present a trapezoidal trend of successively decreasing.That is the 0th rank herein are the ceiling voltage GTG, and the 255th rank are the minimum voltage GTG.
What particularly point out is, because both sides at liquid crystal layer, be respectively pixel electrode (pixelelectrode) and common electrode (common electrode), and the shared signal on common electrode (common signal) has size and is the DC potential of Vcdc, therefore the basic position standard on the pixel electrode also is set at Vcdc, as shown in Figure 4.
Applying data voltage Vdata on the pixel electrode of unit picture element the time, being provides size to be the voltage signal of Vcdc ± V (n), so that produce the image effect of n GTG.Yet, as aforementioned, because its grid of membrane transistor can produce stray capacitance Cgd with drain electrode in pixel cell, and this stray capacitance Cgd can produce coupling with auxiliary capacitor Cst and liquid crystal layer capacitor C lc, and cause extra DC voltage to import, therefore when applying above-mentioned gray scale voltage signal, pixel electrode is applied the first bucking voltage signal V ' (n).Wherein, owing to the first bucking voltage signal that the alternating voltage signal of each GTG is required is also inequality, therefore the first bucking voltage signal V ' (n) can change along with different GTGs, so that the potential shift that revisal pixel cell stray capacitance and coupling capacitance are produced.
With reference to shown in Figure 4, because the potential shift that the 0th rank alternating voltage signal of ceiling voltage GTG is produced is the most serious, so its first required bucking voltage signal V ' (0) is also maximum.And, because the DC voltage that imports is to be superimposed on the accurate Vcdc in position, and can draw high basic voltage level, therefore V ' (0) herein is a negative value, so that with the accurate V ' (0) that adjusts downwards in the document signal position of pixel electrode.In like manner, for the alternating voltage signal on the 63rd rank, its basic position standard is also higher, and therefore the first required bucking voltage signal V ' (63) also is a negative value, so that basic position standard is turned down.As for, alternating voltage signal for the 191st rank and the 255th rank, basic position is accurate because the DC voltage ash that imported makes it reduces, therefore first bucking voltage signal V ' (191) that is applied and V ' (255) be all on the occasion of so that with the accurate upwards levelling in the basic position of these two GTGs.
In other words, when above-mentioned gray scale voltage signal has n+1, and be expressed as V (0), V (1), V (2) ... during v (n), the first bucking voltage signal also has n+1, and can divide into V ' (0), V ' (1), V ' (2) according to different GTGs ... V ' (n).Person more, when V (0) is the highest gray scale voltage signal, and V (n) is when representing minimum gray scale voltage signal, the first bucking voltage signal can satisfy V ' (0)＞V ' (1)＞...＞V ' ((n-1)/2)=0＞V ' (n-1)＞V ' (n).Voltage signal with 256 GTGs is an example, with reference to Fig. 4, and V ' (0)＞V ' (63)＞V ' (127)=0＞V ' (191)＞V ' (255) wherein.
Except the DC voltage that is imported at its stray capacitance and coupling capacitance of pixel cell compensates, owing to be positioned at the pixel electrode and the common electrode of liquid crystal layer both sides, also can be owing to the similarities and differences of the asymmetric or materials used of shape, and the ionic charge in the liquid crystal layer is produced different capture rates, and cause the importing of DC voltage, therefore when applying the gray scale voltage signal, pixel electrode is applied the second bucking voltage signal Vasy (n).Wherein, the second bucking voltage signal Vasy (n) also can change along with each gray scale voltage signal, in order to compensate above-mentioned because electrode material or the asymmetric potential shift that produces of electrode geometry.
In preferred embodiment, when the gray scale voltage signal has n+1, and be expressed as V (0), V (1), V (2) ... during V (n), the second bucking voltage signal also has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) according to different GTGs ... Vasy (n).
When V (0) is the highest gray scale voltage signal, and V (n) is when representing minimum gray scale voltage signal, the second bucking voltage signal can satisfy Vasy (0)＞Vasy (1)＞...＞Vasy ((n-1)/2)＞...＞Vasy (n-1)＞Vasy (n).Voltage signal with 256 GTGs is an example, with reference to Fig. 4, and Vasy (0)＞Vasy (63)＞Vasy (127)＞Vasy (191)＞Vasy (255)＞0 wherein.
Specify that in the above-described embodiments, the second bucking voltage signal Vasy (n) that is applied is all greater than 0, so that under the situation accurate on the low side of DC voltage position, it is offset adjustment.Yet,, also can make the second bucking voltage signal Vasy (n) that applies all less than 0 for the accurate general higher situation in DC voltage position.At this moment, when V (0) is the highest gray scale voltage signal, and V (n) is when representing minimum gray scale voltage signal, the second bucking voltage signal can satisfy Vasy (0)＜Vasy (1)＜...＜Vasy ((n-1)/2)＜...＜Vasy (n-1)＜Vasy (n)＜0.Voltage signal with 256 GTGs is an example, wherein Vasy (0)＜Vasy (61)＜Vasy (127)＜Vasy (191)＜Vasy (255)＜0.
The present invention also provides the above-mentioned second bucking voltage signal Vasy (n) of decision big or small method.Please refer to Fig. 5, at first can carry out the measurement of residual Dc bias at liquid crystal layer.The mode that measures is that earlier liquid crystal layer to be applied size be 5 volts about 60 minutes of DC voltage, is removing DC voltage after 1 second then, begins to measure the suffered residual Dc bias of liquid crystal layer.Please refer to Fig. 6, electrode material difference when the liquid crystal layer both sides, when being respectively tin indium oxide (ITO) with aluminum (Al), if apply+during 5 volt DC power supplys (tin indium oxide is a negative pole for the positive pole aluminum), then after DC voltage applies 60 minutes, the residual Dc bias (two groups of test datas are respectively lines a and b among the figure) that 3.5 volts of left and right sides that can produce are higher.Otherwise, when applying-5 volt DC power supplys (tin indium oxide is that negative pole and aluminum are for anodal), about the 1.5 volts lower residual Dc biases that then can produce (two groups of test datas are respectively lines c and d among the figure).
It should be noted that when measuring residual Dc bias, along with the increase of time, in the time of about 27 minutes, apply+5 volts with apply-5 volts of remnant DC voltages that cause respectively, have about 3.0 volts difference.By this difference, can estimate the size of the second bucking voltage Vasy (n) more accurately.
With typical normal white mode (normally white mode) is example, its feed-trough voltage (Feed throughVoltage) GTG the 0th rank (black) of high voltage and the difference between GTG the 255th rank (white) about be the 0.5-1.0 volt, therefore half of desirable this magnitude of voltage, about 0.25-0.50 volt is as the absolute value of relative both sides electrode material or its GTG the 0th rank of the asymmetric LCD of geometric configuration and the suffered Dc bias of the 255th rank picture difference.Thus, can obtain:
(3V/5V)*0.25V-0.5V＝150mV-300mV
Wherein, 3V is in the above-mentioned test, apply+5V and-5V situation under, the maximum difference of residual Dc bias; As for 5V then is the DC voltage that was continuously applied at 1 hour.So, for typical Shuo membrane transistor LCD, the residual voltage difference of its 0th rank and the 255th rank image promptly is approximately 150mV-300mV.
Yet, if consider that the situation duration of Dc bias is 10 hours, pixel electrode more asymmetric with the common electrode structure on two sides (promptly considering the difference of different, the geometric configuration of material simultaneously), residual Dc bias should be able to be bigger.Therefore, can get the ultimate value height of residual Dc bias to 500mV.That is, when considering the second bucking voltage signal, get Vasy＜500mV.
In preferred embodiment, when the first bucking voltage signal satisfies V ' (0)＞V ' (62)＞V ' (127)=0＞V ' (191)＞V ' (255), can make V ' (0)＜500mV and make V ' (255)＞-500mV.And, when the second bucking voltage signal satisfies Vasy (0)＞Vasy (63)＞Vasy (127)＞Vasy (191)＞Vay (255)＞0, get Vasy (0)＜500mV.Otherwise, when the second bucking voltage signal satisfies Vasy (0)＜Vasy (63)＜Vasy (127)＜Vasy (191)＜Vasy (255)＜0, then get Vasy (0)＞-500mV.
Though the present invention illustrates as above with preferred embodiment, so it is not in order to limit the present invention's spirit and invention entity, only to terminate in the foregoing description.To being familiar with this operator, when understanding and utilize other element or mode to produce identical effect easily.Therefore, the modification of being done in not breaking away from spirit of the present invention and scope all should be included in the described claim scope.
Claims (10)
1, a kind of driving method of active-matrix formula LCD, wherein this LCD has pixel unit array, and each this pixel cell comprised a pixel electrode, corresponding to the common electrode of this pixel electrode and be positioned at this pixel electrode and this common electrode between liquid crystal layer, it is characterized in that comprising the following step:
This pixel electrode is applied a data voltage signal, wherein this data voltage signal alternating voltage signal V (n) that is a specific grey-scale:
When applying this alternating voltage signal, this pixel electrode is applied the first bucking voltage signal V ' (n), wherein this first bucking voltage signal V ' is to change along with this specific grey-scale alternating voltage signal (n), in order to compensate the potential shift that this data voltage signal is produced owing to this pixel cell stray capacitance and coupling capacitance; And
When applying this alternating voltage signal, this pixel electrode is applied the second bucking voltage signal Vasy (n), wherein this second bucking voltage signal Vasy (n) changes along with this specific grey-scale alternating voltage signal, in order to compensate because this pixel electrode and its material of this common electrode or the asymmetric potential shift that produces of geometric configuration.
2, the driving method of active-matrix formula LCD according to claim 1, it is characterized in that: the above-mentioned first bucking voltage signal V ' (n) has n+1, and can divide into V ' (0), V ' (1), V ' (2) according to different GTG sizes ... V ' (n), wherein when above-mentioned V ' (0) is the ceiling voltage GTG, and satisfy 500mV＞V ' (0)＞V ' (1)＞...＞V ' ((n-1)/2)=0＞V ' (n-1)＞V ' (n)＞-500mV.
3, the driving method of active-matrix formula LCD according to claim 2, it is characterized in that: the above-mentioned second bucking voltage signal has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) according to different GTG sizes ... Vasy (n).
4, the driving method of active-matrix formula LCD according to claim 3 is characterized in that: the above-mentioned second bucking voltage signal satisfy 500mV＞Vasy (0)＞Vasy (1)＞...＞Vasy (n-1)＞Vasy (n)＞0.
5, the driving method of active-matrix formula LCD according to claim 3 is characterized in that: the above-mentioned second bucking voltage signal satisfies-and 500mV＜Vasy (0)＜Vasy (1)＜...＜Vasy (n-1)＜Vasy (n)＜0.
6, a kind of data voltage signal method of adjustment of active-matrix formula LCD, in order to prevent this LCD generation image residue, wherein this LCD has pixel unit array, and each this pixel cell comprised a pixel electrode, corresponding to the common electrode of this pixel electrode and be positioned at this pixel electrode and this common electrode between liquid crystal layer, it is characterized in that comprising the following step:
This pixel electrode is applied an interchange data voltage signal V (n) with specific grey-scale; And
Should add a bucking voltage signal Vasy (n) by interchange data voltage signal V (n), wherein this bucking voltage signal Vasy (n) is corresponding to this specific grey-scale, in order to compensate because this pixel electrode and its material of this common electrode or the asymmetric potential shift that produces of geometric configuration.
7, the data voltage signal method of adjustment of active-matrix formula LCD according to claim 6 is characterized in that: more comprise the steps:
This interchange data voltage signal added utilize the extra bucking voltage signal of each GTG V ' that the adjustment of gamma correcting circuit produces (n), wherein this gamma revisal voltage signal V ' is (n) corresponding to this specific grey-scale, in order to compensate the potential shift that this data voltage signal is produced owing to this pixel cell stray capacitance and coupling capacitance.
8, the data voltage signal method of adjustment of active-matrix formula LCD according to claim 6, it is characterized in that: above-mentioned gamma revisal voltage signal V ' (n) has n+1, and can divide into V ' (0), V ' (1), V ' (2) ... V ' (n) according to different GTG sizes, and when above-mentioned V ' (0) is ceiling voltage GTG V ' (n) when being the minimum voltage GTG, satisfy 500mV＞V ' (0)＞V ' (1)＞...＞V ' ((n-1)/2)=0＞V ' (n-1)＞V ' (n)＞-500mV.
9, the data voltage signal method of adjustment of active-matrix formula LCD according to claim 6, it is characterized in that: above-mentioned bucking voltage signal has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) ... Vasy (n) according to different GTGs size, and satisfy 500mV＞Vasy (0)＞Vasy (1)＞...＞Vasy (n-1)＞Vasy (n)＞0.
10, the data voltage signal method of adjustment of active-matrix formula LCD according to claim 6, it is characterized in that: above-mentioned bucking voltage signal has n+1, and can divide into Vasy (0), Vasy (1), Vasy (2) according to different GTG sizes ... Vasy (n), and satisfy-500mV＜Vasy (0)＜Vasy (1)＜...＜Vasy (n-1)＜Vasy (n)＜0.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031212816A CN100414592C (en) | 2003-04-01 | 2003-04-01 | Driving of active matrix liquid crystal display device and document voltage signal regulation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031212816A CN100414592C (en) | 2003-04-01 | 2003-04-01 | Driving of active matrix liquid crystal display device and document voltage signal regulation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1534581A true CN1534581A (en) | 2004-10-06 |
| CN100414592C CN100414592C (en) | 2008-08-27 |
Family
ID=34285645
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB031212816A Expired - Lifetime CN100414592C (en) | 2003-04-01 | 2003-04-01 | Driving of active matrix liquid crystal display device and document voltage signal regulation method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100414592C (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101191923B (en) * | 2006-12-01 | 2011-03-30 | 奇美电子股份有限公司 | Liquid crystal display system and relevant driving process capable of improving display quality |
| CN102270418A (en) * | 2011-08-18 | 2011-12-07 | 南京中电熊猫液晶显示科技有限公司 | Black and white contrast feed-through voltage delta Vp measurement circuit for liquid crystal display and method for balancing liquid crystal voltage by applying circuit |
| CN102426827A (en) * | 2011-12-14 | 2012-04-25 | 南京中电熊猫液晶显示科技有限公司 | Data output method of time sequence controller |
| CN101312020B (en) * | 2007-05-25 | 2012-05-23 | 奇美电子股份有限公司 | LCD and driving method thereof |
| CN104081447A (en) * | 2012-01-31 | 2014-10-01 | 夏普株式会社 | Liquid crystal display device and liquid crystal display device driving method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1994023415A1 (en) * | 1993-04-05 | 1994-10-13 | Cirrus Logic, Inc. | System for compensating crosstalk in lcds |
| US5701136A (en) * | 1995-03-06 | 1997-12-23 | Thomson Consumer Electronics S.A. | Liquid crystal display driver with threshold voltage drift compensation |
| WO1997012355A1 (en) * | 1995-09-25 | 1997-04-03 | Philips Electronics N.V. | Display device |
| JP3813463B2 (en) * | 2000-07-24 | 2006-08-23 | シャープ株式会社 | Drive circuit for liquid crystal display device, liquid crystal display device using the same, and electronic equipment using the liquid crystal display device |
| JP2002341313A (en) * | 2001-05-11 | 2002-11-27 | Mitsubishi Electric Corp | Liquid crystal display device |
-
2003
- 2003-04-01 CN CNB031212816A patent/CN100414592C/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101191923B (en) * | 2006-12-01 | 2011-03-30 | 奇美电子股份有限公司 | Liquid crystal display system and relevant driving process capable of improving display quality |
| CN101312020B (en) * | 2007-05-25 | 2012-05-23 | 奇美电子股份有限公司 | LCD and driving method thereof |
| CN102270418A (en) * | 2011-08-18 | 2011-12-07 | 南京中电熊猫液晶显示科技有限公司 | Black and white contrast feed-through voltage delta Vp measurement circuit for liquid crystal display and method for balancing liquid crystal voltage by applying circuit |
| CN102426827A (en) * | 2011-12-14 | 2012-04-25 | 南京中电熊猫液晶显示科技有限公司 | Data output method of time sequence controller |
| CN104081447A (en) * | 2012-01-31 | 2014-10-01 | 夏普株式会社 | Liquid crystal display device and liquid crystal display device driving method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100414592C (en) | 2008-08-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1268978C (en) | Liquid crystal display device | |
| CN102749775B (en) | Array substrate, display device and method for driving array substrate | |
| TWI288912B (en) | Driving method for a liquid crystal display | |
| CN1825414A (en) | LCD and its driving method | |
| CN1682271A (en) | Luminescence and color variation compensation in a flexible display | |
| CN1437061A (en) | Liquid crystal display | |
| CN1186761C (en) | Active matrix liquid crystal display unit and its driving and manufacturing method | |
| US20070285369A1 (en) | Liquid crystal display device and driving method | |
| US10650764B2 (en) | Common voltage compensation unit and compensation method, driving circuit and display panel | |
| US20080291146A1 (en) | Liquid crystal display with coupling line for adjusting common voltage and driving method thereof | |
| WO1996000408A1 (en) | Active matrix type liquid crystal display device and its driving method | |
| CN1129028C (en) | Active matrix type liquid crystal display device | |
| CN1888964A (en) | LCD device | |
| CN1804707A (en) | Liquid crystal display device and method of driving the same | |
| CN1866350A (en) | Vertical alignment type liquid crystal display device and pixel unit circuit thereof | |
| CN100343890C (en) | Display device | |
| CN1199082C (en) | Active array type LCD | |
| CN1991963A (en) | Liquid crystal display device and method of driving the same | |
| CN1162830C (en) | Method for driving electronic optical panel, electrooptical device and electronic apparatus | |
| CN1941053A (en) | Liquid-crystal display device and its driving circuit | |
| CN1740859A (en) | OCB mode LCD and method for driving the same | |
| CN1534581A (en) | Driving of active matrix liquid crystal display device and document voltage signal regulation method | |
| CN1288486C (en) | Liquid crystal display with double-film transister pixel structure | |
| CN1941055A (en) | Shared voltage modification circuit and method | |
| US7212180B2 (en) | Method of driving liquid crystal display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20080827 |