CN1534559A - Driving circuit compensating structure of plane display device - Google Patents
Driving circuit compensating structure of plane display device Download PDFInfo
- Publication number
- CN1534559A CN1534559A CNA031078974A CN03107897A CN1534559A CN 1534559 A CN1534559 A CN 1534559A CN A031078974 A CNA031078974 A CN A031078974A CN 03107897 A CN03107897 A CN 03107897A CN 1534559 A CN1534559 A CN 1534559A
- Authority
- CN
- China
- Prior art keywords
- driving circuit
- multiplex
- mux
- video signal
- unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
A compensating architecture for the driver of flat display is composed of at least one driver, a display area and a multiplex unit connected to at least one driver via multiple video signal lines and to the display area via multiple data lines. Said multiplex unit has at least one buffer stage with multiple inputs and multiple outputs for compensating the connection to driver and display area.
Description
Technical field
The invention relates to a kind of driving circuit, refer to a kind of flat display driving circuit compensation framework especially.
Background technology
Have the flat display driving circuit framework now as shown in Figure 1, driving circuit 11 provides the analogy video signal, and exports the analogy video signal to duplex circuit 12 by plural video signal line 15.Duplex circuit 12 more is connected with plural control line 14 except receiving the analogy video signal, to see through the controlling signal that control line 14 is transmitted, controls duplex circuit 12 and analogy video signal, with the output digit data signal.Duplex circuit 12 sees through plural data line 16 the digital date signal is delivered to viewing area 13, to drive viewing area 13 actions.
Yet, the plural video signal line 15 that duplex circuit 12 links to each other with driving circuit 11, or the plural data line 16 that links to each other with viewing area 13 of duplex circuit 12, the situation of several connecting lines broken strings or loose contact might take place because of processing procedure shakiness or other causes in manufacture process, makes the fine ratio of product reduction of product integral body reduce with viewing area 13 picture displayed qualities.
Summary of the invention
Fundamental purpose of the present invention is in that a kind of flat display driving circuit compensation framework is provided, so that can improve process rate, to guarantee that driving circuit can drive the viewing area.
Secondary objective of the present invention is in that a kind of flat display driving circuit compensation framework is provided, so that can improve picture quality.
For reaching above-mentioned purpose, flat display driving circuit compensation framework of the present invention is to cooperate at least one driving wafer, and mainly comprise: a plurality of video signal lines are to be connected so that video signal to be provided with this driving wafer; One multiplex (MUX) unit is to be connected with these video signal lines; A plurality of data lines are to be connected with this multiplex (MUX) unit; And a viewing area, be to be connected with these data lines, so that see through these video signal lines output video signals to this multiplex (MUX) unit, see through this multiplex (MUX) unit and these data signal lines then and export data signal to this viewing area for this at least one driving circuit; Wherein, this multiplex (MUX) unit more comprises at least one buffer stage, and this at least one buffer stage more comprises plural standby input lead and plural standby output lead, with compensation or repair being connected of this multiplex (MUX) unit and this at least one driving circuit, or compensates, repairs being connected of this multiplex (MUX) unit and this viewing area.
The standby input lead of above-mentioned these and these standby output leads are staggered with these video signal lines and these data lines respectively, and before compensating, these standby input leads and these standby output leads are not connected with these video signal lines and these data lines.At least one video signal line broken string when the multiplex (MUX) unit is connected with at least one driving circuit then connects this at least one video signal line with at least one standby input lead.At least one data line broken string when the multiplex (MUX) unit is connected with the viewing area then connects this at least one data line with at least one standby output lead.At least one standby input lead or at least one standby output lead are to see through the laser compensation technique to connect at least one video signal line or at least one data line.Wherein, the input connecting line of multiplex (MUX) unit is the number greater than these video signal lines.
Description of drawings
Fig. 1 is existing flat display driving circuit diagram;
Fig. 2 is the driving circuit compensation configuration diagram of preferred embodiment of the present invention.
Embodiment
Relevant preferred embodiment of the present invention please compensate framework with reference to the driving circuit that Fig. 2 shows, it mainly comprises main members such as driving circuit 21, duplex circuit 221 and viewing area 23.Driving circuit 21, and sees through plural video signal line 25 and is connected with duplex circuit 221 than video signal in order to output class, with output class than video signal to multiplex's circuit 221.
Duplex circuit 221 also is connected with at least one control signal wire 24, to receive control signal wire 24 control signals transmitted, to control duplex circuit 22 and analogy video signal by control signal, with the output digit data signal, duplex circuit 221 also sees through plural data line 26 and is connected with viewing area 23, with the output digit data signal to the viewing area 23.
Duplex circuit 221 comprises at least one buffer stage 222, and this at least one buffer stage 222 is also unrestricted in the position of duplex circuit 221, and it can design in a side of duplex circuit 221 or in the middle of duplex circuit 221.In present embodiment, buffer stage 222 quantity are preferably one, and buffer stage 222 is arranged at the right side of duplex circuit 221.Buffer stage 222 has plural standby input lead 27 and plural standby output lead 28, these standby input leads 27 are connected in order to compensation duplex circuit 221 and driving circuit 21 or at least one control signal wire 24, and 28 of these standby output leads are in order to compensate being connected of duplex circuit 221 and viewing area 23.
The input connecting line number of duplex circuit 221 (containing buffer stage 222) (that is these standby input leads 27 and these video signal lines 25 and) is video signal line 25 numbers greater than the output of driving circuit 21, can compensate being connected of duplex circuit 221 and driving circuit 21 to guarantee these standby input leads 27.
These standby input leads 27 and these standby output leads 28 are not to be connected with these video signal lines 25 and these data lines 26 before not compensating.When broken string takes place in the wherein video signal line 251 that is connected with duplex circuit 221 when driving circuit 21, for example: broken string place 2511, then select a standby input lead 271 that is connected with this video signal line 251 as siding, and in standby input lead 271 and video signal line 251 intersections 291, with compensation technique this standby input lead 271 is connected with video signal line 251, in present embodiment, compensation technique is preferably the laser compensation technique.
When broken string takes place in the wherein data line 261 that is connected with the viewing area when duplex circuit 221, for example: the 261l of broken string place, then select a standby output lead 281 that is connected with this data line 261 as siding, and, this standby output lead 281 is connected with data line 261 with the laser compensation technique in standby output lead 281 and data line 261 intersections 292.Certainly, when broken string taking place, also can see through these standby input leads 27 and compensate as if at least one control signal wire 24.
By above explanation as can be known, the present invention is the extra buffer stage that increases in duplex circuit, to see through standby input lead on the buffer stage or standby output lead as the compensation that is connected of duplex circuit with driving circuit or viewing area, improving the overall process yield of product, and can guarantee that driving circuit can drive the viewing area and reduce with avoiding the display frame quality.
The foregoing description only is to give an example for convenience of description, and the interest field that the present invention advocated should be as the criterion so that claim is described in vain, but not only limits to the foregoing description.
Claims (8)
1. a flat display driving circuit compensation framework is to cooperate at least one driving wafer, it is characterized in that, mainly comprises:
A plurality of video signal lines are to be connected so that video signal to be provided with this driving wafer;
One multiplex (MUX) unit is to be connected with these video signal lines;
A plurality of data lines are to be connected with this multiplex (MUX) unit; And
One viewing area is to be connected with these data lines, so that see through these video signal line output video signals to this multiplex (MUX) unit for this at least one driving circuit, sees through this multiplex (MUX) unit and these data signal lines output data signal then to this viewing area;
Wherein, this multiplex (MUX) unit more comprises at least one buffer stage, and this at least one buffer stage more comprises plural standby input lead and plural standby output lead, with compensation or repair being connected of this multiplex (MUX) unit and this at least one driving circuit, or compensates, repairs being connected of this multiplex (MUX) unit and this viewing area.
2. driving circuit compensation framework as claimed in claim 1 is characterized in that, wherein, these standby input leads and these standby output leads are staggered with these video signal lines and these data lines respectively, and do not connect.
3. driving circuit compensation framework as claimed in claim 1, it is characterized in that, when wherein standby input lead is at least one video signal line broken string that is used for that this multiplex (MUX) unit is connected with this at least one driving circuit, connect this at least one video signal line with at least one standby input lead.
4. driving circuit compensation framework as claimed in claim 3 is characterized in that, wherein, this at least one standby input lead is to see through the laser compensation technique to connect this at least one video signal line.
5. driving circuit compensation framework as claimed in claim 1 is characterized in that, at least one data line broken string when this multiplex (MUX) unit is connected with this viewing area then connects this at least one data line with at least one standby output lead.
6. driving circuit compensation framework as claimed in claim 5 is characterized in that, wherein, this at least one standby output lead is to see through the laser compensation technique to connect this at least one data line.
7. driving circuit compensation framework as claimed in claim 1, it is characterized in that, wherein, this multiplex (MUX) unit more is connected with at least one control signal wire, receiving the control signal of being sent by this at least one control signal wire, and at least one standby input lead is to compensate being connected of this at least one control signal wire and this multiplex (MUX) unit.
8. driving circuit compensation framework as claimed in claim 1, it is characterized in that, wherein, the input connecting line of this multiplex (MUX) unit is to comprise these standby incoming lines, these video signal lines and this at least one control signal wire, and the number of this input connecting line is the number greater than these video signal lines.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA031078974A CN1534559A (en) | 2003-04-01 | 2003-04-01 | Driving circuit compensating structure of plane display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA031078974A CN1534559A (en) | 2003-04-01 | 2003-04-01 | Driving circuit compensating structure of plane display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1534559A true CN1534559A (en) | 2004-10-06 |
Family
ID=34283048
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA031078974A Pending CN1534559A (en) | 2003-04-01 | 2003-04-01 | Driving circuit compensating structure of plane display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1534559A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102542973A (en) * | 2011-11-18 | 2012-07-04 | 友达光电股份有限公司 | Display panel, multiplexer circuit therein and signal transmission method |
-
2003
- 2003-04-01 CN CNA031078974A patent/CN1534559A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102542973A (en) * | 2011-11-18 | 2012-07-04 | 友达光电股份有限公司 | Display panel, multiplexer circuit therein and signal transmission method |
| CN102542973B (en) * | 2011-11-18 | 2014-10-15 | 友达光电股份有限公司 | Display panel, multiplexer circuit therein and signal transmission method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6644046B2 (en) | Refrigerator and method for operating the same | |
| TW318236B (en) | TFT/LCD active data line repair | |
| JP4982028B2 (en) | Liquid crystal display device and driving method thereof | |
| US7084840B2 (en) | Liquid crystal display device | |
| US20100023660A1 (en) | Kvm system | |
| CN201577135U (en) | Matrix with multiple input formats and high rate | |
| CN1133663A (en) | A local area network for simultaneous, bi-directional transmission of video bandwidth signals | |
| US10490152B2 (en) | Display device with source integrated circuits having different channel numbers | |
| CN1905655A (en) | Audio over a standard video cable | |
| CN101420572B (en) | Implementing method for function of DP interface and television set | |
| US7973785B2 (en) | Control board and display apparatus having the same | |
| CN100403396C (en) | Driving circuit and multi-display apparatus and electronic device using the same | |
| CN1534559A (en) | Driving circuit compensating structure of plane display device | |
| WO2021217758A1 (en) | Spliced display device | |
| CN101635133B (en) | Liquid crystal display device and pixel driving method | |
| CN110636240B (en) | Signal regulation system and method for video interface | |
| CN101295476B (en) | Panel display equipment and source driver thereof | |
| TW586103B (en) | Reparation architecture for the driving circuit of a flat panel display device | |
| CN1104676C (en) | Display system capable of accepting several kinds of input signal | |
| CN112506458A (en) | Man-machine display control signal remote transmission method for 6U VPX computer module | |
| CN101335844A (en) | Television set | |
| CN113539194A (en) | Display device | |
| CN1521722A (en) | Vehicle mounted thin film transistor LCD and driving method thereof | |
| CN210725082U (en) | Function modularization components of a whole that can function independently TV device | |
| CN202067512U (en) | Output exhibition stand with high definition multi-media interface (HDMI) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |