CN1525310A - Centralized loading method of field programmable gate array - Google Patents

Centralized loading method of field programmable gate array Download PDF

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Publication number
CN1525310A
CN1525310A CNA03105353XA CN03105353A CN1525310A CN 1525310 A CN1525310 A CN 1525310A CN A03105353X A CNA03105353X A CN A03105353XA CN 03105353 A CN03105353 A CN 03105353A CN 1525310 A CN1525310 A CN 1525310A
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China
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fpga
veneer
software module
file
managing software
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CNA03105353XA
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Chinese (zh)
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涛 谢
谢涛
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CNA03105353XA priority Critical patent/CN1525310A/en
Publication of CN1525310A publication Critical patent/CN1525310A/en
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Abstract

The invention is a field programmable gate array central-loading method, its character: it sets an independent field programmable gate array (FPGA) management software module to centrally manage distributed-stored FPGA file on each SBC, and the FPGA management software module is responsible for uploading and downloading, accessing and loading of these FPGA files. The management software module is a file system initialized in a storage device which is independent of each SBC, where the file system contains a file uploading and downloading protocol and starts up the protocol to make the FPGA management software module complete the file uploading and downloading operations with any SBC or client end. The FPGA management software module uniformly processes the storage of FPGA file in the power-off retentive memory device of the SBC.

Description

The centralized loading method of field programmable gate array
Technical field
The present invention relates to a kind of loading method, exactly, relate to a kind of centralized loading method of field programmable gate array, so that realize the unified management of the FPGA file of integrated-type equipment canned data in the field programmable gate array; The using method technical field that belongs to the electrically-programmable memory in the information storage.
Background technology
Field programmable gate array (FPGA, field programable gate array) is a kind of erasable programmable read-only memory (PROM), usually when the Board Power up initialization, with relative program and the data load FPGA hardware chip to this veneer; After this fpga chip initialization, can finish complicated logic control.The logic of FPGA is a volatibility, needs after the power down to reload.Be about to the FPGA file and write fpga chip again, make the operating process that it can operate as normal.Because fpga chip can unrestrictedly repeat to load, and all FPGA can upgrade.New FPGA file is downloaded the power down that is stored in veneer can keep device (normally FLASH storer), again will this new FPGA file when power-up initializing shift being loaded in the fpga chip again, just can make new logical active.
Referring to Fig. 1, more widely used distributed FPGA loading method is to generate a FPGA load-on module to each veneer at present, be responsible for the management of this veneer FPGA file by this module, comprise that generating one goes up the load driver that download module, file access (read-write) module, FPGA file load arrive fpga chip.The FPGA file of each veneer managed safeguard and be exactly and the FPGA load-on module of each veneer carries out alternately.The FPGA load-on module of veneer all needs certain maintenance work at ordinary times.In distributed FPGA loading method, each veneer all is provided with such FPGA load-on module.
And in the integrated-type communication facilities, it or not the cpu system that each veneer all has oneself, the FPGA file of each veneer is that the management of FPGA file equally also includes: the FPGA loading during the veneer initialization, the access of FPGA file, the upgrading of FPGA file in the FLASH storer that leaves on the veneer separately.Wherein FPGA loads the load driver that needs fpga chip, and the storage hardware that the access of FPGA file then needs response drives, and the upgrading of FPGA file just needs going up of cover FPGA file and downloads drive system.If the FPGA literary composition is carried out the distributed treatment design, then each veneer all will have the FPGA administration module of a cover oneself, can take many system resource, increases too much burden will certainly for like this cpu system of integrated-type equipment.And the burden of the cpu system of integrated-type equipment was exactly burdensome originally, how integrated-type equipment is carried out centralized FPGA loading method, promptly all FPGA files to this integrated-type equipment carry out unified management, unified the depositing of FPGA file, upgrading and the loading processing finished, make each veneer no longer be concerned about the management of own FPGA file, with the problem of the burden that alleviates cpu system just put personage in the field of business in face of.
Summary of the invention
The centralized loading method that the purpose of this invention is to provide a kind of field programmable gate array so that realize the unified management of the FPGA file of integrated-type equipment, alleviates the burden of cpu system.
The object of the present invention is achieved like this: a kind of centralized loading method of field programmable gate array, it is characterized in that: an independent field programmable gate array (FPGA) managing software module is set, the distributed FPGA file that leaves on each veneer is managed concentratedly, by unified last download, access and the loading of being responsible for these FPGA files of this managing software module.
Described FPGA managing software module is to be independent of an initialized file system on the memory device of each veneer, this document system includes download protocol on the file, and download protocol makes this FPGA managing software module finish down operation on the file that carries out with any veneer or client on the described file by starting in this document system.
Described client is a network management system, or user or user attendant's operating terminal software.
Down operation on the file that described and any veneer or client are carried out in the down operation all is to download files into earlier in the file system of described FPGA managing software module, finish download after, again its copy is transferred to the purpose veneer; Upload operation all is earlier the document copying on the purpose veneer to be transferred in the file system of described FPGA managing software module, again this document is uploaded to client.
Described FPGA managing software module can keep depositing in the memory device to unify to handle to the FPGA file on each veneer in the power down of its veneer.
Described FPGA managing software module provides a unified FPGA loading interface when veneer need load FPGA, directly finish the loading of each veneer FPGA; Each board software module does not need to pay close attention to the loading details.
When veneer need load FPGA, and when the FPGA managing software module claims, the FPGA managing software module is read the FPGA file from veneer FPGA file system, the errorless back of verification uses the FPGA load driver that meets this veneer fpga chip type to load fpga chip, and loading result is returned to veneer.
Before the described operation, at first to carry out following initialization operation by unified last download, access and the loading of being responsible for each veneer FPGA file of FPGA managing software module:
A, each veneer carry out the initialization of the FPGA file access system of this veneer by this board software notice FPGA managing software module in the equipment of being inserted into the time;
B, FPGA managing software module are discerned the memory device of this veneer, determine the amount of capacity and the driving method of memory device, and the existing file on the existing memory device of verification; Simultaneously board software is announced the fpga chip type of this veneer to the FPGA managing software module, and the FPGA managing software module is then determined corresponding FPGA load driver according to the fpga chip type.
Described is dynamic by the FPGA managing software module to the centralized management that distributed power down of leaving each veneer in can keep the FPGA file in the memory device to carry out, promptly inserting veneer can be managed it by the FPGA managing software module, and veneer is pulled out then can not manage it.
The present invention be directed to the problem that each veneer FPGA file management mode of integrated-type equipment exists and the method for a kind of centralized loading FPGA that proposes, so that realize alleviating the goal of the invention of cpu system burden.Be exactly that an independent F PGA managing software module is set specifically, the distributed FPGA file that leaves on all each veneer FLASH is carried out centralized management; Promptly these files are managed, be responsible for their last download, access and loading by a managing software module unification.Only need to start responsible each veneer FPGA file of upward downloading of download protocol on the file in the FPGA administration module, FPGA file depositing in the FLASH of veneer to each veneer done unified the processing, a unified FPGA loading interface when need loading FPGA, veneer is provided, directly finish the loading of veneer FPGA, make the board software module not need to pay close attention to any processing of FPGA file.
The advantage of the inventive method is the FPGA file of each veneer of centralized management, has reduced the complexity to each veneer FPGA file management, makes each veneer need not pay close attention to FPGA's; And alleviated the burden of cpu system significantly.If there is N piece veneer to be provided with the FPGA file on the integrated-type equipment, manage the cpu resource that FPGA on the veneer need take S%, the method of then traditional distributed management FPGA need take the cpu system resource of N * S%, and centralized management method of the present invention only need take the cpu system resource more more a little than S%, can make cpu system vacate the more time and carry out other operation.
The inventive method is specially adapted to realize the management of the FPGA file of integrated-type equipment.In integrated-type equipment, the FPGA file of each veneer leaves on each veneer, and promptly depositing of FPGA file is distributed; And along with the plug of veneer, the existence of FPGA file also is dynamically to change, and the management to the FPGA file is a distributed management usually.The invention provides a kind of centralized management method of using and come the managing distributed FPGA file of depositing, have good application prospects.
Description of drawings
Fig. 1 is the software module synoptic diagram of distributed FPGA loading method.
Fig. 2 is the software module synoptic diagram of the centralized FPGA loading method of the present invention.
Fig. 3 (A), (B) are respectively the flow chart of steps of the centralized FPGA loading method of the present invention veneer file down operation and upload operation.
Embodiment
Referring to Fig. 2, the present invention is a kind of centralized loading method of field programmable gate array, it is that an independent F PGA managing software module is set in integrated-type equipment, the distributed FPGA file that leaves on each veneer is managed concentratedly, by unified last download, access and the loading of being responsible for these FPGA files of this software module.
This FPGA managing software module is to be independent of an initialized file system on the memory device of each veneer, this document system includes download protocol on the file, this document system makes this FPGA managing software module finish down operation on the file that carries out with any veneer or client (be network management system, or user or user attendant's operating terminal software) by starting on the described file download protocol.
Referring to Fig. 3 (A) and Fig. 3 (B), the present invention is to download files into earlier in the file system of this FPGA managing software module to the file down operation of any veneer, again its copy is transferred to the purpose veneer after download is finished; The file loading operation of any veneer all is earlier file to be transferred to the file system of FPGA administration module from purpose veneer copy, and then uploads to client.This FPGA managing software module can keep the access in the memory device (for example FLASH) to unify to handle to the FPGA file of each veneer in the power down of its veneer.And when veneer need load FPGA, the FPGA administration module provided a unified FPGA loading interface, directly finished the loading of each veneer FPGA, made each board software module not need to pay close attention to any processing of FPGA file.When veneer need load FPGA, and when the FPGA managing software module claims, the FPGA managing software module is read the FPGA file from veneer FPGA file system, the errorless back of verification uses the FPGA load driver that meets this veneer fpga chip type to load fpga chip, and loading result is returned to veneer.
FPGA managing software module of the present invention unified be in charge of each veneer FPGA file on before the operation of download, access and loading, at first to carry out following initialization operation:
A, each veneer carry out the initialization of the FPGA file access system of this veneer by this board software notice FPGA managing software module in the equipment of being inserted into the time;
B, FPGA managing software module are discerned the memory device of this veneer, determine the amount of capacity and the driving method of memory device, and the existing file on the existing memory device of verification; Simultaneously board software is announced the fpga chip type of this veneer to the FPGA managing software module, and the FPGA managing software module is then determined corresponding FPGA load driver according to the fpga chip type.

Claims (9)

1, a kind of centralized loading method of field programmable gate array, it is characterized in that: an independent field programmable gate array (FPGA) managing software module is set, the distributed FPGA file that leaves on each veneer is managed concentratedly, by unified last download, access and the loading of being responsible for these FPGA files of this managing software module.
2, the centralized loading method of field programmable gate array according to claim 1, it is characterized in that: described FPGA managing software module is to be independent of an initialized file system on the memory device of each veneer, this document system includes download protocol on the file, and download protocol makes this FPGA managing software module finish down operation on the file that carries out with any veneer or client on the described file by starting in this document system.
3, the centralized loading method of field programmable gate array according to claim 2, it is characterized in that: described client is a network management system, or user or user attendant's operating terminal software.
4, the centralized loading method of field programmable gate array according to claim 2, it is characterized in that: the down operation on the file that described and any veneer or client are carried out in the down operation all is to download files into earlier in the file system of described FPGA managing software module, after finishing download, again its copy is transferred to the purpose veneer; Upload operation all is earlier the document copying on the purpose veneer to be transferred in the file system of described FPGA managing software module, again this document is uploaded to client.
5, the centralized loading method of field programmable gate array according to claim 1 is characterized in that: described FPGA managing software module can keep depositing in the memory device to unify to handle to the FPGA file on each veneer in the power down of its veneer.
6, the centralized loading method of field programmable gate array according to claim 1, it is characterized in that: described FPGA managing software module provides a unified FPGA loading interface when veneer need load FPGA, directly finish the loading of each veneer FPGA; Each board software module does not need to pay close attention to the loading details.
7, according to the centralized loading method of claim 1 or 6 described field programmable gate arrays, it is characterized in that: when veneer need load FPGA, and when the FPGA managing software module claims, the FPGA managing software module is read the FPGA file from veneer FPGA file system, the errorless back of verification uses the FPGA load driver that meets this veneer fpga chip type to load fpga chip, and loading result is returned to veneer.
8, the centralized loading method of field programmable gate array according to claim 1, it is characterized in that: before the described operation, at first will carry out following initialization operation by unified last download, access and the loading of being responsible for each veneer FPGA file of FPGA managing software module:
A, each veneer carry out the initialization of the FPGA file access system of this veneer by this board software notice FPGA managing software module in the equipment of being inserted into the time;
B, FPGA managing software module are discerned the memory device of this veneer, determine the amount of capacity and the driving method of memory device, and the existing file on the existing memory device of verification; Simultaneously board software is announced the fpga chip type of this veneer to the FPGA managing software module, and the FPGA managing software module is then determined corresponding FPGA load driver according to the fpga chip type.
9, the centralized loading method of field programmable gate array according to claim 1, it is characterized in that: described is dynamic by the FPGA managing software module to the centralized management that distributed power down of leaving each veneer in can keep the FPGA file in the memory device to carry out, promptly inserting veneer can be managed it by the FPGA managing software module, and veneer is pulled out then can not manage it.
CNA03105353XA 2003-02-25 2003-02-25 Centralized loading method of field programmable gate array Pending CN1525310A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100395708C (en) * 2006-10-23 2008-06-18 华为技术有限公司 Multiple veneer system and method for implementing synchronous initiation
CN1968075B (en) * 2006-05-23 2010-05-12 华为技术有限公司 Distributed hot-standby logic device and primary/standby board setting method
US8156376B2 (en) 2008-11-10 2012-04-10 Chengdu Huawei Symantec Technologies Co., Ltd. Method, device and system for storing data in cache in case of power failure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1968075B (en) * 2006-05-23 2010-05-12 华为技术有限公司 Distributed hot-standby logic device and primary/standby board setting method
CN100395708C (en) * 2006-10-23 2008-06-18 华为技术有限公司 Multiple veneer system and method for implementing synchronous initiation
US8156376B2 (en) 2008-11-10 2012-04-10 Chengdu Huawei Symantec Technologies Co., Ltd. Method, device and system for storing data in cache in case of power failure

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