CN1523484A - Image forming apparatus which facilitates redesign and component arrrangement method thereof - Google Patents
Image forming apparatus which facilitates redesign and component arrrangement method thereof Download PDFInfo
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- CN1523484A CN1523484A CNA031556124A CN03155612A CN1523484A CN 1523484 A CN1523484 A CN 1523484A CN A031556124 A CNA031556124 A CN A031556124A CN 03155612 A CN03155612 A CN 03155612A CN 1523484 A CN1523484 A CN 1523484A
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Abstract
An image forming apparatus is configured to facilitate design modification. The image forming apparatus has an engine mechanism to carry out a printing job with respect to a print data applied from an external device, an image processing unit to convert the print data into image data, and an engine controlling unit to control the engine mechanism to carry out the print job with respect to the image data. The engine controlling unit and the image processing unit are arranged on a single printed circuit board (PCB) in which a first and a second division are defined, with the engine controlling unit being arranged in the first division and the image processing unit being arranged in the second division. A circuit element in the second division is shared by the engine controlling unit and the image processing unit to reduce costs and redesign time.
Description
Technical field
The present invention relates to image processing system, specifically, relate to and be convenient to redesign image processing system for the purpose such as the interpolation of improvement or new function, and the collocation method of the assembly of this image processing system.
Background technology
Image processing system such as laser printer receives print data from the image processing apparatus such as personal computer, and reproduces the print data that is received on the print media such as paper.Recently, these image processing systems are integrated in the multi-purpose machine such as fax-duplicating machine image processing system.
Along with the image processing system technology rapid development, molded (molding) and printed circuit board (PCB) (PCB) need be than upgradings more continually any time before, but, for design process, the metal pattern of nature needs more time than PCB, and also needs reliability testing after design is finished.Therefore, before image processing system is redesigned, have the interval in three to five years usually, and the main body of redesign is PCB normally.
Simultaneously, because their features separately, for the design of metal pattern (mold) and PCB, having independently usually, company plans.In this case, metal pattern need be equipped various motors and drive image processing system, and needs PCB to control these motors.Usually, motor uses as an external member with the PCB that is used for motor control, when being used for the design of image processing system, owing to PCB can guarantee through examining quality, so can reduce the reliability testing time.On the contrary, if people have bought metal pattern and PCB separately, and attempt to utilize image processing system of they designs, because he also needs to prepare and (the perhaps mask rom such as random access memory and flash ROM is installed, perhaps EEPROM) and so on assembly is stored the program that is used to drive processor, so the designer will have to finish this design with a large amount of arduous times.
Fig. 1 is the block scheme that the conventional laser printer is described by means of example.
Laser printer comprises image processor 20, switched-mode power supply (SMPS) 30, engine controller 40, high-voltage power supply (HVPS) 50 and engine mechanism 60.
The print data that image processor 20 will receive from principal computer 10 converts the view data such as bitmap to, and these data can be handled in engine controller 40.SMPS30 produces a power supply and drives image processor 20, engine controller 40, HVPS50 and engine mechanism 60.Engine controller 40 is according to the driving that comes Control Engine mechanism 60 by the view data that is applied in the image processor 20.Engine mechanism 60 is driven by engine controller 40, so as on the print media such as paper reproduced image.And comprise necessary such as motor, coloring roller (roller) and organic photo sensor (organic photoconductor, OPC) and so on plant equipment.Engine controller 40 comprises that processor (not shown), random access memory (not shown) and flash ROM (perhaps mask rom, perhaps EEPROM is not shown) are so that drive this processor.The operation of the plant equipment engine controller 40 response image Data Control such as motors, coloring roller and the organic photo sensor.
Fig. 2 A and Fig. 2 B are the image processor 20 of Fig. 1 and the block scheme of engine controller 40.
At first, the image processor 20 of Fig. 2 A comprises: interface unit 21, and it receives print data from principal computer 10; CPU (central processing unit) (CPU) 23, the integrated operation of control image processor 20; ROM22, storage is used to drive various control programs and the application program of CPU 23; Random-access memory (ram) 24 is stored in the data that produce during print data is handled temporarily; And EEPROM25, be used for the starting condition or the control setting value of memory image processor 20.
Engine controller 40 shown in Fig. 2 B comprises: ROM 41, load be used to open or the control program of the engine controller 40 of resetting at CPU 42; CPU 42, according to the program that is stored among the ROM 41, and the integrated operation of Control Engine controller 40; Random-access memory (ram) 43, interim storage is carried out the data that produced by the program of CPU 42; EEPROM 44, and storage is used to be provided with the value of setting of control data or the mode of operation of engine mechanism 60; And engine interface unit 45, between engine mechanism 60 and CPU 42, provide interface.
As mentioned above, traditional engine controller 40 and image processor 20 are independently forming on the PCB, and each all is equipped with processor 23,42, and ROM 22,41, random access memory 24,43 and EEPROM25,44.Therefore, need one independently the interface (not shown) independently carry out data transmission between the processor 23,24 of PCB at two.For example, support different input/output interfaces for processor 23,42, interface circuit inevitably needs two kinds of different data formats of conversion processor 23,42.For the needs of the extra section such as interface circuit, increased the unit price of image processing system, simultaneously, reduced the data rate between the processor 23,42.
Fig. 3 has illustrated the schematic cross-section of the engine mechanism 60 of Fig. 1.
Engine mechanism 60 comprises: photosensitive drum 61, and it has chargeable layer, so that produce electric potential difference on the zone of charging by exposure the time; It converts view data to light signal laser scan unit (LSU) 63, this light signal is shone on the photosensitive drum 61, to form electrostatic latent image (1atentimage) by electric potential difference; Developing cell 64, it provides versicolor toner to photosensitive drum 61 successively; Delivery unit 65 is sent to toner image on the printer paper P from photosensitive drum 61; And fixation unit 66, it is the fixing toner image that is transmitted on printer paper P.
Developing cell 64 comprises: toner storehouse 64a～64d, the corresponding color toner of feeding successively is such as yellow Y, peony M, blue-green C and black B, so that develop this image on photosensitive drum 61.Reference number 64e represents to apply the development coloring roller of Yellow toner to photosensitive drum 61.Though not shown, the development coloring roller also is installed to other toner storehouse 64b～64d.
When laser beam shone on definite zone photosensitive drum 61, be charged to predetermined potential by charging circuit 62 from LSU 63, Gou Zao image processing system formed electrostatic latent image on photosensitive drum 61 as described above.
Then, electrostatic latent image is developed by developing cell 64, and wherein, yellow Y, the peony M among the 64a～64d of toner storehouse, blue-green C and black B toner are usually by the rotation of developing cell 64 photosensitive drum 61 of feeding successively.
Be sent on the travelling belt 65a by above-mentioned developing process with being developed in each color toner doubling of the image on the photosensitive drum 61, then the color toner image is sent on the printer paper P at the image that forms on the travelling belt 65a, wherein printer paper P passes travelling belt 65a and second and transmits coloring roller 65c.
The printer paper P that has carried image thereon passes fixation unit 66, and wherein, this image is fixed on printer paper P.Printer paper P is discharged then.
Fig. 4 illustrates lead (harness) configuration in the image processing system, and this image processing system comprises image processor 20, engine controller 40 and the engine unit 60 of Fig. 1-3.
As shown in Figure 4; wire guide channel 70 is used for the electric wire and the signal wire of engine mechanism 60 (that is, photosensitive drum 61, charhing unit 62, LSU63, developing cell 64, delivery unit 65 and fixation unit 66) along the border configuration of PCB 20a, the 40a of image processor 20 and engine controller 40, with protection.Upgrading for convenience and design, PCB 20a, 40a design and are disposed for image processor 20 and engine controller 40 respectively.Each is equipped with central control unit (CPU), random-access memory (ram) and ROM (read-only memory) (ROM) PCB 20a, 40a.
As mentioned above, image processor 20 and engine controller 40 are independently forming on PCB 20a, the 40a, and each all has CPU, RAM, ROM and EEPROM.Because this structure, when needs add or definite function of the raising of upgrading picture resolutions/print speed and so on, perhaps duplicate to adding such as the such image processing system of laser printer/during facsimile function, this process is very simple, and reason is as long as replace the PCB that is installed on the image processor 20.Yet,,, therefore, increased the manufacturing cost of image processing system because image processor 20 and engine controller 40 need be reinstalled on each independently PCB that all has CPU, RAM and ROM in order to add and upgrade a function.In addition, under the situation of upgrading engine controller 40, image processor 20 is correspondingly upgraded, because image processor 20 docks with engine controller 40.Therefore, finish after the redesign, engine controller 40 and image processor 20 must stand reliability testing on its PCB 20a, 40a, and then test by EMI.As a result, redesign process and cost have been increased.In addition, owing to have the engine controller 40 of independent processor 42,23 and image processor 20 and need to be connected by interface circuit (not shown) independently.Certainly, can utilize low-frequency serial bus to simplify message exchange, such as simplifying control command or status information.Yet the control signal from image processor 20 to the print engine circuit must be with high-speed transfer.Form device if it is a coloured image, then the transmission speed of print control data and print data is considerable.
Summary of the invention
Therefore, an aspect of of the present present invention provides a kind of PCT method for designing, when needs improve print performance or add new function, is used to reduce the time and the cost of redesign image processing system.A kind of image processing system corresponding to this method also is provided.
Another aspect of the present invention provides a kind of image processing system, is used to improve the data rate between engine controller and the image processor, and a kind of method also is provided, and is used for installing on PCB image processing system.
In order to obtain above-mentioned aspect of the present invention and/or further feature, the invention provides a kind of image processing system, comprising: engine mechanism is used to realize the print job about print data; Image processor, print data is converted to can be by the view data of engine mechanism identification; And engine controller, be used for Control Engine mechanism and realize print job about print data.Engine controller and image processor are configured in (PCB) on the single printed circuit board (PCB), in this printed circuit board (PCB), define first and second marker spaces, engine controller is configured in first marker space, and image processor is configured in second marker space, wherein, give and to be equipped with a circuit component by second marker space that engine controller and image processor are shared.
Image processor is connected via the two-way simultaneous bus with engine controller.
Image processor is equipped with single-processor, drives engine controller by controlling this single-processor.
Engine controller is configured to application-specific IC (ASIC).
This processor and ASIC dispose Face to face.
This engine controller comprises at least one connector of being connected with this engine mechanism of being used for, and this connector is configured to face with vertical and horizontal relationship the lead-in wire that is connected of ASIC.
Shared circuit component comprises at least one in random access memory, flash read only memory and the ROM (read-only memory).
This engine controller and image processor are shared at least one in random access memory, flash read only memory and the ROM (read-only memory).
This image processor comprises that also one is used to receive the connector of print data, and this connector is configured to vertically to face the lead-in wire that is connected of image processor with horizontal relationship.
According to the present invention, a kind of image processing system is provided, comprising: engine mechanism is used to realize the print job about print data; Image processor, print data is converted to can be by the view data of engine mechanism identification; And engine controller, be used for Control Engine mechanism and realize print job about print data.Engine controller and image processor all are configured to processor and application-specific IC, and they directly connect via bidirectional bus.
This ASIC response is produced a control signal and is driven engine mechanism by the view data that image processor applies.
This ASIC also comprises the storer of the status information that is used for storage engines mechanism.
The status information of this processor by being stored from this memory read district checked the state of this engine mechanism, and control ASIC is so that this engine controller of transmit image data and implement print job.
This bidirectional bus comprises address bus, data bus and control bus wherein one of at least, and is configured to parallel bus.
This processor directly is connected via this bidirectional bus mutually with ASIC, and is mixed with face-to-face.
This image processor and engine controller are configured on the single printed circuit board (PCB) (PCB), and this plate has the marker space that is defined more than thereon, and directly interconnect via this bidirectional bus.
This engine controller comprises at least one connector that is connected to this engine mechanism, and this connector is configured to vertically to face the lead-in wire that is connected of ASIC with horizontal relationship.
According to the present invention, a kind of PCB collocation method that is used for image processing system also is provided, this image processing system has: engine mechanism is used to realize the print job about the print data that is applied by external unit; Image processor will be converted to image data format from the print data of external unit; And engine controller, be used for Control Engine mechanism and implement print job about view data.The PCB collocation method is configured in image processing system on the single PCB, and comprises step: PCB is defined as first and second marker spaces; As follows image processor is configured in first marker space, and engine controller is configured in second marker space, share the circuit component that is configured in first marker space with this mode image processor and engine controller.
The step that is configured in first marker space also comprises step: install one and be used for the connector that is connected with this engine mechanism in first marker space.
This connector is configured at least a portion corresponding to the border of the PCB of first marker space.
This shared circuit component comprises at least one in random access memory, flash read only memory and the ROM (read-only memory).
This engine controller and image processor are shared at least one in random access memory, flash read only memory and the ROM (read-only memory).
This image processor is configured in second marker space, and has one and be used for the connector that docks with external unit, and this connector is mixed with in the face of this image processor.
In addition, according to the present invention, also provide a kind of PCB collocation method that is used for image processing system, this image processing system has: engine mechanism is used to realize the print job about the print data that is applied by external unit; Image processor will be converted to image data format from the print data of external unit; And engine controller, be used for Control Engine mechanism and implement print job about view data.PCB collocation method according to the present invention comprises step: image processor and engine controller are configured on the single PCB; And be connected image processor and engine controller on this unified bus PCB via the two-way simultaneous bus.
This image processor is configured to a processor, and this engine controller is configured to application-specific IC (ASIC).
This image processor and engine controller are configured to face-to-face.
Also provide step: the one side of a connector to single PCB is installed, is used between engine controller and engine mechanism, docking.
Description of drawings
By preferred embodiments of the present invention will be described in detail with reference to the annexed drawings, above-mentioned purpose of the present invention and other features will become more obvious, wherein:
Fig. 1 is the block scheme of conventional laser printer;
Fig. 2 A and 2B are the block schemes of the inside of the image processor of Fig. 1 and engine controller;
Fig. 3 is the schematic cross-section of the engine mechanism of key diagram 1;
Fig. 4 is the view of configuration of the lead of explanation image processing system, and this image processing system has image processor, engine controller and the engine mechanism in Fig. 1～3;
Fig. 5 is the view of explanation notion of the present invention;
Fig. 6 is the view of the configuration of the explanation PCB that is used for the image processor of Fig. 5 and engine controller;
The view of the connection that Fig. 7 is explanation between the processor of Fig. 6 and the engine controller that forms as ASIC;
Fig. 8 is the process flow diagram that explanation is used for the PCB collocation method of image processing system according to a preferred embodiment of the invention; And
Fig. 9 is the process flow diagram that explanation is used for the PCB collocation method of image processing system according to another preferred embodiment of the invention.
Embodiment
Describe the present invention below with reference to the accompanying drawings in detail.
With reference to figure 5, image processing system of the present invention comprises: image processor 110, and it receives print data from the image processing apparatus such as the principal computer (not shown), and the print data that is received is converted to bitmap image data; And engine controller 120, by being controlled, be used for Control Engine mechanism (not shown) and on the print media such as paper, present predetermined image from the view data of image processor 110.When image processor 110 and engine controller 120 were installed on the single printed circuit board (PCB) (PCB) 100, according to the demand zone that is used for image processor 110 and engine controller 120, this single printed circuit board (PCB) was separated into two marker space 110a, 112a.Along the border of the first area 120a of allocation engine controller 120, configuration connector 130,140,150 is used for data transmission/reception of carrying out between engine controller 120 and engine mechanism (not shown).Engine controller 120 is configured to application-specific IC (ASIC), with the mechanical component of control such as motor, coloring roller and organic photo sensor (OPC), wherein its I/O connects the connector 130,140,150 that goes between on borderline region.(not shown) is connected with connector 130,140,150 with the shortest distance because the I/O of engine controller 120 connects lead-in wire, so obtained the strong anti-interference to external noise.In addition, engine controller 120 and image processor 110 can be configured to face-to-face, so that reduce the influence from external noise as far as possible.Here, by engine controller 120 is configured to ASIC, need not provide independent interface circuit between the processor 111 of image processor 110 and engine controller 120, engine controller 120 and processor 111 can interconnect by the two-way simultaneous bus.This has improved the data transmission rate of per time unit.And space requirement and material cost have been reduced to the stand-alone interface circuit.
By engine controller 120 is configured to ASIC, need not store the various programs that are used to drive this processor such as the assembly independent processor, RAM and the flash ROM (mask rom, EEPROM), reason is can share these assemblies that are configured to image processor 110 as the engine controller 120 of ASIC.
Simultaneously, image processor 110 comprises: CPU (central processing unit) 111, random-access memory (ram) 112, flash read only memory (ROM) 113 and EEPROM 114, in these assemblies, assembly except CPU (that is, RAM 112, flash ROM 113 and EEPROM) all is to share with the engine controller 120 as ASIC.That is to say, engine controller 120 by minimum essential quantity, be used for the plant equipment such as motor, coloring roller and OPC, simultaneously, share other elements such as RAM 112, flash ROM 113 and EEPROM 114 and so on image processor 110.For example, for the image that improves image processor 110 presents ability, do not need to improve the design of engine controller 120, the design that improves image processor 110 is just enough.Because needn't be to the reliability testing engine controller 120 enforcement such as the EMI tests, so can reduce the time and the cost of image processing system redesign.In addition, because engine controller 120 and image processor 110 shared elements such as RAM112, flash ROM 113 and EEPROM 114 and so on, so can also reduce the quantity of the parts of image processing system.
Fig. 6 illustrates the preferred PCB configuration of image processor 110 and the engine controller 120 of Fig. 5.
As shown in the figure, be configured in configuration image processor 210 in the A marker space according to the PCB of image processing system of the present invention, and in the B marker space allocation engine controller 220.As mentioned above, image processor 210 in the A marker space is from such as receiving print data the such image processing apparatus of personal computer (not shown), and received data-switching become bitmap image data, and the engine controller 220 Control Engine mechanisms in the B marker space, so that response presents predetermined image from the view data of image processor 210 outputs on the print media such such as paper.
Image processor 210 comprises processor 211, random-access memory (ram) 212, flash read only memory (ROM) 213 and EEPROM 214.Processor 211 comprises i/o controller 211a, CPU nuclear 211b, image data generator (PVC) 211c and engine interface 211d.
Image processor 210 is by parallel printer port and i/o controller 211a such as IEEE 1284 ports, from the image processing apparatus such as personal computer, receive print data, CPU nuclear 211b arrives image data generator (PVC) 211c with received data transmission, so that to produce view data with the same form of bitmap.
In above-mentioned processing, the storage space that image data generator (PVC) 211c need be scheduled to carries out Flame Image Process, and produces ephemeral data via CPU nuclear 211b in RAM212.Then, after end process,, ephemeral data is outputed to engine interface 211d via image data generator (PVC) 211c.According to the control program that is stored among the flash ROM 213, by the data route of CPU nuclear 211b carries out image processing data.
Stored the starting condition value or the controlling value of image processor 210 among the EEPROM 214, and the value of setting of control data or the mode of operation of engine controller 220 have been set.That is to say EEPROM 214 memory image processors 210 and engine controller 220 needed all starting condition values and the value of setting.
Engine controller 220 is configured to application-specific IC (ASIC).ASIC comprises engine interface 220a, ASIC nuclear 220b, pattern generator 220c, laser scan unit (LSU) 220d, motor controller 220e and analogue-to-digital converters (ADC) 211f.
The engine controller 220 engine interface 220a by wherein receives view data from the engine interface 211d of image processor 210, and explains received data in ASIC nuclear 220b.According to the explanation in ASIC nuclear 220b, pattern generator 220c will produce pattern (pattern) by the image that the engine mechanism (not shown) produces, and drives LSU 220d based on the pattern that is produced.Therefore, LSU 220d forms electrostatic latent image (latent iamge) according to the result of pattern generator 220c on photosensitive drum.
Motor controller 220e controls the motor of image processing system according to the explanation in ASIC nuclear 220b.Can be equipped with the operation that the analog sensor (not shown) monitors motor to engine mechanism, the data of analog sensor are detected by ADC 211f, and feed back to ASIC nuclear 220b.The sensing data that is fed back transmits and is stored among the register 220g via ASIC nuclear 220b.Cun Chu calling of sensing data answer processor 211 and be applied to processor 211 like this.
Simultaneously, the engine controller 220 that is configured to ASIC disposes connector 220h, 220i, 220j on the border of PCB.For example, motor controller 220e can be connected with connector 220h with vertical relation, and ADC 220f is connected with connector 220i with horizontal relationship, and LSU 220d is connected with connector 220j with vertical relation.In other words, its I/O splicing ear of facing the controller 220 that is configured to ASIC with horizontal or vertical relation of connection that is connected between engine controller 220 and the engine mechanism disposes.As a result, engine controller 220 can be connected to connector 220h, 220i, 220j in short as far as possible distance.In order to revise the design of image processor 210 for improving the such purpose of print resolution and speed, such purpose can only reach such purpose by the design of revising image processor 210.That is to say, there is no need to change the design of engine controller 220, reason is the function that engine controller 220 only has Control Engine mechanism.Since engine controller 220 empirical tests its EMI characteristic, so can greatly reduce the redesign time and the cost of image processing system 220.In addition, because engine controller 220 is shared RAM 212, flash ROM 213 and the EEPROM 214 of image processor 210, so can more compact and needs cost still less according to the PCB of image processing system of the present invention.
Fig. 7 illustrates the CPU 211 of Fig. 6 and is configured to connection between the engine controller 220 of ASIC.
As shown in the figure, CPU is connected with EEPROM 214 with RAM 212, flash ROM 213 by N-bit parallel bus, and CPU is connected with engine controller 220 by N-bit parallel bus.The engine controller 220 that is configured to ASIC is more as an active equipment, and it can't help separate processor control, but is controlled by CPU211.Therefore, there is no need between engine controller 220 that is configured to ASIC and CPU 211, to put an independently interface circuit.(control) is connected CPU 211 with control bus via n-bit address bus (address), data bus (data) with the engine controller 220 that is configured to ASIC.Engine controller that is configured to ASIC 220 and CPU 211 by N-bit parallel bus connects compare with the system that uses the stand-alone interface circuit, have very fast speed.High like this data rate forms device to coloured image especially and takes into account, because image processing system has more substantial print data.Be used for the address bus (address) of CPU 211 and the engine controller 220 that is configured to ASIC and the status information that data bus (data) need obtain about engine mechanism from the register 221 of engine controller 220.The reading order that register 221 is answered an address or received the engine controller 220 that is configured to ASIC from CPU 221, thus the status information that is stored in the register 221 feeds back to CPU 221 via data bus (data).
Simultaneously, because the circuit component such as CPU nuclear 211b, flash ROM 213 and EEPROM 214 is configured in the A marker space, therefore can carry out about system diagnostics easily according to image processing system of the present invention.Because except engine controller 220, all components that drives engine mechanism is configured in the A marker space, and image processor 210 also is configured in wherein, therefore, except the mistake relevant with engine controller 220, nearly all mistake must be from the A marker space.In addition, because engine controller 220 is not equipped with the assembly such as RAM 212, flash ROM 213 and EEPROM 214, therefore, form device with the traditional images that has been equipped with processor, RAM and flash ROM at Flame Image Process 210 and engine controller 220 respectively and compare, seldom carry out system diagnostics.
Though the present invention is described with the preferred embodiment that above-mentioned employing wherein has a PCB of two marker spaces, the present invention does not consider it as restriction.For example, basic PCB without any the marker space also can implement the present invention.That is to say that Flame Image Process 210 and engine controller 220 can be configured on the PCB without any the marker space, they mutually in the face of and connect via the two-way simultaneous bus.Use PCB still can obtain advantage of the present invention without any the marker space, such as, owing to connecting, the two-way simultaneous bus between Flame Image Process 210 and the engine controller 220 increases data rate, do not need the stand-alone interface circuit between Flame Image Process 210 and the engine controller 220, and between Flame Image Process 210 and engine controller 220 RAM Shared 212, flash ROM 213 and EEPROM 214.Unique difference is, the PCB with two marker spaces also has additional advantage, and mainly being needs little time to revise design and fail-test to image processing system.Because these beneficial effects are described in detail with reference to figure 5 and 6, therefore here no longer be described.
Fig. 8 shows the PCB configuration of image processing system according to a preferred embodiment of the invention.
At first, configuration on single PCB 200: image processor 210 is used for receiving print data from the image processing apparatus such as the principal computer (not shown), and converts the print data that is received to bitmap image data; Engine controller 220 is by the view data control of image processor 210, so that Control Engine mechanism (not shown) presents predetermined image on the print media such as paper.More particularly, A and B marker space are limited to PCB 200 (S410), and Flame Image Process 210 is configured in the A marker space, and engine controller 220 is configured in B marker space (S420).
Secondly, determine in the A of PCB 200 and B marker space, whether any circuit component (S430) of being shared by Flame Image Process 210 and engine controller 220 is arranged.When determining to exist RAM 212, flash ROM213 and EEPROM 214 to share between Flame Image Process 210 and engine controller 220, these arrangements of components are in A marker space (S440) wherein, image processor 210 location.Because engine controller 220 can be by RAM 212, flash ROM 213 and the EEPROM 214 of CPU 211 access images processors 210, so provide RAM 212, flash ROM 213 and EEPROM 214 without any necessity in engine controller 220.Therefore, by the verification experimental verification such as EMI test the engine controller 220 of its reliability, even during the image processing system redesign, can need under its design aspect carries out the situation of extra upgrading, not use yet.Therefore, can reduce the time and the cost of image processing system redesign on the whole.
The engine controller 220 that is configured to ASIC directly is connected with CPU 211 via address bus (address), data bus (data) and controller bus (control).Therefore, need not provide on PCB independently that interface circuit docks engine controller 220 and CPU 211, thereby more effectively utilize the space of PCB.
Once more, can not be configured in needed marker space (S450) respectively by other elements that Flame Image Process 210 and engine controller 220 are shared.At last, the connector such as connector 220h, 220i, 220j is configured in the B marker space so that butt joint engine mechanism and engine controller 220, and along the border (S460) of the PCB that is assigned to the B marker space.These connectors preferably are configured to face with horizontal or vertical low relation the I/O connection lead-in wire of the engine controller 220 that is configured to ASIC.In other words, the I/O of ASIC connection lead-in wire preferably is connected with the bonder terminal (not shown) by the straight line circuit.The circuit of this mode is simplified the metallic circuit that connects the engine controller 220 that is configured to ASIC and connector 220h, 220i, 220j, thereby provide such as advantages such as diagnosis and maintenance easily occurring when wrong at image processing system, and can reduce the interference between the metallic circuit.For example, have unified interval and pattern if connect each metallic circuit of the engine controller 220 be configured to ASIC and connector 220h, 220i, 220j, form earth plate by reverse side, can obtain shield effectiveness and robustness external disturbance at these metallic circuit location PCB wherein.
Simultaneously, Flame Image Process 210 is configured in the A marker space, and more particularly, (systemon a chip, SOC) image processor 210 of form is configured in the face of being configured to the engine controller 220 of ASIC systems-on-a-chip.In other words, the lead-in wire direction of engine controller 220 becomes horizontal or vertical relation with the lead-in wire direction of image processor 210, so image processor 210 and engine controller 220 can interconnect with short as far as possible distance.
Fig. 9 is the process flow diagram that diagram is used for the PCB collocation method of image processing system according to a further advantageous embodiment of the invention.
According to second preferred embodiment, at first, configuration image processor 210 and engine controller 220 on single PCB 200, image processor 210 and engine controller 220 are mutually in the face of (S510).Secondly, determine defeated 2/ output with horizontal or vertical relation connects the direct circuit that goes between whether may be between image processor 210 and engine controller 220 (S520), if then connect image processor 210 and engine controller 220 (S530) via the two-way simultaneous bus.Parallel bus comprises N-bit data bus (data), address bus (address) and control bus (control), and starts the signal transmission than legacy system more speed.In traditional approach, therefore all necessary separate processor of image processor 210 and engine controller 220 needs interface circuit betwixt.In addition, in traditional approach, use such as the so common serial protocol that is used for processor of RS232.According to a preferred embodiment of the invention, by engine controller 220 is configured to ASIC, without any need for interface circuit independently.At last, the I/O of facing the engine controller 220 with horizontal or vertical relation connects the lead-line configuration connector, so that butt joint (S540) between image processor 210 and engine controller 220.Compare with the legacy system that engine controller 220 is formed on the PCB independently with image processor 210, the present invention can reduce circuit component quantity.In addition, according to the present invention, image processor 210 and engine controller 220 are formed on the PCB, and connect via the high-speed bidirectional parallel bus.Exclusive feature of the present invention not merely is, is used to form engine controller 220 and image processor 210 necessary PCB numbers reduce to one from two.Be that more the present invention provides more effective design by select high speed parallel bus on single PCB, and fully taken into account the increase of the data volume between engine controller 220 and the image processor 210.
According to the present invention, the engine controller 220 of redesign image processing system and the time and the cost of image processor 210 have been reduced largely.In addition, to share RAM, flash ROM and the EEPROM of image processor 210, reduced unit cost by structure engine controller 220.In addition, because engine controller 220 is configured to only Control Engine mechanism, therefore, in order to upgrade to image processing system or to add new function, redesign image processor 210 gets final product separately usually.And, by processing 210 of configuration image on single PCB and engine controller 220, and connect Flame Image Process 210 and the engine controller 220 that disposes like this by the two-way simultaneous bus, system can fully take into account the possible increase of the data volume between engine controller 220 and the image processor 210.In addition, by simplifying the circuit between engine controller 220, image processor 210 and the connector, can guarantee robustness in the face of outside or internal interference.
Though described several preferred embodiments of the present invention, but it should be appreciated by those skilled in the art, the present invention is not limited to described preferred embodiment, within the spirit and scope of the present invention that appended claims limited, can carry out various changes and improvements.
Claims (27)
1. image processing system comprises:
Engine mechanism is used to realize the print job about print data;
Image processor, print data is converted to can be by the view data of engine mechanism identification; And
Engine controller is used for Control Engine mechanism and realizes print job about print data, wherein
Engine controller and image processor are configured in (PCB) on the single printed circuit board (PCB), in this printed circuit board (PCB), limit first and second marker spaces, engine controller is configured in first marker space, and image processor is configured in second marker space, wherein, give and to be equipped with a circuit component by second marker space that engine controller and image processor are shared.
2. according to the image processing system of claim 1, wherein image processor is connected via the two-way simultaneous bus with engine controller.
3. according to the image processing system of claim 1, wherein image processor is equipped with single-processor, and drives engine controller by controlling this single-processor.
4. according to the image processing system of claim 3, wherein engine controller is configured to application-specific IC (ASIC).
5. according to the image processing system of claim 4, wherein this processor and ASIC dispose Face to face.
6. according to the image processing system of claim 5, wherein this engine controller comprises at least one connector of being connected with this engine mechanism of being used for, and this connector is configured to face with vertical and horizontal relationship the lead-in wire that is connected of ASIC.
7. according to the image processing system of claim 1, wherein shared circuit component comprises at least one in random access memory, flash read only memory and the ROM (read-only memory).
8. according to the image processing system of claim 7, wherein this engine controller and image processor are shared at least one in random access memory, flash read only memory and the ROM (read-only memory).
9. according to the image processing system of claim 1, wherein this image processor comprises that also one is used to receive the connector of print data, and this connector is configured to vertically to face the lead-in wire that is connected of image processor with horizontal relationship.
10. image processing system comprises:
Engine mechanism is used to realize the print job about print data;
Image processor, print data is converted to can be by the view data of engine mechanism identification; And
Engine controller is used for Control Engine mechanism and realizes print job about print data, wherein
Engine controller and image processor all are configured to processor and application-specific IC, and they directly connect via bidirectional bus.
11. according to the image processing system of claim 10, wherein this ASIC response is produced a control signal and is driven engine mechanism by the view data that image processor applies.
12. according to the image processing system of claim 10, wherein this ASIC also comprises the storer of the status information that is used for storage engines mechanism.
13. according to the image processing system of claim 12, the status information of this processor by being stored from this memory read district wherein checked the state of this engine mechanism, and control ASIC is so that send view data to this engine controller and implement print job.
14. according to the image processing system of claim 10, wherein this bidirectional bus comprises address bus, data bus and control bus wherein one of at least, and is configured to parallel bus.
15. according to the image processing system of claim 14, wherein this processor directly is connected via this bidirectional bus mutually with ASIC, and is mixed with face-to-face.
16. according to the image processing system of claim 10, wherein this image processor and engine controller are configured on the single printed circuit board (PCB) (PCB), this plate has the marker space that is defined more than thereon, and directly interconnects via this bidirectional bus.
17. according to the image processing system of claim 10, wherein this engine controller comprises at least one connector that is connected to this engine mechanism, this connector is configured to vertically to face the lead-in wire that is connected of ASIC with horizontal relationship.
18. a PCB collocation method that is used for image processing system, this image processing system has: engine mechanism is used to realize the print job about the print data that is applied by external unit; Image processor will be converted to image data format from the print data of external unit; And engine controller, being used for Control Engine mechanism and implementing print job about view data, this PCB collocation method is configured in image processing system on the single PCB, and comprises step:
PCB is defined as first and second marker spaces; And
As follows image processor is configured in first marker space, and engine controller is configured in second marker space, share the circuit component that is configured in first marker space with this mode image processor and engine controller.
19. according to the PCB collocation method of claim 18, wherein the step that is configured in first marker space also comprises step: in first marker space, install one and be used for the connector that is connected with this engine mechanism.
20. according to the PCB collocation method of claim 18, wherein this connector is configured at least a portion corresponding to the border of the PCB of first marker space.
21. according to the PCB collocation method of claim 18, wherein shared circuit component comprise in random access memory, flash read only memory and the ROM (read-only memory) at least one.
22. according to the PCB collocation method of claim 18, wherein this engine controller and image processor are shared at least one in random access memory, flash read only memory and the ROM (read-only memory).
23. according to the PCB collocation method of claim 18, wherein this image processor is configured in second marker space, and has one and be used for the connector that docks with external unit, this connector is mixed with in the face of this image processor.
24. a PCB collocation method that is used for image processing system, this image processing system has: engine mechanism is used to realize the print job about the print data that is applied by external unit; Image processor will be converted to image data format from the print data of external unit; And engine controller, being used for Control Engine mechanism and implementing print job about view data, this PCB collocation method comprises step:
Image processor and engine controller are configured on the single PCB; And
Be connected image processor and engine controller on this unified bus PCB via the two-way simultaneous bus.
25. according to the PCB collocation method of claim 24, wherein this image processor is configured to a processor, and this engine controller is configured to application-specific IC (ASIC).
26. according to the PCB collocation method of claim 24, wherein this image processor and engine controller are configured to face-to-face.
27., wherein also provide step: the one side of a connector to single PCB is installed, is used between engine controller and engine mechanism, docking according to the PCB collocation method of claim 26.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20030010809 | 2003-02-20 | ||
| KR10809/03 | 2003-02-20 | ||
| KR10809/2003 | 2003-02-20 | ||
| KR49666/03 | 2003-07-21 | ||
| KR10-2003-0049666A KR100501698B1 (en) | 2002-07-22 | 2003-07-21 | Image forming device easy to remodeling and method for placing image forming device on PCB |
| KR49666/2003 | 2003-07-21 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1523484A true CN1523484A (en) | 2004-08-25 |
| CN1288542C CN1288542C (en) | 2006-12-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03155612 Expired - Fee Related CN1288542C (en) | 2003-02-20 | 2003-08-29 | Image forming apparatus which facilitates redesign and component arrrangement method thereof |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP4450275B2 (en) |
| CN (1) | CN1288542C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014056201A1 (en) * | 2012-10-12 | 2014-04-17 | Mediatek Inc. | Layout module for printed circuit board |
-
2003
- 2003-08-29 CN CN 03155612 patent/CN1288542C/en not_active Expired - Fee Related
- 2003-09-24 JP JP2003332301A patent/JP4450275B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014056201A1 (en) * | 2012-10-12 | 2014-04-17 | Mediatek Inc. | Layout module for printed circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1288542C (en) | 2006-12-06 |
| JP4450275B2 (en) | 2010-04-14 |
| JP2004249711A (en) | 2004-09-09 |
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