CN1521004A - Ink-jet printing head identification circuit and method thereof - Google Patents
Ink-jet printing head identification circuit and method thereof Download PDFInfo
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- CN1521004A CN1521004A CNA031022030A CN03102203A CN1521004A CN 1521004 A CN1521004 A CN 1521004A CN A031022030 A CNA031022030 A CN A031022030A CN 03102203 A CN03102203 A CN 03102203A CN 1521004 A CN1521004 A CN 1521004A
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Abstract
The present invention is ink jetting print head identifying circuit and method. The identifying circuit consists of fuses and other electronic modules and is set and integrated onto the print head of cartridge. It may be programmed before delivering or after being used in some state for certain time to play its identification function.
Description
Technical field
The present invention relates to a kind of identification circuit, particularly a kind of use offset buffer (shift register) transfers to the ink jet-print head identification code identification circuit of the ink jet-print head (ink jetprinthead) of controller with series system.
Background technology
Along with being showing improvement or progress day by day of science and technology, the user is also more and more high to the requirement of product.With the ink-jet printer is example, develop at different printing demands and ink-jet printer miscellaneous, and each ink-jet printer has corresponding multiple card casket, as different card casket of the spray orifice number on black card casket, color chart casket and the printhead or the like, each card casket all has its corresponding model or sequence number, at the card casket of different model or sequence number, ink-jet printer will be controlled with different control programs.Because the card casket is of a great variety, for avoiding the user that the card casket of mistake is loaded onto ink-jet printer, cause ink-jet printer to operate normally, therefore when a card casket is installed in an ink-jet printer, ink-jet printer just can carry out identification to the card casket, to determine whether this card casket is applicable to this ink-jet printer.All include an identification circuit in the printhead of each card casket, the card casket is carried out identification for ink-jet printer.The identification circuit of card casket only uses when just being mounted to ink-jet printer at the card casket, in case the card casket by identification after, just no longer need to use identification circuit.
Please refer to Fig. 1 and Fig. 2, be respectively the schematic diagram that conventional ink jet printers 10 and Fig. 1 block casket 12.As shown in Figure 1, ink-jet printer 10 includes at least one card casket 12, is arranged in the ink-jet printer 10.As shown in Figure 2, card casket 12 includes a printhead (ink jet print head) 14 and one housing 16.Printhead 14 includes a chip 18 and a soft printed circuit board 13, is formed with a plurality of spray orifices 15 on the chip 18.Include an ink duct 24 in the housing 16 in order to storage ink.Printhead 14 and ink duct 17 are for communicating, and the inks in the ink duct 17 can print work via printhead 14 heating backs from spray orifice 15 ejections.
Fig. 3 and Fig. 4 are the U.S. Pat 5 of Lexmark International company, 940, a disclosed single place shift buffer (one-bit shift register) 20 circuit diagrams and one or four bit shift buffers 2 are incorporated into and are gone here and there out identification circuit figure (four-bit shift register among 095 " the Inkjet print head identification circuit with serial out; dynamic shiftregisters ", parallel in, serial out identification circuit).
See also Fig. 3, U.S. Pat 5,940,095th, in manufacture process, set up a binary code storage values (0 or 1) decided at the higher level but not officially announced in a single place shift buffer 20 in following light shield planning mode (mask programmed):
(1) blocking-up source electrode (source) 24 of one transistor 22 and being electrically connected of power supply 23, and keep being electrically connected of this source electrode 24 and ground connection 21;
(2) blocking-up source electrode (source) 24 of one transistor 22 and being electrically connected of ground connection 21, and keep being electrically connected of this source electrode 24 and power supply 23;
After start-up loading 25, pulse 1, pulse 2 27 successively, under above-mentioned (one) kind situation, can read single place shift buffer 20 binary code storage values decided at the higher level but not officially announced in output 28 is 0; Anti-, under above-mentioned (two) kind situation, can read single place shift buffer 30 binary code storage values decided at the higher level but not officially announced in output 28 is 1.
See also Fig. 4, it is a U.S. Pat 5,940,095 one or four bit shift buffers 2 are incorporated into and are gone here and there out identification circuit figure, mainly be in series by four single place shift buffer 20a, 20b, 20c, 20d as Fig. 3, wherein the input of single place shift buffer 20b, 20c, 20d (consulting the input 29 of Fig. 3) is electrically connected the output (consulting the output 28 of Fig. 3) of single place shift buffer 20a, 20b, 20c respectively.After start-up loading 25, pulse 1, pulse 2 27 successively, can read the binary code storage values decided at the higher level but not officially announced of single place shift buffer 20d, 20c, 20b, 20a in regular turn in output 28.If ink jet-print head model identification code is 0101, and the binary code storage values decided at the higher level but not officially announced of reading single place shift buffer 20d, 20c, 20b, 20a in regular turn was respectively 0,1,0,1 o'clock, and printer (or computer) can this model ink jet-print head of identification.In like manner, if the multi-color ink jet printhead identification code is 0001, and the binary code storage values decided at the higher level but not officially announced of reading single place shift buffer 20d, 20c, 20b, 20a in regular turn was respectively 0,0,0,1 o'clock, and printer (or computer) can this ink jet-print head of identification be to be colour.
Only as mentioned above, U.S. Pat 5,940, the 095th, in manufacture process, in single place shift buffer 20a, 20b, 20c, 20d, set up a binary code storage values (0 or 1) decided at the higher level but not officially announced respectively in light shield planning mode (mask programmed), model, colour or the black and white etc. of this ink jet-print head of confession printer (or computer) identification are data fixedly, and the present situation data of the ink jet-print head in using then can't be write down or demarcate to dispatching from the factory afterwards.
Therefore, the invention provides a kind of identification circuit (recognitioncircuit) of card casket of ink-jet printer, the present situation data of the ink jet-print head in can using for the back of dispatching from the factory is write down or is demarcated.
Summary of the invention
The purpose of this invention is to provide a kind of with ink jet-print head identification circuit and method that fuse and other electronic building brick were constituted.
Another object of the present invention is proposing a kind ofly can to finish sequencing before dispatching from the factory, the ink jet-print head identification circuit and the method for the discriminating function of performance identification circuit (as the fixedly data of card caskets such as model, sequence number, colour or black and white, print density).
Another purpose of the present invention propose a kind of can be in dispatching from the factory and use to certain state rear and finish its sequencing, the ink jet-print head identification circuit and the method for the discriminating function of performance identification circuit (the present situation data that whether has surpassed card caskets such as service life).
The present invention is described in detail with instantiation below in conjunction with accompanying drawing.
Description of drawings
Fig. 1 is the schematic diagram of conventional ink jet printers;
Fig. 2 blocks the schematic diagram of casket for Fig. 1;
Fig. 3 is a U.S. Pat 5,940,095 single place shift cache circuit figure;
Fig. 4 is a U.S. Pat 5,940, and 095 4 bit shift buffers 2 are incorporated into and gone here and there out identification circuit figure;
Fig. 5 is an ink jet-print head identification system calcspar of the present invention;
Fig. 6 incorporates into for the present invention's first preferable enforcement side four bit shift buffers and goes here and there out identification circuit figure;
Fig. 7 incorporates into for the present invention's second preferred embodiment four bit shift buffers and goes here and there out identification circuit figure;
Fig. 8 incorporates into for the present invention's the 3rd preferred embodiment four bit shift buffers and goes here and there out identification circuit figure;
Fig. 9 is that the present invention's the 4th preferred embodiment one n bit shift buffer 70 is incorporated into and gone here and there out identification circuit figure.
Description of reference numerals:
10 ink-jet printers, 12 card caskets
14 printheads, 16 housings
18 chips, 13 soft printed circuit boards
15 spray orifices, 17 ink ducts
2 four bit shift buffers, 21 ground connection
20,20a, 20b, 20c, 20d single place shift buffer
22 transistors, 23 power supplys
24 source electrodes 25 load
26 pulses, one 27 pulses two
28 outputs, 29 inputs
40,50,60 4 bit shift buffers
40a, 50a, the 60a first single place shift buffer fuse circuit
40b, 50b, the 60b second single place shift buffer fuse circuit
40c, 50c, 60c the 3rd single place shift buffer fuse circuit
40d, 50d, 60d the 4th single place shift buffer fuse circuit
41,51,61 first single place shift buffer fuse circuit output ends
42,52,62 second bit shift buffer fuse circuit output ends
43,53,63 the 3rd single place shift buffer fuse circuit output ends
44,54,64 the 4th single place shift buffer fuse circuit output ends
45,55,65 load
46,56,66 pulses one
47,57,67 pulses two
48,58,68 4 bit shift buffer outputs
411 the first transistors, 412 transistor secondses
413 first fuses, 414 second fuses
415,615 ground connection
416,616 power supplys
417 first address wires, 418 second address wires
511,611 transistors
514,614 fuses
515 first power supplys, 516 second sources
517,617 address wires
The specific embodiment
Printer now uses the ink of C (cyan), M (magenta), three kinds of colors of Y (yellow) mostly, during every printing one pattern, the control circuit of printer can calculate the consumption of three kinds of color ink respectively, and can write down three kinds of color ink and be accumulate to so far the difference consumption and the consumption altogether of three kinds of color ink.When for example three kinds of color ink will exhaust, its print quality is the certain reliability of tool not just.
See also Fig. 5, be ink jet-print head identification system 30 calcspars of the present invention, comprise that one prints an organic electronic circuit 31 and a printhead electronic circuit 32, printer electronics circuit 31 comprise a control circuit 311 and be electrically connected one print head drive circuit 312, printhead electronic circuit 32 comprises one and prints head array 321, one identification circuit 322, one resistance 323, print-head drive circuit 312 is connected in print head array 321 with a plurality of address wires 33, at least a portion address 331 lines in a plurality of address wires 33 also are connected in parallel to identification circuit 322, identification circuit 322 and resistance 323 are electrically connected on an output 324 of identification circuit 322, the other end ground connection of resistance 323.
When card casket ink inside will exhaust and counter (not shown) in the control circuit 311 when being accumulate to a default value, control circuit 311 promptly can be sent a burning identification code to identification circuit 322, and the selected and corresponding address wire of desire burning fuse, according to first or second kind of situation in following first to the 3rd preferred embodiment, the start-up routine step, carry out burning, produce a tetrad code (as 1011), and behind the chip that is recorded in ink jet-print head (consulting the chip 14 of Fig. 2) of inciting somebody to action, as shown in Figure 5, printer can detect this ink jet-print head via output 324 and surpass its useful life, so can guarantee the print quality of ink jet-print head.Moreover, when arbitrary will the exhausting in three kinds of color ink, also can send an instruction according to setting, produce a tetrad code (as 1011), and behind the chip that is recorded in ink jet-print head of inciting somebody to action, the ink jet-print head that printer can be detected the card release casket has surpassed its service life and has refused to use this card casket.
Transistor described in following first to the 3rd preferred embodiment all is field-effect transistor (FET), is called for short transistor.
First preferred embodiment:
Seeing also Fig. 6, is that the present invention's first preferred embodiment one or four bit shift buffers 40 are incorporated into and gone here and there out identification circuit figure, mainly is in series by one first, 1 second, 1 the 3rd, 1 the 4th single place shift buffer fuse circuit 40a, 40b, 40c, 40d.
With the first single place shift buffer fuse circuit 40a is example, and each sequencing path is that one first group of fuse of series connection is connected in parallel to the transistor of a correspondence and transistor that one second group one fuse (fuse) is connected in parallel to a correspondence constitutes.Each bar sequencing path can provide the identification code of a bit length, wherein the first transistor 411 of first group of parallel connection and first fuse 413 are connected mutually with the transistor seconds 412 and second fuse 414 of one second group of parallel connection, the electric connection line of the two is the output 41 of the identification code of a bit length, first group of other end with second group is electrically connected on a ground connection 415 and a power supply 416 respectively, and the grid of the first transistor 411 and transistor seconds 412 is electrically connected on one first address wire (A respectively
i) the 417 and second address wire (A
j) 418.The sequencing of the first single place shift buffer 40a one of only can be in following two kinds of situations:
(1) first kind of situation: when applying an appropriate voltage V
DdIn power supply 416, to duty, and when closing transistor seconds 412 by second address wire 418, this sequencing path is from power supply 416 by second fuse 414 by first address wire, 417 conducting the first transistors 411, continuous through the loop of the first transistor 411 to ground connection 415, this appropriate voltage V
DdSecond fuse 414 is blown, be equivalent to a low signal of 0, promptly finish the sequencing of the first single place shift buffer 40a, and identification code ' 0 ' of a bit length can be provided detecting in output 41 as described later.
(2) second kinds of situations: when applying an appropriate voltage V
DdIn power supply 416, to duty, and when closing the first transistor 411 by first address wire 417, this sequencing path is from power supply 416 by transistor seconds 412 by second address wire, 418 conducting transistor secondses 412, continuous through the loop of first fuse 413 to ground connection 415, this appropriate voltage V
DdFirst fuse 413 is blown, be equivalent to a high signal of 1, promptly finish the sequencing of the first single place shift buffer 40a, and identification code ' 1 ' of a bit length can be provided detecting in output 41 as described later.
Second, third, the 4th single place shift buffer 40b, 40c, 40d can be according to same principles, respectively according to first kind of situation, finish second, third, the sequencing of the 4th single place shift buffer 40b, 40c, 40d, and can provide identification code ' 0 ' of a bit length respectively, maybe can comply with second kind of situation, finish second, third, the sequencing of the 4th single place shift buffer 40b, 40c, 40d, and can provide identification code ' 1 ' of a bit length respectively.
As shown in Figure 6, when by first, second, the 3rd, the 4th single place shift buffer 40a, 40b, 40c, 40d finishes its sequencing respectively, and can provide the identification code 0 or 1 of a bit length respectively, when start-up loading 45 successively, pulse 1, after the pulse 2 47, its the present invention who is in series first preferred embodiment four bit shift buffers 40 can be read single place shift buffer 40d in regular turn in output 48,40c, 40b, the binary code storage values of 40a, printer can be according to its corresponding feature, the model of identification card casket, colour or black and white, print density, present situations such as life-span whether have been surpassed.Noticeable be in, model, sequence number, colour or black and white, the print densities etc. of identification card casket are after can finishing sequencing before dispatching from the factory, the discriminating function of performance identification circuit, whether surpassing the life-span then is in dispatching from the factory and using to certain state, the side finishes its sequencing, the discriminating function of performance identification circuit.
Second preferred embodiment:
Seeing also Fig. 7, is that the present invention's second preferred embodiment one or four bit shift buffers 50 are incorporated into and gone here and there out identification circuit figure, mainly is in series by one first, 1 second, 1 the 3rd, 1 the 4th single place shift buffer fuse circuit 50a, 50b, 50c, 50d.
With the first single place shift buffer fuse circuit 50a is example, each bar sequencing path can provide the identification code of a bit length, wherein a transistor 511 is mutual series connection with a fuse 514, the electric connection line of the two is the output 51 of the identification code of a bit length, the other end of transistor 511 and fuse 514 is electrically connected on one first power supply 515 and a second source 516 respectively, and the grid of transistor 511 is electrically connected on an address wire (A
i) 517, the first power ends can be connected to a voltage source so that voltage to be provided, and also can be connected to an address wire.
The sequencing of the first single place shift buffer fuse circuit 50a one of only can be in following two kinds of situations:
(1) first kind of situation: when applying a high voltage V
1In first power supply 515, with second source 516 ground connection, and by address wire 517 turn-on transistors 511 during to duty, this sequencing path is from first power supply 515 by transistor 511, continuous through the loop of fuse 514 to second source 516 (ground connection), this high voltage V
1Fuse 514 is blown, be equivalent to a low signal of 0, promptly finish the sequencing of the first single place shift buffer fuse circuit 50a, and identification code ' 0 ' of a bit length can be provided detecting in output 51 as described later.When four bit shift buffers 50 will read first, by second source 516 input one logic high potential and address wire 517 is connected to electronegative potential closes transistor 511, because fuse 514 has blown, just can't be sent to first of four bit shift buffers 50 by output 51 in the logic high potential of second source 516, first data that makes four bit shift buffers 50 is one to be equivalent to a low signal of 0.
(2) second kinds of situations: when burning identification data, close transistor, make a voltage V who puts on first power supply 515 by address wire 517
1Can't be equivalent to a high signal of 1 with detecting in output 51 as described later, and identification code ' 1 ' of a bit length can be provided by fuse 514 to keep the complete and electric conductivity of fuse 514.When four bit shift buffers 50 will read first, by second source 516 input one logic high potential and address wire 517 is connected to electronegative potential closes transistor 511, logic high potential at second source 516 is passed through fuse 514, continuous be sent to first of four bit shift buffers 50 through output 51, first data that makes four bit shift buffers 50 is one to be equivalent to a high signal of 1.
Second, third, the 4th single place shift buffer fuse circuit 50b, 50c, 50d can be according to same principles, respectively according to first kind of situation, finish second, third, the sequencing of the 4th single place shift buffer fuse circuit 50b, 50c, 50d, and can provide identification code ' 0 ' of a bit length respectively, maybe can comply with second kind of situation, finish second, third, the sequencing of the 4th single place shift buffer fuse circuit 50b, 50c, 50d, and can provide identification code ' 1 ' of a bit length respectively.
As shown in Figure 7, when by first, second, the 3rd, the 4th single place shift buffer fuse circuit 50a, 50b, 50c, 50d finishes its sequencing respectively, and can provide the identification code 0 or 1 of a bit length respectively, when start-up loading 55 successively, pulse 1, after the pulse 2 57, its the present invention who is in series first preferred embodiment four bit shift buffers 50 can be read single place shift buffer fuse circuit 50d in regular turn in output 58,50c, 50b, the binary code storage values of 50a, printer can be according to its corresponding feature, the model of identification card casket, colour or black and white, print density, present situations such as life-span whether have been surpassed.Noticeable be in, model, sequence number, colour or black and white, the print densities etc. of identification card casket are after can finishing sequencing before dispatching from the factory, the discriminating function of performance identification circuit, whether surpassing the life-span then is in dispatching from the factory and using to certain state, the side finishes its sequencing, the discriminating function person of performance identification circuit.
The 3rd preferred embodiment:
Seeing also Fig. 8, is that the present invention's the 3rd preferred embodiment one or four bit shift buffers 60 are incorporated into and gone here and there out identification circuit figure, mainly is in series by one first, 1 second, 1 the 3rd, 1 the 4th single place shift buffer fuse circuit 60a, 60b, 60c, 60d.
With the first single place shift buffer fuse circuit 60a is example, each bar sequencing path can provide the identification code of a bit length, wherein a Bing Lian transistor 611 is connected with a fuse 614, the electric connection line of the two is the output 61 of the identification code of a bit length, fuse 614 is electrically connected on an output 61 with 611 in transistor in parallel, the other end of transistor 611 is electrically connected on a ground connection 615, the other end of fuse 614 is electrically connected on a power supply 616, and the grid of transistor 611 is electrically connected on an address wire (A
i) 617.The sequencing of the first single place shift buffer fuse circuit 60a one of only can be in following two kinds of situations:
(1) first kind of situation: when applying an appropriate voltage in power supply 616, by an address wire 617 turn-on transistors 611 to duty, this sequencing path is from power supply 616 by fuse 614, continuous through the loop of transistor 611 to ground connection 615, this appropriate voltage just can make fuse 614 blow, be equivalent to a low signal of 0 with detecting in output 61 as described later, promptly finished the sequencing of the first single place shift buffer fuse circuit 60a, and identification code ' 0 ' of a bit length can be provided.When four bit shift buffers 60 will read first, by power supply 616 input one logic high potential and address wire 617 is connected to electronegative potential closes transistor 611, because fuse 614 has blown, just can't be sent to first of four bit shift buffers 60 by output 61 in the logic high potential of power supply 616, first data that makes four bit shift buffers 60 is one to be equivalent to a low signal of 0.
(2) second kinds of situations: when burning identification data, close transistor 611 by address wire 617, make the voltage that puts on power supply 616 can't blow fuse 614 to keep the complete and electric conductivity of fuse 614, be equivalent to a high signal of 1 with detecting in output 61 as described later, promptly finished the sequencing of the first single place shift buffer fuse circuit 60a, and identification code ' 1 ' of a bit length can be provided.When four bit shift buffers 60 will read first, by power supply 616 input one logic high potential and address wire 617 is connected to electronegative potential closes transistor 611, logic high potential at power supply 616 is passed through fuse 614, continuous be sent to first of four bit shift buffers 60 through output 61, first data that makes four bit shift buffers 60 is one to be equivalent to a high signal of 1.
Second, third, the 4th single place shift buffer fuse circuit 60b, 60c, 60d can be according to same principles, respectively according to first kind of situation, finish second, third, the sequencing of the 4th single place shift buffer fuse circuit 60b, 60c, 60d, and can provide identification code ' 0 ' of a bit length respectively, maybe can comply with second kind of situation, finish second, third, the sequencing of the 4th single place shift buffer fuse circuit 60b, 60c, 60d, and can provide identification code ' 1 ' of a bit length respectively.
As shown in Figure 8, when by first, second, the 3rd, the 4th single place shift buffer 60a, 60b, 60c, 60d finishes its sequencing respectively, and can provide the identification code 0 or 1 of a bit length respectively, when start-up loading 65 successively, pulse 1, after the pulse 2 67, its the present invention who is in series first preferred embodiment four bit shift buffers 60 can be read single place shift buffer 60d in regular turn in output 68,60c, 60b, the binary code storage values of 60a, printer can be according to its corresponding feature, the model of identification card casket, colour or black and white, print density, present situations such as life-span whether have been surpassed.Noticeable be in, model, sequence number, colour or black and white, the print densities etc. of identification card casket are after can finishing sequencing before dispatching from the factory, the discriminating function of performance identification circuit, whether surpassing the life-span then is in dispatching from the factory and using to certain state, the side finishes its sequencing, the discriminating function of performance identification circuit.
The 4th preferred embodiment
Fig. 9 is that the present invention's the 4th preferred embodiment one n bit shift buffer 70 is incorporated into and gone here and there out identification circuit figure, mainly is in series by one first, 1 second, 1 the 3rd to one n single place shift buffer fuse circuit 70a, 70b, 70c to 70n.
With the first single place shift buffer fuse circuit 70a is example, each bar sequencing path can provide the identification code of a bit length, wherein a first transistor 711 is mutual series connection with a fuse 714, the electric connection line of the two is the output 71 of the identification code of a bit length, the other end of the first transistor 711 and fuse 714 is electrically connected on one first power supply 715 and a second source 716 respectively, one transistor seconds 712 is located between second source 716 and the ground connection 719, and the grid of the first transistor 711 and transistor seconds 712 is electrically connected on one first address wire (A respectively
i) 717 and 1 second address wire (A
j) 718, the first power ends can be connected to a voltage source so that voltage to be provided, and also can be connected to an address wire.The sequencing of the first single place shift buffer fuse circuit 70a one of only can be in following two kinds of situations:
(1) first kind of situation: when applying an appropriate voltage, by the first address wire (A in power supply 715
i) the 717 and second address wire (A
j) 718 respectively conducting the first transistors 711 and transistor seconds 712 to duty, this sequencing path is from first power supply 715 by the first transistor 711, continuous through fuse 714 and transistor seconds 712 a loop to ground connection 719, this appropriate voltage just can make fuse 714 blow, be equivalent to a low signal of 0 with detecting in output 71 as described later, promptly finished the sequencing of the first single place shift buffer fuse circuit 70a, and identification code ' 0 ' of a bit length can be provided.When n bit shift buffer 70 will read first, by power supply 716 input one logic high potential and address wire 717 and 718 is connected to electronegative potential closes transistor 711 and 712, because fuse 714 has blown, just can't be sent to first of four bit shift buffers 70 by output 71 in the logic high potential of power supply 716, first data that makes n bit shift buffer 70 is one to be equivalent to a low signal of 0.
(2) second kinds of situations: when burning identification data by the first address wire (A
i) 7 17 and 1 second address wire (A
j) 718 close the first transistor 711 and transistor seconds 712, make the voltage that puts on first power supply 715 can't blow fuse 714 to keep the complete and electric conductivity of fuse 714, be equivalent to a high signal of 1 with detecting in output 71 as described later, promptly finished the sequencing of the first single place shift buffer fuse circuit 70a, and identification code ' 1 ' of a bit length can be provided.When n bit shift buffer 70 will read first, by power supply 716 input one logic high potential and address wire 717 and 718 is connected to electronegative potential closes transistor 711 and 712, logic high potential at power supply 716 is passed through fuse 714, continuous be sent to first of n bit shift buffer 70 through output 71, first data that makes n bit shift buffer 70 is one to be equivalent to a high signal of 1.
Second, third to n single place shift buffer fuse circuit 70b, 70c to 70n can be according to same principle, respectively according to first kind of situation, finish second, third sequencing to n single place shift buffer fuse circuit 70b, 70c to 70n, and can provide identification code ' 0 ' of a bit length respectively, maybe can comply with second kind of situation, finish second, third sequencing, and identification code ' 1 ' of a bit length can be provided respectively to n single place shift buffer fuse circuit 70b, 70c to 70n.
As shown in Figure 9, when by first, second, the 3rd to n single place shift buffer 70a, 70b, 70c to 70n finishes its sequencing respectively, and can provide the identification code 0 or 1 of a bit length respectively, when start-up loading 75 successively, pulse 1, after the pulse 2 77, its the present invention who is in series the 4th preferred embodiment n bit shift buffer 70 can be read single place shift buffer 70n to 70b in regular turn in output 78, the binary code storage values of 70a, printer can be according to its corresponding feature, the model of identification card casket, colour or black and white, print density, present situations such as life-span whether have been surpassed.Noticeable be in, model, sequence number, colour or black and white, the print densities etc. of identification card casket are after can finishing sequencing before dispatching from the factory, the discriminating function of performance identification circuit, whether surpassing the life-span then is in dispatching from the factory and using to certain state, the side finishes its sequencing, the discriminating function of performance identification circuit.
One advantage of this preferred embodiment is n bar address wire (A
1-A
n) programmable nx (n-1)/2 fuse, for example only need five address wire (A
1, A
2, A
3, A
1, A
5) be 10 fuses of programmable, be listed below:
| | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 |
| First address wire (the A i) | A 1 | A 1 | A 1 | A 1 | A 2 | A 2 | A 2 | A 3 | A 3 | A 4 |
| Second address wire (the A j) | A 2 | A 3 | A 4 | A 5 | A 3 | A 4 | A 5 | A 4 | A 5 | A 5 |
The offset buffer 40,50,60,70 of going here and there out the incorporating into of the invention described above can be integrated in the chip 18 of Fig. 2 printhead 14; Four bit shift buffers 40,50,60 also can be replaced by a plurality of bit shift buffers of other number; The discriminating function of identification circuit is not limited to model, sequence number, colour or black and white, the print density etc. of identification card casket, and whether the also non-detection card casket that only limits to of the discriminating function of identification circuit has surpassed its service life.
In sum, U.S. Pat 5,940, the 095th, before dispatching from the factory, finish sequencing after, the performance discriminating function, the present invention can finish sequencing before dispatching from the factory, also can be in dispatching from the factory and using to certain state, the side finishes its sequencing, the discriminating function of performance identification circuit.In addition, U.S. Pat 5,940,095th in light shield planning mode, is set up a binary code storage values (0 or 1) decided at the higher level but not officially announced in the single place shift buffer, and the present invention sets up a binary code storage values decided at the higher level but not officially announced in the fuse mode.Therefore, technological means of the present invention and can reach effect all with U.S. Pat 5,940,095 revealer has significant difference.
The above preferred embodiment only of the present invention, all equalizations of being done according to the present patent application claim change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (34)
1. ink jet-print head identification circuit is arranged on the printhead of a printer one card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One power end, an earth terminal, an output, one first address wire and one second address wire;
One the first transistor of one parallel connection and one first fuse are located between earth terminal and the output, and the grid of field-effect transistor is electrically connected on first address wire; And
One transistor seconds of one parallel connection and one second fuse are located between power end and the output, and the grid of field-effect transistor is electrically connected on second address wire;
Wherein work as the first address wire conducting the first transistor to duty, second address wire is closed transistor seconds, by the appropriate voltage that power end is received, second fuse is blown; And
When the second address wire conducting transistor seconds to duty, first address wire is closed the first transistor, by the appropriate voltage that power end is received, first fuse is blown.
2. ink jet-print head identification circuit as claimed in claim 1, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket are also formed an offset buffer.
3. ink jet-print head identification circuit as claimed in claim 1, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket are also formed a Digital Logical Circuits.
4. ink jet-print head identification circuit as claimed in claim 1, wherein fixed data is at least one in model, sequence number, colour or the black and white of card casket and the print density.
5. ink jet-print head identification circuit as claimed in claim 1, wherein the ink storage quantity of the present situation data validation card casket of detection card casket is to be lower than a setting value.
6, a kind of ink jet printing device is used for providing to an ink-jet printer identification information of a printhead, comprising:
One control circuit in order to produce the control signal, is controlled the operation of this ink-jet printer;
One ink jet-print head, the control signal according to control circuit produces prints;
One identification circuit is arranged on the printhead of a card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One power end, an earth terminal, an output, one first address wire and one second address wire;
One the first transistor of one parallel connection and one first fuse are located between earth terminal and the output, and the grid of field-effect transistor is electrically connected on first address wire; And
One transistor seconds of one parallel connection and one second fuse are located between power end and the output, and the grid of field-effect transistor is electrically connected on second address wire;
Wherein control signal when control circuit produces, to duty, second address wire is closed transistor seconds in the first address wire conducting the first transistor, by the appropriate voltage that power end is received, second fuse is blown; And
Control signal when control circuit produces, to duty, first address wire is closed the first transistor in the second address wire conducting transistor seconds, and an appropriate voltage of being received by power end is blown first fuse.
7. an ink jet-print head discrimination method in order to the fixedly data of identification one printer one card casket and the present situation data of detection card casket, comprises the following steps:
A. on a printhead of a printer one card casket an identification circuit is set, this identification circuit comprises:
One power end, an earth terminal, an output, one first address wire and one second address wire;
One the first transistor of one parallel connection and one first fuse are located between earth terminal and the output, and the grid of field-effect transistor is electrically connected on first address wire; And
One transistor seconds of one parallel connection and one second fuse are located between power end and the output, and the grid of field-effect transistor is electrically connected on second address wire;
B. work as the first address wire conducting the first transistor to duty, second address wire is closed transistor seconds, by the appropriate voltage that power end is received, second fuse is blown; And
C. work as the second address wire conducting transistor seconds to duty, first address wire is closed the first transistor, by the appropriate voltage that power end is received, first fuse is blown.
8. ink jet-print head identification circuit is arranged on the printhead of a printer one card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One first power end, a second source end, an output and an address wire;
One fuse is located between second source end and the output; And
One transistor is located between first power end and the output, and transistorized grid is electrically connected on address wire;
Wherein when second source ground connection, the address wire turn-on transistor is to duty, and the appropriate voltage that first power end is received is blown fuse.
9. ink jet-print head identification circuit as claimed in claim 8, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket also can be formed an offset buffer.
10. ink jet-print head identification circuit as claimed in claim 8, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket also can be formed a Digital Logical Circuits.
11. ink jet-print head identification circuit as claimed in claim 8, wherein first power end is connected to a voltage source, also can be connected to an address wire, so that voltage to be provided.
12. ink jet-print head identification circuit as claimed in claim 8, wherein fixed data is at least one in model, sequence number, colour or the black and white of card casket and the print density.
13. identification circuit as claimed in claim 8, wherein the ink storage quantity of the present situation data validation card casket of detection card casket is to be lower than a setting value.
14. an ink jet printing device is used for providing to an ink-jet printer identification information of a printhead, comprising:
One control circuit in order to produce the control signal, is controlled the operation of this ink-jet printer;
One ink jet-print head, the control signal according to control circuit produces prints;
One identification circuit, it is to be arranged on the printhead of a card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One first power end, a second source end, an output and an address wire;
One fuse is located between second source end and the output; And
One transistor is located between first power end and the output, and transistorized grid is electrically connected on address wire;
Wherein when second source ground connection, control circuit produces the control signal, and to duty, the appropriate voltage that first power end is received is blown fuse in the address wire turn-on transistor.
15. ink jet printing device as claimed in claim 14, wherein first power end is connected to a voltage source, also can be connected to an address wire, so that voltage to be provided.
16. an ink jet-print head discrimination method in order to the fixedly data of identification one printer one card casket and the present situation data of detection card casket, comprises the following steps:
A. on a printhead of a printer one card casket an identification circuit is set, this identification circuit comprises:
One first power end, a second source end, an output and an address wire;
One fuse is located between second source end and the output; And
One transistor is located between first power end and the output, and transistorized grid is electrically connected on address wire;
B, when second source ground connection, the address wire turn-on transistor is to duty, the appropriate voltage that first power end is received is blown fuse.
17. ink jet-print head discrimination method as claimed in claim 16, wherein first power end is connected to a voltage source, also can be connected to an address wire, so that voltage to be provided.
18. an ink jet-print head identification circuit is arranged on the printhead of a printer one card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One power end, a ground connection, an output and an address wire;
One fuse is located between power end and the output; And
One transistor is located between output and the ground connection, and transistorized grid is electrically connected on address wire;
Wherein work as the address wire turn-on transistor to duty, the appropriate voltage that power end is received is blown fuse.
19. ink jet-print head identification circuit as claimed in claim 18, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket are also formed an offset buffer.
20. ink jet-print head identification circuit as claimed in claim 18, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket are also formed a Digital Logical Circuits.
21. ink jet-print head identification circuit as claimed in claim 18, wherein this power end is connected to a voltage source, also can be connected to an address wire, so that voltage to be provided.
22. ink jet-print head identification circuit as claimed in claim 18, wherein fixed data is at least one in model, sequence number, colour or the black and white of card casket and the print density.
23. ink jet-print head identification circuit as claimed in claim 18, wherein the ink storage quantity of the present situation data validation card casket of detection card casket is to be lower than a setting value.
24. an ink jet printing device is used for providing to an ink-jet printer identification information of a printhead, comprising:
One control circuit in order to produce the control signal, is controlled the operation of this ink-jet printer;
One ink jet-print head, the control signal according to control circuit produces prints;
One identification circuit, it is to be arranged on the printhead of a card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One power end, a ground connection, an output and an address wire;
One fuse is located between power end and the output; And
One transistor is located between output and the ground connection, and transistorized grid is electrically connected on address wire;
Wherein control signal when control circuit produces, to duty, the appropriate voltage that power end is received is blown fuse in the address wire turn-on transistor.
25. ink jet printing device as claimed in claim 24, wherein this power end is connected to a voltage source, also can be connected to an address wire, so that voltage to be provided.
26. an ink jet-print head discrimination method in order to the fixedly data of identification one printer one card casket and the present situation data of detection card casket, comprises the following steps:
A. on a printhead of a printer one card casket an identification circuit is set, this identification circuit comprises:
One power end, a ground connection, an output and an address wire;
One fuse is located between power end and the output; And
One transistor is located between output and the ground connection, and transistorized grid is electrically connected on address wire;
B. work as the address wire turn-on transistor to duty, the appropriate voltage that power end is received is blown fuse.
27. ink jet-print head discrimination method as claimed in claim 26, wherein this power end is connected to a voltage source, also can be connected to an address wire, so that voltage to be provided.
28. an ink jet-print head identification circuit, it is to be arranged on the printhead of a printer one card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One first power end, a second source end, an earth terminal, an output, one first address wire and one second address wire;
One the first transistor is connected mutually with a fuse, and the electric connection line of the two is an output, and the other end of the first transistor and fuse is electrically connected on first power supply and second source respectively; And
One transistor seconds is located between second source and the earth terminal, and the grid of the first transistor and transistor seconds is electrically connected on one first address wire and one second address wire respectively;
Wherein work as first address wire and second address wire difference conducting the first transistor and transistor seconds to duty, the appropriate voltage by first power end is received is blown fuse.
29. ink jet-print head identification circuit as claimed in claim 28, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket are also formed an offset buffer.
30. ink jet-print head identification circuit as claimed in claim 28, a plurality of identification circuits that wherein are arranged on the printhead of printer card casket are also formed a Digital Logical Circuits.
31. ink jet-print head identification circuit as claimed in claim 28, wherein fixed data is at least one in model, sequence number, colour or the black and white of card casket and the print density.
32. ink jet-print head identification circuit as claimed in claim 28, wherein the ink storage quantity of the present situation data validation card casket of detection card casket is to be lower than a setting value.
33. an ink jet printing device is used for providing to an ink-jet printer identification information of a printhead, comprising:
One control circuit in order to produce the control signal, is controlled the operation of this ink-jet printer;
One ink jet-print head, the control signal according to control circuit produces prints;
One identification circuit, it is to be arranged on the printhead of a card casket, is used for the fixedly data of identification card casket and the present situation data of detection card casket, comprising:
One first power end, a second source end, an earth terminal, an output, one first address wire and one second address wire;
One the first transistor is connected mutually with a fuse, and the electric connection line of the two is an output, and the other end of the first transistor and fuse is electrically connected on first power supply and second source respectively; And
One transistor seconds is located between second source and the earth terminal, and the grid of the first transistor and transistor seconds is electrically connected on one first address wire and one second address wire respectively;
Wherein work as first address wire and second address wire difference conducting the first transistor and transistor seconds to duty, the appropriate voltage by first power end is received is blown fuse.
34. an ink jet-print head discrimination method in order to the fixedly data of identification one printer one card casket and the present situation data of detection card casket, comprises the following steps:
A. on a printhead of a printer one card casket an identification circuit is set, this identification circuit comprises:
One first power end, a second source end, an earth terminal, an output, one first address wire and one second address wire;
One the first transistor is connected mutually with a fuse, and the electric connection line of the two is an output, and the other end of the first transistor and fuse is electrically connected on first power supply and second source respectively; And
One transistor seconds is located between second source and the earth terminal, and the grid of the first transistor and transistor seconds is electrically connected on one first address wire and one second address wire respectively;
B. work as first address wire and second address wire difference conducting the first transistor and transistor seconds to duty, the appropriate voltage by first power end is received is blown fuse.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03102203 CN1208194C (en) | 2003-01-27 | 2003-01-27 | Ink-jet printing head identification circuit and method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03102203 CN1208194C (en) | 2003-01-27 | 2003-01-27 | Ink-jet printing head identification circuit and method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1521004A true CN1521004A (en) | 2004-08-18 |
| CN1208194C CN1208194C (en) | 2005-06-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 03102203 Expired - Fee Related CN1208194C (en) | 2003-01-27 | 2003-01-27 | Ink-jet printing head identification circuit and method thereof |
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| Country | Link |
|---|---|
| CN (1) | CN1208194C (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100363180C (en) * | 2004-12-15 | 2008-01-23 | 桦晶科技股份有限公司 | Ink-jet printing head identification system for printer possessing circular counter and programmed circuit |
| CN101254700B (en) * | 2007-02-27 | 2010-11-10 | 研能科技股份有限公司 | Identification code circuit for ink box repeat use |
| CN102963129A (en) * | 2011-09-01 | 2013-03-13 | 研能科技股份有限公司 | Identification circuit applicable to ink gun |
| CN106965556A (en) * | 2016-01-14 | 2017-07-21 | 研能科技股份有限公司 | Ink-jet controlling circuit |
-
2003
- 2003-01-27 CN CN 03102203 patent/CN1208194C/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100363180C (en) * | 2004-12-15 | 2008-01-23 | 桦晶科技股份有限公司 | Ink-jet printing head identification system for printer possessing circular counter and programmed circuit |
| CN101254700B (en) * | 2007-02-27 | 2010-11-10 | 研能科技股份有限公司 | Identification code circuit for ink box repeat use |
| CN102963129A (en) * | 2011-09-01 | 2013-03-13 | 研能科技股份有限公司 | Identification circuit applicable to ink gun |
| CN102963129B (en) * | 2011-09-01 | 2015-01-14 | 研能科技股份有限公司 | Identification circuit applicable to ink gun |
| CN106965556A (en) * | 2016-01-14 | 2017-07-21 | 研能科技股份有限公司 | Ink-jet controlling circuit |
| CN106965556B (en) * | 2016-01-14 | 2019-04-09 | 研能科技股份有限公司 | Ink-jet controlling circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1208194C (en) | 2005-06-29 |
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