CN1516829A - 数字集成电路中非所欲外部操作侦测之防止 - Google Patents

数字集成电路中非所欲外部操作侦测之防止 Download PDF

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CN1516829A
CN1516829A CNA028120000A CN02812000A CN1516829A CN 1516829 A CN1516829 A CN 1516829A CN A028120000 A CNA028120000 A CN A028120000A CN 02812000 A CN02812000 A CN 02812000A CN 1516829 A CN1516829 A CN 1516829A
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C·奥米勒
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G·埃克斯泰恩
S·瓦尔泰恩
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
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    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]

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Abstract

在一数字电路(1)中包含一异步电路(2)，异步电路(2)之电压系藉由一随机电压抖动的方式被改变。供应电压之随机变化造成在异步电路中个别的操作程序一时间抖动，藉此一个别测量之人为的同步化在侧信道攻击系被预防。

Description

数字集成电路中非所欲外部操作侦测之防止
本发明系关于一种预防一数字集成电路中操作之外部侦测的方法以及关于一数字集成电路其中在数字集成电路中非所欲的外部操作侦测系被预防。本发明特别是关于所谓侧信道攻击之一对策，当其被执行用以分析数字集成电路时。
在许多集成电路中，未经授权的人必须被防止分析其操作模式。作为范例的电路其中此攻击方案被避开的是芯片卡ICs，安全ICs或甚至此ICs之个别的电路模块，例如，举例来说，保密共处理器。未授权的人必须被防止分析一保密共处理器所执行之编码算法是不需解释的。
未授权的人所使用之典型的攻击方式，例如，尝试分析一保密共处理器实行之编码算法系被参考如所谓的侧信道攻击。此侧信道攻击包含，例如，不同的功率消耗分析(DPA＝不同功率分析)，有关IC电磁辐射之侦测以及所谓计时攻击。
与同步电路相比，异步电路，在其中自身计时电路系，具有其程序系不直接地与一时间周期对象相关之有利的特征，例如时钟。因此，其程序并不显示任何此一时间周期对象之依赖，藉此在异步电路中成功的执行侧信道攻击系更加困难。然而，即使在异步电路中，开关组件之数量系经常依赖特定操作而被处理，因此在一般处理资料依赖中，其系反映在相关发生之电路功率消耗之量变曲线中。
为了使此攻击更加困难，插入所谓的随机等待状态到处理过程中是已知的。亦知道去强迫在CPU中操作之执行的阻碍。在随机等待状态的插入中，操作的计时之可能的变化系被限制，因为一延迟不能被活化或者一等待状态不能在任何时间被插入。甚至阻碍CPU中之执行的测量也不能完全阻挡侧信道攻击，因为此阻碍可被不同的功率消耗变化所侦测。
从此现有技术开始，本发明的目的系提供一种防止一包含异步电路之数字集成电路中外部操作侦测之方法。
本发明之另一目的系发展具有一异步电路之一数字集成电路，以此方式在数字电路中非所欲的外部操作侦测系被预防。
第一个目的系藉由根据权利要求第1项的方法达成。
第二个目的系藉由根据权利要求第3项所述之集成电路达成。
本发明提供一种防止一集成电路中包含有一异步电路之外部操作侦测之方法，其包含时间变化异步电路之一供应电压用以及时位移异步电路中执行操作时间的方法步骤。在一本发明较佳的观点中，此供应电压之变化以一随机方式发生。
本发明系基于在操作之执行次数中藉由叠上一随机控制的，其系非可预测的，在供应电压上之时间抖动所获得之一随机时间抖动的发现，藉此一人为的侧信道攻击中个别测量的同步化系被预防。然而，在异步电路中操作执行中之时间抖动并不导致程序错误，因为根据他们的特性，异步电路影响一自动同步化。
根据本发明之一装置观点，数字集成电路包含一异步电路以及一装置用以时间变化供应电压，以其异步电路系被提供，藉此异步电路中操作执行时间系被时间位移。
在下列叙述中，本发明之一较佳的实施例将被详细参考随附的图标。
唯一且只有一个的附图显示一数字集成电路之方块图根据本发明之一较佳实施例。
发明的数字集成电路整体参考数字编号1包含一异步电路2，一产生器电路3用以产生真实随机数字(真实随机数字产生器)，一数字模拟转换器4，在其输入侧上，产生器电路所产生之数字随机数字系被供给且在输出侧，制造一相映的模拟目标电压值，以及一电压调节器5，在输入侧，模拟目标电压值系从数字模拟转换器4被供应且，在输出侧，产生一实际电压值形成异步电路2之供应电压。用来制造真实随机数字之产生器电路3，依次，包含一噪声来源6产生一噪声电压以及一随机数字产生器7藉由噪声来源6来驱动。
然而，代替此处所示之噪声来源6以及随机数字产生器7之结合，任何其它随机产生器可以被使用来产生随机数字当数字模拟转换器输入数量时。
在此处所示较佳实施例中，电压调节器5包含一伺服组件8，一实际值侦测装置9以及一差异生成装置10，对于其输入，一方面来说，模拟目标电压值从数字模拟转换器4且，另一方面来说，一输出讯号从实际数值侦测装置9系被供给。
产生器电路3，数字模拟转换器4以及电压调节器5一起来自一装置用以随机地时间变化供应电压或一装置用以叠上一随机时间抖动在供应电压上，以其异步电路2系被提供，分别地。因为随机变化供应电压，有一随机时间抖动在异步电路之操作执行中，藉此在所谓的侧信道攻击之个别测量之人为的同步化系被预防或者，至少，使其更加困难。

Claims (8)

1.一种预防在数字集成电路(1)中操作之外部侦测的方法，该电路(1)包含一异步电路(2)，该方法包含随时间变化该异步电路(2)之一供应电压用以时间位移该异步电路之中操作之执行时间的步骤。
2.根据权利要求第1项所述之方法，其中该供应电压之时间变化以一随机方式发生。
3.一种数字集成电路包含：
一异步电路(2)，以及
装置(3、4、5)用以随时间变化该异步电路(2)之一供应电压以时间位移该异步电路(2)中操作之执行点。
4.根据权利要求第3项所述之数字集成电路，其中用来时间变化该供应电压之该装置(3、4、5)包含一随机数字产生器(7)。
5.根据权利要求第4项所述之数字集成电路，其中用来时间变化该供应电压之该装置(3、4、5)更包含一噪声电压来源(6)驱动该随机数字产生器(7)。
6.根据权利要求第4或第5项所述之数字集成电路，其中用来时间变化该供应电压之该装置(3、4、5)更包含一数字模拟转换器(4)用来将该随机数字产生器(7)所产生之数字数值转变成一模拟电压。
7.根据权利要求第3至第6项其中之一项所述之数字集成电路，其中用来时间变化该供应电压之该装置(3、4、5)更包含一电压调节器(5)。
8.根据权利要求第3至第7项其中之一项所述之数字集成电路，其中该异步电路(2)系被形成用以执行一编码算法。
CNB028120000A 2001-06-13 2002-05-16 防止非所欲外部操作侦测的方法和数字集成电路 Expired - Fee Related CN1244037C (zh)

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ATE291754T1 (de) 2005-04-15
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US20040143747A1 (en) 2004-07-22
EP1430376B1 (de) 2005-03-23
DE50202577D1 (de) 2005-04-28
CN1244037C (zh) 2006-03-01
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WO2002101520A2 (de) 2002-12-19
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