CN1510432A - Radio frequency pulse angle phase setting method and circuit thereof - Google Patents

Radio frequency pulse angle phase setting method and circuit thereof Download PDF

Info

Publication number
CN1510432A
CN1510432A CNA021497737A CN02149773A CN1510432A CN 1510432 A CN1510432 A CN 1510432A CN A021497737 A CNA021497737 A CN A021497737A CN 02149773 A CN02149773 A CN 02149773A CN 1510432 A CN1510432 A CN 1510432A
Authority
CN
China
Prior art keywords
radio
frequency pulse
quadrature phase
negate
logical circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA021497737A
Other languages
Chinese (zh)
Other versions
CN100375904C (en
Inventor
胡曾千
臧继运
邢研
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ANKE HIGH-TECH Co Ltd SHENZHEN CITY
Original Assignee
ANKE HIGH-TECH Co Ltd SHENZHEN CITY
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ANKE HIGH-TECH Co Ltd SHENZHEN CITY filed Critical ANKE HIGH-TECH Co Ltd SHENZHEN CITY
Priority to CNB021497737A priority Critical patent/CN100375904C/en
Publication of CN1510432A publication Critical patent/CN1510432A/en
Application granted granted Critical
Publication of CN100375904C publication Critical patent/CN100375904C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

In the present invention, transposition and complementing for envelope signal can be achieved by utilizing trigonometrical function transform when 90 degree, 180 degree and 270 degree set for carrier right angle phase is changed-over to zero degree phase so that problem which there is no function of right angle phase and no function of processing ability for carrier output in some synthesizers of single chip direct digital frequency type can be solved.

Description

A kind of radio-frequency pulse quadrature phase method to set up and circuit
Invention field
What the present invention relates to is a kind of method and circuit that radio frequency (RF) impulse phase is set in magnetic resonance imaging (MRI) system.
Background technology
In the MRI system, use the modulated RF pulse of following form (supposing that first phase is 0, down together):
a(t)cos(ωt+φ)+b(t)sin(ωt+φ)………(1)
Wherein, a (t)+jb (t) is the complex envelope signal, and cos (ω t+ φ)+j sin (ω t+ φ) is the complex carrier signal signal, and ω is a RF pulse carrier frequency, and φ is a RF pulse carrier phase place.In MRI imaging sequence (sequence), often use the quadrature phase setting, promptly φ is set to 0 °, and 90 °, 180 °, 270 °.
When producing the RF pulse with Direct Digital Frequency Synthesizers (DDS), in DDS, only there be the cos and the sin table in 1/4 cycle usually, utilize symmetry can export the complete cycle.In this RF pulse producing method, the trigonometric function conversion below utilizing:
cos(α+90°)=-sinα………(2)
cos(α+180°)=-cosα………(3)
cos(α+270°)=sinα………(4)
sin(α+90°)=cosα………(5)
sin(α+180°)=-sinα………(6)
sin(α+270°)=-cosα………(7)
Being provided with of quadrature phase can be converted to table address counter counts down (being the exchange of sin and cos table) and the output negate is realized.For example just adopted this method in the AN9101 type magnetic resonance imaging spectrometer of U.S. ANALOGIC company.Its functional block diagram is seen Fig. 1 (only having realized real RF pulse).The method of this set radio-frequency pulse quadrature phase is to realize by conversion and negate to the radio frequency pulse carrier. and the shortcoming that this method exists is: and (1) required function all is made of discrete component, and integrated level is low; (2) envelope modulation is finished at analog domain, and the drift of simulating signal, DC component, orthogonality difference etc. can cause the reduction of modulating performance.
In recent years, many companies have released monolithic DDS, as the STEL1175 of INTERSIL company, and 1178, the AD9854 of AD company, 9857 etc.All devices that these chips are used DDS, in all being integrated in as phase accumulator, cos/sin table etc., some simplifies and has made things convenient for the design of DDS in also digital modulator even D/A (DAC) etc. all being integrated in greatly.But these chips all do not have quadrature phase that function is set, and because integrated level is very high, inner structure is mostly not open, the output of table address counter, the output of carrier wave numeral are not guided to outside the sheet, can't allow table address counter counts down, also can't export negate, therefore can not utilize said method that quadrature phase is set again carrier wave.
Summary of the invention
The purpose of this invention is to provide a kind of method, this method can solve and use monolithic direct-type digital synthesizer (DDS) in the MRI system, and this class DDS chip had not both had quadrature phase that function is set, when also not having the Peripheral Interface of quadrature phase setting, radio-frequency pulse is provided with the problem of quadrature phase.
Second purpose of the present invention is based on said method, proposes a kind of radio-frequency pulse quadrature phase circuit is set.
The trigonometric function conversion of above-mentioned (2)~(7) formula that the present invention utilizes, and with (2)~(7) formula difference substitution (1) formula, then have:
a(t)cos(ωt+90°)+b(t)sin(ωt+90°)
=a(t)[-sin(ωt)]+b(t)cos(ωt)=[-a(t)]sin(ωt)+b(t)cos(ωt)………(8)
a(t)cos(ωt+180°)+b(t)sin(ωt+180°)
=a(t)[-cos(ωt)]+b(t)[-sin(ωt)]=[-a(t)]cos(ωt)+[-b(t)]sin(ωt)………(9)
a(t)cos(ωt+270°)+b(t)sin(ωt+270°)
=a(t)sin(ωt)+b(t)[-cos(ωt)]=a(t)sin(ωt)+[-b(t)]cos(ωt)………(10)
To get (11)~(13) formula after the arrangement of (8)~(10) formula
a(t)cos(ωt+90°)+b(t)sin(ωt+90°)
=b(t)cos(ωt)+[-a(t)]sin(ωt)………(11)
a(t)cos(ωt+180°)+b(t)sin(ωt+180°)
=[-a(t)]cos(ωt)+[-b(t)]sin(ωt)………(12)
a(t)cos(ωt+270°)+b(t)sin(ωt+270°)
=[-b(t)]cos(ωt)+a(t)sin(ωt)………(13)
By (11)~(13) formula as seen, the RF pulse carrier phase place of desire (1) formula statement is set to 90 °, and 180 °, 270 ° quadrature phase, the polarity and the transposition of complex envelope signal realize in the time of can being 0 ° by change RF pulse carrier phase place.According to this principle, radio-frequency pulse quadrature phase method to set up of the present invention may further comprise the steps:
A) radio-frequency pulse digitizing complex envelope signal a (n), b (n) are sent in the transposition logic, whether the output of being controlled the transposition logic by the quadrature phase control signal replaces,
B) the negate logic is accepted the output signal of described transposition logic, and whether the output of controlling described negate logic by described quadrature phase control signal negate, the digitizing complex envelope signal a ' of phase place after being provided with (n), b ' (n),
C) the digitizing complex envelope signal a ' after described phase place is provided with (n), b ' (n) inserts the envelope input end of DDS device respectively, with digital carrier frequency cos (ω n), corresponding the multiplying each other of sin (ω n) in the DDS device, output radio-frequency pulse orthogonal modulation component a ' is (n) sin (ω n) of cos (ω n) and b ' (n)
D) (n) cos (ω n) and (n) sin (ω n) addition of b ' of described radio-frequency pulse orthogonal modulation component a ', (n) (n) sin (ω n) of cos (ω n)+b ' of radio-frequency pulse a '.
And
Step a), b) described in the quadrature phase control signal by two-position signal C0, the C1 realization of encoding.
When set a (n), when b (n) imports with two's complement, the described negate of step b) is with the replacement of negating.
Said method, when the definition described quadrature phase control signal C0=0, during C1=0, the digitizing complex envelope signal a ' after described phase place is provided with (n)=a (n), b ' (n)=b (n), the carrier phase of radio-frequency pulse is constant;
When definition when described quadrature phase control signal C0=1, C1=0, the digitizing complex envelope signal a ' after described phase place is provided with (n)=b (n), b ' (n)=-a (n), the carrier phase of radio-frequency pulse is set to 90 °;
When definition when described quadrature phase control signal C0=0, C1=1, the digitizing complex envelope signal a ' after described phase place is provided with (n)=-a (n), b ' (n)=-b (n), the carrier phase of radio-frequency pulse is set to 180 °;
When definition when described quadrature phase control signal C0=1, C1=1, the digitizing complex envelope signal a ' after described phase place is provided with (n)=-b (n), b ' (n)=a (n), the carrier phase of radio-frequency pulse is set to 270 °.
For realizing that second technical scheme that purpose adopted of the present invention is: a kind of radio-frequency pulse quadrature phase is provided with circuit, have two multipliers and a totalizer of digitizing envelope signal and digitizing carrier signal being synthesized radio-frequency pulse, comprise: the first transposition logical circuit 1 and the second transposition logical circuit 2, two input ends of each transposition logical circuit link to each other with digitizing complex envelope signal a (n), b (n) respectively; Two negate logical circuits, the input end of the first negate logical circuit 4 and the second negate logical circuit 5 respectively with first and second the transposition logical circuits corresponding linking to each other of output terminal; A quadrature phase control circuit 3, its input end and quadrature phase control signal C0, C1 links to each other, its output terminal links to each other with the control end of the first and second transposition logical circuits and the first and second negate logical circuits respectively, instruction according to control signal, whether the output of the described quadrature phase control circuit 3 controls first and second transposition logical circuits replaces, whether the output of also controlling the first and second negate logical circuits is reverse, digitizing complex envelope signal a ' after the output terminal of the described first and second negate logical circuits obtains phase place respectively and is provided with (n), b ' (n), and (n) with described a ', b ' (n) sends into respectively in described two multipliers.
And
Described transposition logical circuit is realized with the alternative MUX.
Described negate logical circuit is realized with XOR gate.
Method and circuits provided by the invention, owing to adopted elder generation that the transposition of digitizing complex envelope signal, negate are handled, behind the digitizing complex envelope signal after obtaining phase place and being provided with, digitizing complex envelope signal after again phase place being provided with inserts the envelope input end of highly integrated device DDS, synthesize radio-frequency pulse with the digitizing carrier signal in the DDS device, make the MRI system when adopting the high integration digital frequency synthesizer, setting to radio-frequency pulse quadrature phase is achieved, and method is ingenious, realize easily, circuit is simple, and cost is low.And because envelope modulation is to finish at numeric field, so modulation accurately, does not have drift, no DC component.
Description of drawings
Fig. 1 is the functional-block diagram of prior art
Fig. 2 is a theory diagram of the present invention
Fig. 3 is the circuit diagram of one embodiment of the invention
Embodiment
As shown in Figure 2, a (n), b (n) is digitized complex envelope signal, a ' (n), b ' is a digitizing complex envelope signal after phase place is provided with (n), C0, C1 is the control signal of quadrature phase, as quadrature phase control signal C0, during the combination of C1 different coding, the duty difference of each functional module shown in Figure 2, digitizing complex envelope signal a ' after the gained phase place is provided with (n), b ' result (n) is also different, a ' (n), b ' (n) with the digitizing carrier frequency cos (ω n) of DDS output, sin (ω n) signal is at digital multiplier 6, after correspondence multiplies each other in 7, therefore addition in totalizer 8 has realized 0 ° of radio-frequency pulse quadrature phase, 90 °, 180 °, 270 ° setting.Digitizing complex envelope signal a ' after relation between the setting of quadrature phase control signal C0, C1 and each the module duty and gained phase place are provided with is (n), b ' result (n) is by shown in the table 1:
Table 1
?C1 ?C0 Quadrature phase is provided with Transposition logical one, 2 states Negate logic 4 states Negate logic 5 states ?a’(n) ?b’(n)
?0 ?0 ????0° Do not replace Negate not Negate not ?a(n) ?b(n)
?0 ?1 ????90° Transposition Negate not Negate ?b(n) ?-a(n)
?1 ?0 ????180° Do not replace Negate Negate ?-a(n) ?-b(n)
?1 ?1 ????270° Transposition Negate Negate not ?-b(n) ?a(n)
The present invention is further illustrated below in conjunction with Fig. 3.Fig. 3 is one embodiment of the present of invention.In this embodiment, the transposition logical one selects 1 MUX U1~U4 to realize with 2, and transposition logic 2 usefulness 2 select 1 MUX U5~U8 to realize, with the selecting side A/B of c0 control MUX.When c0 was 0, U1~U8 selected 1A, 2A, 3A, 4A to output to 1Y, 2Y, 3Y, 4Y, at this moment the state that does not replace in the corresponding tables 1; When c0 was 1, U1~U8 selected 1B, 2B, 3B, 4B to output to 1Y, 2Y, 3Y, 4Y, at this moment the state of transposition in the corresponding tables 1.And a, the b of negate logic 4 usefulness XOR gate U9~U11 and U12 realize, a, the b of negate logic 5 usefulness XOR gate U13~U15 and U16 realizes.Its negate principle is: when a (n), b (n) are two's complement form whens input, according to the complement arithmetic rule, negate equals true form and negates and add 1.Because a (n), b (n) are 14bit in this example, therefore adding 1 error only is 1/2 14So this example is cast out it, promptly with the replacement negate of negating.According to the XOR gate truth table, when two input ends were identical, XOR gate was output as 0, was output as 1 when different, therefore made control end with one of them input, i.e. another input of may command oppositely or is not oppositely exported.When this control (input) end was 0, another is input as 0 XOR gate output was 0 also, and vice versa.The do not negate state of (bearing) of this correspondence.When this control (input) end was 1, another was input as 0 XOR gate and is output as 1, and vice versa.The negate state of (bearing) of this correspondence.According to table 1, the state of negate logic 4 and c1 is identical, and (c1 is a not negate of 0 negate logic 4, be 1 negate), so directly control negate logic 4 with c1, and the identical (negate not when c0 and c1 are identical of the XOR attitude of negate logic 5 and c0 and c1, negate simultaneously not), so control negate logic 5 through XOR gate U16d XOR output back with c0 and c1.Output a ' (n), b ' (n) directly receives monolithic DDS device envelope input end (this example AD9857 does not draw), in multiplier, totalizer, cos/sin show, DAC all is integrated in.

Claims (10)

1. radio-frequency pulse quadrature phase method to set up, this method is utilized the trigonometric function conversion, converts the setting of radio-frequency pulse quadrature phase the processing of complex envelope when radio frequency pulse carrier phase place is 0 ° to, and this method may further comprise the steps:
A) radio-frequency pulse digitizing complex envelope signal a (n), b (n) are sent in the transposition logic, whether the output of being controlled the transposition logic by the quadrature phase control signal replaces,
B) the negate logic is accepted the output signal of described transposition logic, and whether the output of controlling described negate logic by described quadrature phase control signal negate, the digitizing complex envelope signal a ' of phase place after being provided with (n), b ' (n),
C) the digitizing complex envelope signal a ' after described phase place is provided with (n), b ' (n) respectively with digital carrier frequency cos (ω n), corresponding the multiplying each other of sin (ω n), output radio-frequency pulse orthogonal modulation component a ' is (n) sin (ω n) of cos (ω n) and b ' (n),
D) (n) cos (ω n) and (n) sin (ω n) addition of b ' of described radio-frequency pulse orthogonal modulation component a ', (n) (n) sin (ω n) of cos (ω n)+b ' of radio-frequency pulse a '.
2. a kind of radio-frequency pulse quadrature phase method to set up according to claim 1 is characterized in that: step a), b) described in the quadrature phase control signal by two-position signal C0, the C1 realization of encoding.
3. a kind of radio-frequency pulse quadrature phase method to set up according to claim 1 is characterized in that: when set a (n), when b (n) imports with two's complement, the described negate of step b) is with the replacement of negating.
4. a kind of radio-frequency pulse quadrature phase method to set up according to claim 2, it is characterized in that: when definition described quadrature phase control signal C0=0, C1=0, digitizing complex envelope signal a ' after described phase place is provided with (n)=a (n), b ' (n)=b (n), the carrier phase of radio-frequency pulse is constant.
5. a kind of radio-frequency pulse quadrature phase method to set up according to claim 2, it is characterized in that: when definition described quadrature phase control signal C0=1, C1=0, digitizing complex envelope signal a ' after described phase place is provided with (n)=b (n), b ' (n)=-a (n), the carrier phase of radio-frequency pulse is set to 90 °.
6. a kind of radio-frequency pulse quadrature phase method to set up according to claim 2, it is characterized in that: when definition described quadrature phase control signal C0=0, C1=1, digitizing complex envelope signal a ' after described phase place is provided with (n)=-a (n), b ' (n)=-b (n), the carrier phase of radio-frequency pulse is set to 180 °.
7. a kind of radio-frequency pulse quadrature phase method to set up according to claim 2, it is characterized in that: when definition described quadrature phase control signal C0=1, C1=1, digitizing complex envelope signal a ' after described phase place is provided with (n)=-b (n), b ' (n)=a (n), the carrier phase of radio-frequency pulse is set to 270 °.
8. a radio-frequency pulse quadrature phase is provided with circuit, have two multipliers (6) (7) and the totalizer (8) that digitizing envelope signal and digitizing carrier signal are synthesized radio-frequency pulse, it is characterized in that, comprise: the first transposition logical circuit (1) and the second transposition logical circuit (2), two input ends of each transposition logical circuit link to each other with digitizing complex envelope signal a (n), b (n) respectively; Two negate logical circuits, the input end of the first negate logical circuit (4) and the second negate logical circuit (5) replace corresponding linking to each other of output terminal of logical circuit (2) with the first transposition logical circuit (1) and second respectively; A quadrature phase control circuit (3), its input end and quadrature phase control signal C0, C1 links to each other, its output terminal links to each other with the control end of the first transposition logical circuit (1) with the second transposition logical circuit (2) and the first negate logical circuit (4) and the second negate logical circuit (5) respectively, instruction according to control signal, whether the output of described quadrature phase control circuit (3) the control first transposition logical circuit (1) and the second transposition logical circuit (2) replaces, whether the output of also controlling the first negate logical circuit (4) and the second negate logical circuit (5) is reverse, digitizing complex envelope signal a ' after the output terminal of the described first negate logical circuit (4) and the second negate logical circuit (5) obtains phase place respectively and is provided with (n), b ' (n), and (n) with described a ', b ' (n) sends into respectively in described two multipliers.
9. a kind of radio-frequency pulse quadrature phase according to claim 8 is provided with circuit, it is characterized in that: described transposition logical circuit is realized with the alternative MUX.
10. a kind of radio-frequency pulse quadrature phase according to claim 8 is provided with circuit, it is characterized in that: described negate logical circuit is realized with XOR gate.
CNB021497737A 2002-12-24 2002-12-24 Radio frequency pulse angle phase setting method and circuit thereof Expired - Lifetime CN100375904C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB021497737A CN100375904C (en) 2002-12-24 2002-12-24 Radio frequency pulse angle phase setting method and circuit thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB021497737A CN100375904C (en) 2002-12-24 2002-12-24 Radio frequency pulse angle phase setting method and circuit thereof

Publications (2)

Publication Number Publication Date
CN1510432A true CN1510432A (en) 2004-07-07
CN100375904C CN100375904C (en) 2008-03-19

Family

ID=34233788

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB021497737A Expired - Lifetime CN100375904C (en) 2002-12-24 2002-12-24 Radio frequency pulse angle phase setting method and circuit thereof

Country Status (1)

Country Link
CN (1) CN100375904C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100365425C (en) * 2005-04-30 2008-01-30 华东师范大学 Positive-negative phase combined pulse with selective excitation and its implementing method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4324952A (en) * 1978-08-21 1982-04-13 Harris Corporation Direct function receivers and transmitters for multichannel communications system
US4694254A (en) * 1985-06-10 1987-09-15 General Electric Company Radio-frequency spectrometer subsystem for a magnetic resonance imaging system
JPH07323019A (en) * 1994-05-31 1995-12-12 Shimadzu Corp Mr imaging apparatus
US5705959A (en) * 1996-10-08 1998-01-06 The United States Of America As Represented By The Secretary Of The Air Force High efficiency low distortion amplification
US6492809B1 (en) * 1998-12-04 2002-12-10 Schlumberger Technology Corporation Preconditioning spins near a nuclear magnetic resonance region
JP3984377B2 (en) * 1998-10-01 2007-10-03 モトローラ株式会社 Digital modulator
US6043707A (en) * 1999-01-07 2000-03-28 Motorola, Inc. Method and apparatus for operating a radio-frequency power amplifier as a variable-class linear amplifier
JP3454760B2 (en) * 1999-10-22 2003-10-06 ジーイー・メディカル・システムズ・グローバル・テクノロジー・カンパニー・エルエルシー Phase distribution measuring method and apparatus, phase correcting method and apparatus, and magnetic resonance imaging apparatus
JP3472520B2 (en) * 2000-02-15 2003-12-02 三菱電機株式会社 Digital phase detector and pulse radar device
JP3875479B2 (en) * 2000-10-20 2007-01-31 ジーイー・メディカル・システムズ・グローバル・テクノロジー・カンパニー・エルエルシー Magnetic resonance imaging device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100365425C (en) * 2005-04-30 2008-01-30 华东师范大学 Positive-negative phase combined pulse with selective excitation and its implementing method

Also Published As

Publication number Publication date
CN100375904C (en) 2008-03-19

Similar Documents

Publication Publication Date Title
CN1104694C (en) Method of generating sine/cosine function and apparatus using same
US10187232B1 (en) Multi-band radio frequency transmitter
CN1387718A (en) Method of clipping signal amplitudes in modulation system
CN1630983A (en) Electronic circuit with a sigma delta a/d converter
CN1280433A (en) Amplitude calculating circuit
CN1510432A (en) Radio frequency pulse angle phase setting method and circuit thereof
CN1070327C (en) Pi/4 shift dqpsk modulator
CN1126339C (en) System and method for lookup table by NCO
US9565043B1 (en) Hybrid I-Q polar transmitter with quadrature local oscillator (LO) phase correction
CN101039110A (en) Square wave modulation circuit and modulation approach
CN1249940C (en) Orthogonal frequency division multiplexing receiver utilizing polar coordinate system and its method
CN1152538C (en) Gaussian minimum frequency-shift keying modulation method and equipment
CN1489824A (en) Oscillator transmission circuit and radio apparatus
CN1961556A (en) Generating higher order modulation using QPSK modulations
CN1115909C (en) Single-carrier-frequeney transmitter of GSM base station
CN86100908A (en) Single-side band modulation method, single side-band modulator and radio transmitter
CN1069991C (en) Digital signal recorder
CN1643775A (en) Transmitter arrangement for frequency modulation
CN101057404A (en) Frequency division by odd integers
CN1613644A (en) Circuit for clock interpolation
CN1707962A (en) Direct frequency-conversion delta-sigma receiver
US11483105B2 (en) Method and apparatus for generating baseband transmission signal in mobile communication system supporting multiple component carriers
CN1144436C (en) Quasi-orthogonal code mask generating device in mobile communication system
CN1354609A (en) Method for optimizing performance of transmitter of mobile radio system
CN1118996C (en) Digital communication system

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of invention: Radio frequency pulse angle phase setting method and circuit thereof

Effective date of registration: 20141226

Granted publication date: 20080319

Pledgee: Shenzhen SME credit financing guarantee Group Co.,Ltd.

Pledgor: SHENZHEN ANKE HIGH-TECH Co.,Ltd.

Registration number: 2014990001139

PLDC Enforcement, change and cancellation of contracts on pledge of patent right or utility model
PC01 Cancellation of the registration of the contract for pledge of patent right

Date of cancellation: 20160119

Granted publication date: 20080319

Pledgee: Shenzhen SME credit financing guarantee Group Co.,Ltd.

Pledgor: SHENZHEN ANKE HIGH-TECH Co.,Ltd.

Registration number: 2014990001139

PLDC Enforcement, change and cancellation of contracts on pledge of patent right or utility model
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of invention: Radio frequency pulse angle phase setting method and circuit thereof

Effective date of registration: 20160301

Granted publication date: 20080319

Pledgee: Shenzhen SME financing Company limited by guarantee

Pledgor: SHENZHEN ANKE HIGH-TECH Co.,Ltd.

Registration number: 2016990000154

PLDC Enforcement, change and cancellation of contracts on pledge of patent right or utility model
PC01 Cancellation of the registration of the contract for pledge of patent right

Date of cancellation: 20170330

Granted publication date: 20080319

Pledgee: Shenzhen SME financing Company limited by guarantee

Pledgor: SHENZHEN ANKE HIGH-TECH Co.,Ltd.

Registration number: 2016990000154

PC01 Cancellation of the registration of the contract for pledge of patent right
CP02 Change in the address of a patent holder

Address after: No.2 workshop, Lingya Industrial Park, No.1 Tangtou Road, Tangtou community, Shiyan street, Bao'an District, Shenzhen City, Guangdong Province

Patentee after: SHENZHEN ANKE HIGH-TECH Co.,Ltd.

Address before: 518067, No. 26, Mount Shun Road, Shekou, Guangdong, Shenzhen

Patentee before: SHENZHEN ANKE HIGH-TECH Co.,Ltd.

CP02 Change in the address of a patent holder
CX01 Expiry of patent term

Granted publication date: 20080319

CX01 Expiry of patent term