CN1490948A - Synchronous method for optical synchronous digital network - Google Patents
Synchronous method for optical synchronous digital network Download PDFInfo
- Publication number
- CN1490948A CN1490948A CNA021374961A CN02137496A CN1490948A CN 1490948 A CN1490948 A CN 1490948A CN A021374961 A CNA021374961 A CN A021374961A CN 02137496 A CN02137496 A CN 02137496A CN 1490948 A CN1490948 A CN 1490948A
- Authority
- CN
- China
- Prior art keywords
- clock
- byte
- network element
- node
- light mouth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Optical Communication System (AREA)
- Small-Scale Networks (AREA)
Abstract
This invention opens a synchronized method for optical synchronized data transmission network, this method is: uses two idle bytes ( marked ES1,ES2) in the overhead, marks separately the net element marks of net element benchmark clock and the net element numbers passing through the benchmark clock , the net element chooses the usable clock source according to the marking information in ES1,ES2 and S1 of SSMB. This invention can avoid the deterioration and forming ring of the clock at every node of network.
Description
Technical field
The present invention relates to the method for synchronous of Optical synchronization digital transmission network (SDH net), more particularly, is the method that prevents clock deterioration and one-tenth ring in a kind of SDH transmission equipment.
Background technology
At present, the method for synchronous in synchronous digital hierarchy transport (SDH net) transmission equipment has following several:
1, only uses SSMB
Under this method (existing domestic and ITU related specifications), after network element adopts a clock source, can be unavailable to the mouth of the light in the same way tranmitting data register in this clock source, other light mouth sends the clock quality in selected clock source, this method can prevent adjacent network element clock Cheng Huan, but can't detect the deterioration and the non-adjacent network element clock Cheng Huan of clock.
2, use the multi-frame of idle 4 compositions of SSMB and S1
As China Patent No. is 96194572, and name is called " in a kind of SDH network synchronously ", and U.S. Patent number is 6,185,216, and name is called the patent of " Synchronization in an SDH network ".In this method, in the multi-frame information of idle 4 compositions of S1 byte, comprised clock the numbering of all network elements of process, a network element is when preparing to adopt certain clock source, if the sign of oneself is arranged in this clock source multi-frame information of discovery, clock Cheng Huan then is described.But the realization of this method comparatively bothers, and needs the visit of hardware supports to idle 4 of S1 byte, and to receive enough at least 165 frame data could be as a complete Frame.
Summary of the invention
The object of the present invention is to provide a kind of method for synchronous of Optical synchronization digital transmission network, overcoming or to avoid existing communication device synchronization method and can not avoid into ring fully or judge the too shortcoming of trouble, and can avoid the clock deterioration or produce timing loop.
Technical scheme of the present invention is:
Use the bytes (being designated hereinafter simply as ES1 byte, ES2 byte) of two free time in the expense to identify the network element number of network element reference clock and the network element number of this reference clock process respectively; Network element is selected available clock source according to the identification information in the S1 byte of ES1 byte, ES2 byte and SSMB.
According to such scheme:
When not having available clock, network element enters the maintenance mode clock;
At first selecting clock during the network element initialization, with this network element of ES1 byte-identifier, is 1 with the ES2 byte-identifier, and the S1 byte of transmission is designated clock quality and does not know;
Network element comprises the steps: when selecting available clock
A, network element select S1 can with, number be not equal to this node number and ES2 byte value clock source with nowhere to turn to the network element in police, the ES1 byte less than LOOP_GATE, if available clock number is 0, then enter the maintenance mode clock, go to step F, otherwise continue the step down;
Whether exist the ES1 byte value identical in the clock source of selecting among B, the determining step A, but the unequal clock of the value of S1 byte if exist, then enters the maintenance pattern, goes to step F, otherwise continue the step down;
C, judge the ES2 byte whether the clock source is arranged in the clock source that steps A is selected value less than BAD_GATE, if exist, then in the clock source of ES2, select the highest-ranking clock of S1 byte source less than BAD_GATE; If do not exist, in all clock sources that steps A is selected, select the highest-ranking clock of S1 byte;
D, the clock source number of selecting as if step C have only 1, change step F, otherwise select the clock source of ES2 byte value minimum;
E, the clock source of selecting as if step D outnumber 1, then the clock source of selecting side slogan minimum;
Corresponding information is known in S1, ES1, the acceptance of the bid of ES2 byte that network element will send in the current optimal clock source that F, basis are determined;
When network element was chosen external clock, S1 byte sent the external clock quality, ES1 byte-identifier present networks node number, and the ES2 byte is 1;
When network element was chosen maintenance pattern or internal clock, S1 byte tranmitting data register quality was not known, ES1 byte-identifier present networks node number, and the ES2 byte is 1;
When network element was chosen light mouth clock, S1 byte sent unavailable to light mouth in the same way, and other light mouth is sent the clock quality of selected light mouth, the ES1 byte be in the selected light mouth clock with the value of ES1 byte, the ES2 byte is that the ES2 byte value adds 1 in the selected light mouth clock.
Wherein: LOOP_GATE represents through the network element number too much, and clock is the minimum network element number of the reference clock process of Cheng Huan, and BAD_GATE represents through the network element number more, and clock quality is the minimum network element number of the reference clock process of deterioration.
The present invention is in using the STM-N signal the overhead byte S1, also utilized two free consumption bytes in the expense, made each node of network can effectively avoid the deterioration and the one-tenth ring of clock, compared with the prior art scheme, select according to clear and definite the method simple possible.
Description of drawings
Fig. 1 is the flow chart that invention realizes;
Fig. 2 is in the SDH network of ring type structure, the schematic diagram of each node selection clock source and treatment S 1, ES1, ES2 byte;
Fig. 3 is in SDH network shown in Figure 2, under the situation that the higher external timing signal of clock credit rating breaks down, and the schematic diagram of each node selection clock source and treatment S 1, ES1, ES2 byte;
Fig. 4 is in SDH network shown in Figure 2, after fault takes place, selects the schematic diagram of clock source and treatment S 1, ES1, ES2 byte when each node enters stable state;
Fig. 5 is in the tangent SDH network of a kind of two rings, the schematic diagram of each node selection clock source and treatment S 1, ES1, ES2 byte;
Fig. 6 is in SDH network shown in Figure 5, in the moment of optical fiber appearance connection fault, and the schematic diagram of each node selection clock source and treatment S 1, ES1, ES2 byte in the network;
Fig. 7 is in SDH network shown in Figure 5, after optical fiber occurs connecting fault, selects the schematic diagram of clock source and treatment S 1, ES1, ES2 byte when each node enters stable state in the network.
Embodiment
In order to narrate conveniently, the present invention abbreviates the byte of two free time in the expense of using as ES1 byte and ES2 byte, be used for identifying the network element number of network element reference clock and the network element number of this reference clock process respectively, but this kind abbreviation is not to be used to limit technical scheme of the present invention.
Fig. 1 is the algorithm flow of the technical program.Wherein the network node initialization section is not drawn.During the network node electrifying startup, the clock output of inner crystal oscillator for this node is selected in initialization, after initialization finishes, carries out by algorithm circulation shown in Figure 1.At first execution in step 101, scan all configurations one by one the clock source, judge whether to exist the S1 can be with (being S1 non-" 1111 "), ES1 be not equal to this node number and ES2 less than LOOP_GATE (think clock as yet not Cheng Huan) with nowhere to turn to alert clock source.If do not exist, no available external clock and light mouth clock be describeds, then execution in step 108, selection maintenance mode clock or internal clock (for the network element of never locking external clock reference, can only with the inside crystal oscillator of this network element, i.e. internal clock); Otherwise enter step 102.Search in the clock source of selecting whether a plurality of clocks source is arranged, its ES1 is identical, but the S1 difference, this illustrates that this network element is in a unsure state, and selecting the maintenance pattern is optimum clock, and promptly execution in step 108.If there is not this phenomenon, then execution in step 103, continue to analyze ES2.Find out ES2 less than BAD_GATE in these clock sources, if all greater than this clock degraded threshold value, then execution in step 105, find the highest grade of clock quality clock source in these clock sources, then to step 106.For there being the not clock source of deterioration of clock, execution in step 104 is selected the highest grade of clock quality clock source at ES2 in less than the clock of BAD_GATE, also enters step 106.For the clock source of selecting, step 106 will be selected unique optimum clock according to the clock number that satisfies condition, greater than 1, step 107 will further be selected according to ES2 for number, and what the ES2 value was minimum be optimum, if still have a plurality of clocks source, selecting side slogan minimum be optimum clock; Otherwise clock source number is 1, and this clock is optimum clock.
After choosing current optimum clock source, by step 109, according to the attribute in clock source, treatment S 1 byte.If the current selected clock of network node source is an external timing signal, then execution in step 110, and outwards the S1 byte that sends is the clock quality grade of this external timing signal, so that other network node is synchronized with the clock of present networks node, and ES1 is the node number of this network element, and ES2 is 1.If the current selected clock of network node source is a light mouth clock, then execution in step 111, look into light mouth connection table, determine to exist several light mouths to be connected between this node and superior node according to the light slogan of locked clock, the S1 byte that sends to the mouth of light in the same way that is connected with superior node is unavailable (S1=" 1111 "), to prevent that the upper level network node from extracting clock by the light mouth from the present networks node, simultaneously sending S1 byte to other light mouth is the credit rating of selected light mouth clock, so that the next stage network node can be synchronized with the clock of present networks node, ES1 is changed to the ES1 of selected clock, and ES2 is that the ES2 of selected clock adds 1.If the current selected clock of network node source is for keeping mode clock, then execution in step 112, do not know (S1=" 0000 ") to all light mouth tranmitting data register quality, and ES1 is the node number of this network element, and ES2 is 1.
Fig. 2 is a kind of SDH network diagram of ring type structure, is made up of four network nodes, and wherein, node 1 is the net head, and it has inserted two external timing signals, and external timing signal 1 is clock G.811, and external timing signal 2 is transit exchange's clock G.812.
When the external timing signal 1 of node 1 breaks down, node 1 can not extract light mouth clock from node 4, because from the ES1 of the clock of light mouth 2 is exactly node 1, therefore node 1 will be selected the clock of external clock 2 as oneself, send simultaneously outwards S1 byte and be transit exchange's clock quality grade G.812, the ES1 of transmission, the value of ES2 are respectively 1,1.Node 2, node 4 will be synchronized with node 1, suppose that node 2 is synchronized with node 1 early than node 4, when node 3 is selected the clock source, the S1 of the clock of light mouth 1 is for G.812, ES1=1, ES2=2, the SS1 of the clock of light mouth 2 is for G.811, ES1=1, ES2=2 is because the ES1 unanimity of two light mouths, promptly initiate from same node, but clock quality is different, is respectively G.812, G.811, so the hold mode of entering, outwards the S1 that sends is not for knowing, ES1 is the node number 3 of node 3, and ES2 is 1, as shown in Figure 3.
After node 4 is synchronized with node 1, node 4 will be synchronized with the clock that node 1 sends from the light mouth, be light mouth 2 clocks, node 4 is unavailable to the S1 byte that light mouth 2 sends, the S1 byte that sends to light mouth 1 is clock quality grade G.812, ES1 is the node number 1 that light mouth 2 clocks carry, because this clock is through node 1, node 4, so ES2 is 2.For node 3, because from the clock quality of the clock of light mouth 1, light mouth 2, initiate node number, all the same through the node number, so light mouth 1 that selective light mouth numbering is little, the S1 that sends to light mouth 1 is unavailable, the S1 that sends to light mouth 2 is clock quality grade G.812, ES1=1, ES2=3, as shown in Figure 4.
Fig. 5 is more complicated SDH networking situation, and loop of being made up of node 1,2,3,41 and the loop of being made up of node 3,5,6,72 intersect at node 3, and wherein, node 1 inserts a G.811 external timing signal 1 of clock quality grade.When network normally moves, the whole network will be unified in locking clock source G.811.
When the optical fiber between node 3, the node 5 occurs connecting fault, as shown in Figure 6, node 5 is because light mouth 1 clock has alarm, and the S1 byte of light mouth 2 clocks is a clock quality unavailable (promptly at state shown in Fig. 5), therefore the clock of node 5 will enter the maintenance pattern, outwards the S1 that sends is not for knowing ES1=5, ES2=1.For node 6, because the clock quality grade (G.811) of light mouth 2 is higher than the clock quality grade (not knowing) of light mouth 1, selective light mouth 2 clocks, and to light mouth 1 transmission S1=G.811, ES1=1, ES2=5, as shown in Figure 6.
The S1=G.811 of the very fast discovery light of node 5 mouth 2, ES1=1, ES2=5.So selective light mouth 2 clocks.After each node of network entered stable state, the state diagram of selection clock and treatment S 1 as shown in Figure 7.
The present invention uses two idle bytes in the expense to cooperate traditional synchronization status message byte SSMB to carry out the automatic control of clock source selection, can select the optimal clock source of this node more clearly, and can avoid the clock deterioration or produce timing loop.
Claims (6)
1, a kind of method for synchronous of Optical synchronization digital transmission network is characterized in that: use the bytes (being designated hereinafter simply as ES1 byte, ES2 byte) of two free time in the expense to identify the network element number of network element reference clock and the network element number of this reference clock process respectively; Network element is selected available clock source according to the identification information in the S1 byte of ES1 byte, ES2 byte and SSMB.
2, the method for claim 1 is characterized in that: when not having available clock, network element enters the maintenance mode clock.
3, the method for claim 1 is characterized in that: at first selecting internal clock during the network element initialization, with this network element of ES1 byte-identifier, is 1 with the ES2 byte-identifier, and the S1 byte of transmission is designated clock quality and does not know.
4,, it is characterized in that comprising the steps: when network element is selected available clock as claim 1 or 3 described methods
A, network element select S1 byte can with, number be not equal to this node number and ES2 byte value clock source with nowhere to turn to the network element in police, the ES1 byte less than LOOP_GATE, if available clock number is 0, then enter maintenance mode clock or internal clock, go to step F, otherwise continue step B;
Whether exist the ES1 byte value identical in the clock source that B, determining step A select, but the unequal clock of the value of S1 byte if exist, then enters the maintenance pattern, goes to step F, otherwise continue step C;
C, judge the ES2 byte whether the clock source is arranged in the clock source that steps A is selected value less than BAD_GATE, if exist, then in the clock source of ES2, select the highest-ranking clock of S1 byte source less than BAD_GATE; If do not exist, in all clock sources that steps A is selected, select the highest-ranking clock of S1 byte;
D, the clock source number of selecting as if step C have only 1, change step F, otherwise select the clock source of ES2 byte value minimum;
E, the clock source of selecting as if step D outnumber 1, then the clock source of selecting side slogan minimum;
Corresponding information is known in S1, ES1, the acceptance of the bid of ES2 byte that network element will send in the current optimal clock source that F, basis are determined;
Wherein: LOOP_GATE represents through the network element number too much, and clock is the minimum network element number of the reference clock process of Cheng Huan, and BAD_GATE represents through the network element number more, and clock quality is the minimum network element number of the reference clock process of deterioration.
5, method as claimed in claim 4 is characterized in that also comprising all external clock references being selected when network element in the steps A is for net.
6, method as claimed in claim 4 is characterized in that:
When network element was chosen external clock, S1 byte sent the external clock quality, ES1 byte-identifier present networks node number, and the ES2 byte is 1;
When network element was chosen maintenance pattern or internal clock, S1 byte tranmitting data register quality was not known, ES1 byte-identifier present networks node number, and the ES2 byte is 1;
When network element was chosen light mouth clock, S1 byte sent unavailable to light mouth in the same way, and other light mouth is sent the clock quality of selected light mouth, the ES1 byte be in the selected light mouth clock with the value of ES1 byte, the ES2 byte is that the ES2 byte value adds 1 in the selected light mouth clock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN021374961A CN100407605C (en) | 2002-10-14 | 2002-10-14 | Synchronous method for optical synchronous digital network |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN021374961A CN100407605C (en) | 2002-10-14 | 2002-10-14 | Synchronous method for optical synchronous digital network |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1490948A true CN1490948A (en) | 2004-04-21 |
| CN100407605C CN100407605C (en) | 2008-07-30 |
Family
ID=34147046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN021374961A Expired - Fee Related CN100407605C (en) | 2002-10-14 | 2002-10-14 | Synchronous method for optical synchronous digital network |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100407605C (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1761177B (en) * | 2004-10-11 | 2010-05-05 | 中兴通讯股份有限公司 | Method for implementing lossless rearrangement in recovery process of virtual cascade connection |
| CN101141240B (en) * | 2007-04-18 | 2010-06-09 | 中兴通讯股份有限公司 | SDH clock automatically networking method |
| CN102006135A (en) * | 2010-12-03 | 2011-04-06 | 北京华环电子股份有限公司 | Method and device for selecting synchronous clock source |
| CN101141208B (en) * | 2006-09-05 | 2011-11-30 | 中兴通讯股份有限公司 | Synchronization method of optical synchronization digital transmission network |
| CN102368696A (en) * | 2011-09-14 | 2012-03-07 | 杭州华三通信技术有限公司 | Method for selecting synchronous clock source and apparatus thereof |
| CN110166158A (en) * | 2019-05-10 | 2019-08-23 | 江西山水光电科技股份有限公司 | A kind of guard method of OTN equipment clock |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1148896C (en) * | 1999-04-05 | 2004-05-05 | 深圳市中兴通讯股份有限公司 | Analog and data interface device for light synchronizing digital transmission equipment |
| CN1112783C (en) * | 2000-11-06 | 2003-06-25 | 深圳市中兴通讯股份有限公司 | Automatic clock line protecting method in implementing digital transmission group net |
-
2002
- 2002-10-14 CN CN021374961A patent/CN100407605C/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1761177B (en) * | 2004-10-11 | 2010-05-05 | 中兴通讯股份有限公司 | Method for implementing lossless rearrangement in recovery process of virtual cascade connection |
| CN101141208B (en) * | 2006-09-05 | 2011-11-30 | 中兴通讯股份有限公司 | Synchronization method of optical synchronization digital transmission network |
| CN101141240B (en) * | 2007-04-18 | 2010-06-09 | 中兴通讯股份有限公司 | SDH clock automatically networking method |
| CN102006135A (en) * | 2010-12-03 | 2011-04-06 | 北京华环电子股份有限公司 | Method and device for selecting synchronous clock source |
| CN102368696A (en) * | 2011-09-14 | 2012-03-07 | 杭州华三通信技术有限公司 | Method for selecting synchronous clock source and apparatus thereof |
| CN102368696B (en) * | 2011-09-14 | 2014-07-30 | 杭州华三通信技术有限公司 | Method for selecting synchronous clock source and apparatus thereof |
| CN110166158A (en) * | 2019-05-10 | 2019-08-23 | 江西山水光电科技股份有限公司 | A kind of guard method of OTN equipment clock |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100407605C (en) | 2008-07-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5060229A (en) | Serial transport frame format method | |
| CN101605012B (en) | Method and device for realizing positioning of frame header of synchronous digital system | |
| US6990517B1 (en) | Synchronization modelling using templates and network management system | |
| CN1187272A (en) | Synchronization in an SDH network | |
| CN101931524A (en) | Clock source selecting method of synchronous digital hierarchy network | |
| CN1490948A (en) | Synchronous method for optical synchronous digital network | |
| CN1112787C (en) | Virtual tributary/tributary unit transport method and apparatus | |
| CN108235413A (en) | The power optimization mechanism of framer handled by the frame alignment for serializing multiple channels | |
| CN1905558A (en) | Individualized ethernet exchange plate and data exchanging method | |
| CN1835459A (en) | Method of automatic detecting sigual transmitting line failare | |
| CN1274117C (en) | Method of preventing formation of timing loop in synchronous network | |
| CN102006158A (en) | Clock transmission method, synchronization method and system, and sending and receiving device | |
| CN101141240B (en) | SDH clock automatically networking method | |
| US7684442B2 (en) | Method and circuit for processing data in communication networks | |
| JPH09507011A (en) | Network structure | |
| CN1281005C (en) | Method and device for choosing and controlling clock source of synchronous digital optical network | |
| US20050190704A1 (en) | Method and apparatus for deriving optimal paths through a network subject to a subset sequence constraint | |
| CN101277243A (en) | System, node as well as method for detecting MAC address collision in loop network | |
| CN101141208A (en) | Synchronization method of Optical synchronization digital transmission network | |
| US7221687B2 (en) | Reference timing architecture | |
| AU680879B2 (en) | Method for synchronizing interconnected sdh and pdh telecommunications networks | |
| CN101562490A (en) | Method for clock synchronization as well as equipment frame and system thereof | |
| CN1549533A (en) | Virtual cascade time delay compensation restoring apparatus | |
| FI102442B (en) | Synchronization of a data communication network | |
| CN107342834A (en) | A kind of multi-channel adaptive clock correction algorithm towards time triggered communication |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080730 Termination date: 20171014 |