CN1471761A - 基于子码伴随式译码的级联分组码的迭代译码方法 - Google Patents
基于子码伴随式译码的级联分组码的迭代译码方法 Download PDFInfo
- Publication number
- CN1471761A CN1471761A CNA018180817A CN01818081A CN1471761A CN 1471761 A CN1471761 A CN 1471761A CN A018180817 A CNA018180817 A CN A018180817A CN 01818081 A CN01818081 A CN 01818081A CN 1471761 A CN1471761 A CN 1471761A
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- Prior art keywords
- decode
- cascading
- bloock
- iterated
- subcode
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
- H03M13/2909—Product codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
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- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Abstract
一种用于级联分组码及其特殊形式乘积码的迭代译码方法,它的子码译码是基于组合校验矩阵中部分选择的列而进行的伴随式译码。该列表译码算法能够有效地产生软输出值,从而使得级联分组码及其特殊形式乘积码的迭代译码可行。通过调整译码方法中的参数l,译码器的设计可以在性能和译码复杂度二者之间折衷选择。本发明的特点是在较低译码复杂度情况下能获得期望的纠错性能。
Description
PCT国内申请,说明书已公开。
Claims (1)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2001/001289 WO2003023973A1 (fr) | 2001-08-28 | 2001-08-28 | Procede de decodage repete pour le traitement en cascade de code de bloc sur la base du decodage du syndrome de sous-code |
Publications (1)
Publication Number | Publication Date |
---|---|
CN1471761A true CN1471761A (zh) | 2004-01-28 |
Family
ID=4574853
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CNA018180817A Pending CN1471761A (zh) | 2001-08-28 | 2001-08-28 | 基于子码伴随式译码的级联分组码的迭代译码方法 |
Country Status (2)
Country | Link |
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CN (1) | CN1471761A (zh) |
WO (1) | WO2003023973A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1770639B (zh) * | 2004-11-04 | 2012-03-28 | 艾格瑞系统有限公司 | 级联的迭代和代数译码 |
CN104393878A (zh) * | 2010-11-10 | 2015-03-04 | 英飞凌科技股份有限公司 | 用于纠正在编码比特序列中的至少单比特错误的设备和方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2712760B1 (fr) * | 1993-11-19 | 1996-01-26 | France Telecom | Procédé pour transmettre des bits d'information en appliquant des codes en blocs concaténés. |
US5809043A (en) * | 1996-10-08 | 1998-09-15 | Ericsson Inc. | Method and apparatus for decoding block codes |
US5930272A (en) * | 1997-06-10 | 1999-07-27 | Efficient Channel Coding, Inc. | Block decoding with soft output information |
-
2001
- 2001-08-28 WO PCT/CN2001/001289 patent/WO2003023973A1/zh active Application Filing
- 2001-08-28 CN CNA018180817A patent/CN1471761A/zh active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1770639B (zh) * | 2004-11-04 | 2012-03-28 | 艾格瑞系统有限公司 | 级联的迭代和代数译码 |
CN104393878A (zh) * | 2010-11-10 | 2015-03-04 | 英飞凌科技股份有限公司 | 用于纠正在编码比特序列中的至少单比特错误的设备和方法 |
US10200065B2 (en) | 2010-11-10 | 2019-02-05 | Infineon Technologies Ag | Apparatus and method for correcting at least one bit error within a coded bit sequence |
Also Published As
Publication number | Publication date |
---|---|
WO2003023973A1 (fr) | 2003-03-20 |
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