CN1459832A - Manufacturing method of dielectric layer - Google Patents
Manufacturing method of dielectric layer Download PDFInfo
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- CN1459832A CN1459832A CN 02119861 CN02119861A CN1459832A CN 1459832 A CN1459832 A CN 1459832A CN 02119861 CN02119861 CN 02119861 CN 02119861 A CN02119861 A CN 02119861A CN 1459832 A CN1459832 A CN 1459832A
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Abstract
A process for preparing a dielectric layer is suitable for the pipe type chemical gas-phase deposition reactor and contains two steps: deposition and cleaning pipeline. For said deposition step, a reaction gas is applied to the reactor while a gradient temp is provided to it for correcting the difference of said reaction gas in concentration and pressure. For the step of cleaning pipeline, a reverse gradient temp is provided for correcting the affection of temp effect to the ion concentration in substrate.
Description
Technical field
The present invention relates to a kind of manufacture method of dielectric layer, refer in particular to the manufacture method of the dielectric layer that is applicable to a boiler tube formula CVD (Chemical Vapor Deposition) reactor.
Background technology
In manufacture of semiconductor, general dielectric material is the method formation with chemical vapour deposition (CVD), and boiler tube formula CVD (Chemical Vapor Deposition) reactor can be carried out deposition manufacture process to the multi-disc wafer simultaneously.
Fig. 1 illustrates the generalized section of vertical heater tubular type CVD (Chemical Vapor Deposition) reactor always.Please refer to Fig. 1, reactor 100 is constituted with the quartz (Quartz) after tempered (Annealed).Reacting gas 102 is usually from the gas access, lower end 104 of boiler tube, and sending in the boiler tube (also has other different designs) certainly.106 of the wafers that deposition manufacture process is carried out in preparation place equally with on the made brilliant boat (Boat) 108 of quartz, and along with brilliant boat 108, put into the appropriate location of boiler tube 110, so that deposit.The remaining waste gas 112 of deposition reaction then is discharged from from gas vent 114 via vacuum system.Heater (end is illustrated on the figure) is not only to 106 heating of the wafers in the boiler tube 110, and can be suitable to the temperature of being born with wafer 106 the temperature increase of whole boiler tube 110.The reactor 100 that Fig. 1 is shown is in conjunction with low pressure, and hot wall and batch are designed to the chemical vapor depsotition equipment of one.Generally speaking, the wafer number that at every turn deposits can reach more than 120.
The maximum characteristics of reactor 100 designs are that the surface temperature of each wafer 106 in the boiler tube can be controlled at state extremely uniformly.But because the concentration of reacting gas can reduce along with the carrying out of reaction, therefore, the design of boiler tube 110 can face the surface deposition speed near the wafer 106 of process gas inlet 104, partly is high situation than other.For the deposition that makes each wafer 106 in the reaction boiler tube 110 all within certain uniformity.Therefore, temperature in the boiler tube 110 is into the variation of a gradient, make zone near process gas inlet 104, be under the lower temperature, improve step by step successively then, allow the wafer 106 near gas vent 114 be in higher temperature, so that remedy because of the descend gap of the deposition rate that caused of gas concentration.According to the difference of processing procedure, the front and back temperature difference in this boiler tube is greatly between 20 ℃ to 40 ℃.
In present business-like VLSI processing procedure, the material that deposits with boiler tube formula CVD (Chemical Vapor Deposition) reactor, mainly contain polysilicon (Poly Silicon), silica (Silicon Oxide), silicon nitride (Silicon Nitride) and helium silica (Silicon-Oxy-Nitride) etc.The temperature that processing procedure is controlled is greatly about about 400 ℃ to 850 ℃.
Though boiler tube formula CVD (Chemical Vapor Deposition) reactor can be carried out deposition manufacture process to the multi-disc wafer simultaneously, for the modifying factor gas concentration descend the deposition rate caused gap and the graded that produces a temperature in boiler tube can produce different temperature effect influences to the dopant ion concentration that originally has been implanted in the wafer.So the result of temperature effect influence can cause in the electrical generation difference than the product of narrow linewidth processing procedure, find via test, through the metal-oxide-semiconductor element that forms in the temperature gradient deposited silicon nitride layer of 780 ℃, 760 ℃ and 740 ℃, saturated drain electric current (saturated drain current in the wafer of levels, Idsat) difference is just up to 5-10%, difference even higher in some sample.
Summary of the invention
Main purpose of the present invention is exactly that a kind of manufacture method of dielectric layer is being provided, and particularly is applicable to a boiler tube formula CVD (Chemical Vapor Deposition) reactor, can revise the influence that substrate intermediate ion concentration causes because of temperature effect.
Another object of the present invention is that a kind of manufacture method of dielectric layer is being provided, and can reduce result because of temperature effect influence and cause in the electrical generation difference than the product of narrow linewidth processing procedure.For realizing above-mentioned purpose of the present invention, the present invention proposes the manufacture method of a dielectric layer, is applicable to a boiler tube formula CVD (Chemical Vapor Deposition) reactor, and this method comprises at least:
One deposition step comprises:
Provide a reacting gas to this boiler tube formula CVD (Chemical Vapor Deposition) reactor;
Provide a gradient temperature in this boiler tube formula CVD (Chemical Vapor Deposition) reactor with the concentration of proofreading and correct this reacting gas and the difference of pressure;
One removes the pipeline step, after finishing, this deposition step carries out, and this gradient temperature that reverses simultaneously.
The manufacture method of described dielectric layer, wherein the material of this dielectric layer is to be selected from the group that silicon nitride, silica and combination in any thereof are formed.
The manufacture method of described dielectric layer, wherein this gradient temperature is approximately between 400 degree Celsius are spent to Celsius 850.
The manufacture method of described dielectric layer, wherein this reacting gas is silane halide and ammonia.
The manufacture method of described dielectric layer, wherein this reacting gas is silane, nitrous oxide and nitrogen.
The manufacture method of described dielectric layer, wherein this reacting gas is oxygen, silane or tetraethoxysilane.
Concretely, a kind of manufacture method of dielectric layer is applicable to a boiler tube formula CVD (Chemical Vapor Deposition) reactor.The material of this dielectric layer can be the combination in any of silicon nitride, silica, silicon oxynitride or these three kinds of materials.Manufacture method comprises a deposition step and a removing pipeline step at least.Provide a reacting gas to boiler tube formula CVD (Chemical Vapor Deposition) reactor at deposition step, this reacting gas is with different change of material of required deposition, for example, with silane halide and ammonia deposited silicon nitride, with silane, nitrous oxide and nitrogen deposition silicon oxynitride and with oxygen, silane or oxygen, tetraethoxysilane cvd silicon oxide.
Simultaneously, provide a gradient temperature in this boiler tube formula CVD (Chemical Vapor Deposition) reactor with the concentration of proofreading and correct this reacting gas and the difference of pressure.The scope of gradient temperature can be different and different with the material of required deposition, but the temperature range that is suitable for is approximately between 400 degree Celsius are spent to Celsius 850.After finishing, deposition step must remove the pipeline step, with toxic gas residual in the purge reactor.This removing pipeline required time of step, time about and that deposition step carries out is suitable, so, the counter-rotating gradient temperature can reduce and is positioned at reative cell upper, middle and lower layer when removing the pipeline step, particularly between levels the difference of the temperature environment that wafer met with, to revise the influence that substrate intermediate ion concentration causes because of temperature effect.
Description of drawings
Fig. 1 illustrates the generalized section of vertical heater tubular type CVD (Chemical Vapor Deposition) reactor always.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, especially exemplified by a preferred embodiment, and conjunction with figs., be described in detail below:
Present embodiment is the manufacture method with dielectric layer provided by the invention, is applied to the processing procedure of a silicon nitride gate clearance wall.
Please refer to Fig. 1, wafer 106 is installed on the brilliant boat 108, and brilliant boat 108 is sent among the interior pipe 116 of boiler tube 110.Wafer 106 has gate structure and source/drain structure (end is illustrated on the figure).Source/drain structure generally forms the surface of the ion doping wafer of N-type or P-type.
Reacting gas 102 is by gas access 104 inputs that are positioned at the boiler tube below, and reacting gas 102 can be silane halide and ammonia, and wherein silane halide is preferably and is the dichloro silicomethane.The concentration of the reacting gas 102 on upper strata is lower because the concentration of the reacting gas 102 of boiler tube 110 lower floors is higher, for reach can be on all wafers the purpose of uniform deposition silicon nitride, must provide different reaction temperatures for three layers in upper, middle and lower by the control of the sectional temperature-controlled thermometer 118 that is positioned at pipe 116.
The concentration of boiler tube 110 lower floor's reacting gass 102 is higher, so temperature is set 740 degree Celsius for, the concentration of boiler tube 110 middle level reacting gass 102 is placed in the middle, the concentration of boiler tube 110 upper strata reacting gass 102 is lower so temperature is set 760 degree Celsius for, so temperature is set 780 degree Celsius for, so setting of gradient temperature can make the silicon nitride that deposits uniform thickness on all wafers.
After treating that the silicon nitride layer deposition is finished, must remove the pipeline step, with toxic gas residual in the purge reactor.This removing pipeline required time of step, time about and that deposition step carries out is suitable, so, the counter-rotating gradient temperature can reduce and is positioned at reative cell upper, middle and lower layer when removing the pipeline step, particularly between levels the difference of the temperature environment that wafer met with, to revise the influence that substrate intermediate ion concentration causes because of temperature effect.At this moment, on the boiler tube, and the temperature of lower floor be set at 740 degree Celsius respectively, 760 degree and 780 degree.
At last, via one non-all till eat-backing processing procedure and removing silicon nitride layer to the top of gate and source/drain and come out, and on the sidewall of gate, form the clearance wall structure.
Through removing the metal-oxide-semiconductor element that carries out the deposition of silicon nitride layer after the pipeline step is introduced the program of temperature gradient counter-rotating and form, saturated drain electric current (saturateddrain current in the wafer of levels, Idsat) difference is just reduced to below 5%, approximately between: between the 2-5%.
By the invention described above preferred embodiment as can be known, use the present invention and have and to revise the influence that substrate intermediate ion concentration causes because of temperature effect, reduce result because of the temperature effect influence and can lower in advantage than the electrical generation difference of the product of narrow linewidth processing procedure.
The disclosed dielectric layer manufacture method of the present invention is not limit and only is applicable to vertical type boiler tube formula CVD (Chemical Vapor Deposition) reactor, horizontal boiler tube formula CVD (Chemical Vapor Deposition) reactor is also applicable, the disclosed method of the present invention also is not only applicable to the deposition of silicon nitride material, other dielectric layers, for example the deposition of silica and silicon oxynitride is also applicable.
Though the present invention discloses as above with a preferred embodiment, so it is not in order to limiting the present invention, anyly has the knack of this operator, and without departing from the spirit and scope of the present invention, institute is used for a variety of modifications and variations, all in protection scope of the present invention.
Claims (6)
1. the manufacture method of a dielectric layer is applicable to a boiler tube formula CVD (Chemical Vapor Deposition) reactor, and this method comprises at least:
One deposition step comprises:
Provide a reacting gas to this boiler tube formula CVD (Chemical Vapor Deposition) reactor;
Provide a gradient temperature in this boiler tube formula CVD (Chemical Vapor Deposition) reactor with the concentration of proofreading and correct this reacting gas and the difference of pressure;
One removes the pipeline step, after finishing, this deposition step carries out, and this gradient temperature that reverses simultaneously.
2. the manufacture method of dielectric layer according to claim 1 is characterized in that, wherein the material of this dielectric layer is to be selected from the group that silicon nitride, silica and combination in any thereof are formed.
3. the manufacture method of dielectric layer according to claim 1 is characterized in that, wherein this gradient temperature is approximately between 400 degree Celsius are spent to Celsius 850.
4. the manufacture method of dielectric layer according to claim 1 is characterized in that, wherein this reacting gas is silane halide and ammonia.
5. the manufacture method of dielectric layer according to claim 1 is characterized in that, wherein this reacting gas is silane, nitrous oxide and nitrogen.
6. the manufacture method of dielectric layer according to claim 1 is characterized in that, wherein this reacting gas is oxygen, silane or tetraethoxysilane.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02119861 CN1459832A (en) | 2002-05-15 | 2002-05-15 | Manufacturing method of dielectric layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02119861 CN1459832A (en) | 2002-05-15 | 2002-05-15 | Manufacturing method of dielectric layer |
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| CN1459832A true CN1459832A (en) | 2003-12-03 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100351426C (en) * | 2003-12-13 | 2007-11-28 | 鸿富锦精密工业（深圳）有限公司 | Chemical vapor deposition equipment |
| CN102969220A (en) * | 2011-09-02 | 2013-03-13 | 上海华虹Nec电子有限公司 | Technical processing method through furnace tube |
-
2002
- 2002-05-15 CN CN 02119861 patent/CN1459832A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100351426C (en) * | 2003-12-13 | 2007-11-28 | 鸿富锦精密工业（深圳）有限公司 | Chemical vapor deposition equipment |
| CN102969220A (en) * | 2011-09-02 | 2013-03-13 | 上海华虹Nec电子有限公司 | Technical processing method through furnace tube |
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