A kind of multichannel combined vocoder and its implementation
One, affiliated technical field
The invention belongs to communication technique field, relate to a kind of vocoder, particularly a kind of multichannel combined Realization of Vocoder method.
Two, background technology
Along with the fusion of the traditional circuit-switched network and the packet switching network (being data network), the voice compressed encoding and decoding technology that is directed to VoIP (Voice over Internet Protocol) has application demand more and more widely.Voice compression coding is one of key technology in VoIP media gateway (Media Gateway) equipment, ITU-T has issued the compress speech encoding and decoding standard of a series of VoIP of being applied to successively, wherein the G.723.1 codec of the G.729ab codec of 8kbps speed and 6.3kbps speed and 5.3kbps speed is two kinds of the widest compress speech codecs of range of application, these two kinds of encryption algorithms can be realized the voice low rate coding of toll-quality, speech bandwidth behind the coding reduces, thereby realize that the multi-path voice transfer bandwidth is multiplexing, reduce the cost of single channel speech, guaranteed the interoperability of packet switching network and existing Internet resources PSTN (Public Service Telephone Network).
G.729ab encoder and G.723.1 encoder belong to forward direction adaptive linear prediction synthesis analysis (LPAS) encoder, support embedded voice activation to detect (Voice Activity Detector, be called for short VAD) and comfort noise regeneration (Comfort Noise Generation, be called for short CNG), and all provide hiding treatment mechanism to LOF and packet loss, when therefore uploading sending voice in the internet, these two kinds of vocoders all are good selections.
In general the Realization of Vocoder approach mainly contains two kinds: based on ASIC/FPGA (ApplicationSpecific Integrated Circuit/Field Programmable Gate Array) mode with based on CPU (Central Processing Unit) mode.Belong to a kind of implementation method of circuit hardware based on FPGA/ASIC, cost is higher, and flexibility is relatively poor, revises difficulty after typing, is unfavorable for algorithm upgrading, control and safeguards.Based on cpu mode generally all is to select special digital signal processing chip (DSP) for use, and general CPU can't satisfy the requirement of the real-time application scenario of intensive because the limitation of the throughput of its processing speed and data is not suitable for intensive mathematical.
Three, summary of the invention
Main purpose of the present invention provides a kind of multichannel based on TMS320C6000 series special DSP chip and G.729ab and G.723.1 unites vocoder and its implementation.This associating vocoder and its implementation can support the multi-voice channel parallel to handle, and by the mode of operation of a man-machine interface or a upper layer application program control sheet speech channel, but each passage separate configurations is encoding and decoding mode of operation G.729ab or G.723.1; And can under the condition of non-stop run, dynamically update the configuration of passage mode of operation; Activate silence compression, the comfort noise regeneration (CNG) that detects (VAD), discontinuous transmission in the equal support voice of mode of operation G.729ab or G.723.1, the error code when and LOF/error code and packet loss/error code is eliminated; The routine interface simple and flexible.
The present invention finishes by following technical measures:
A kind of multichannel combined vocoder comprises:
The hardware platform that one real-time voice encoding and decoding are handled; It is interconnected that hardware platform that the real-time voice encoding and decoding are handled and E1 bus and upper strata processor are pressed the chip connected mode, and the upper strata processor can be selected general protocol processor, in order to the protocol conversion of the compressed voice bag after encoding;
The hardware platform that above-mentioned real-time voice encoding and decoding are handled is made of TMS320C6000 series special DSP chip, and interior curing is provided with MCBSP interface, internal RAM and HPI interface;
In the MCBSP interface, be provided with input and output PCM buffer memory;
G.729ab codec algorithm nuclear and G.723.1 codec algorithm nuclear code are set in RAM;
In the HPI interface, be provided with dateout bag buffer memory, input data pack buffer, control configuration order buffer memory.
Described single channel G.729ab codec algorithm nuclear and G.723.1 codec algorithm nuclear take the C language, special-purpose linear assembler language of DSP and the special-purpose pure assembler language hybrid programming of DSP support multichannel G.729ab and G.723.1 to unite the software of vocoder, user mode variable organization definition, the corresponding independent structures definition of each passage, wherein comprise all state variables relevant with this passage, comprise and carry out the required state variable definition of code decode algorithm G.729ab and carry out the G.723.1 required state variable definition of code decode algorithm, and the passage Control Parameter, mode of operation can be independently adjusted in each speech channel; The algorithm of individual channel needed memory headroom in service can be shared temporarily.
The upper strata processor of described associating vocoder can be the RTP/RTCP protocol processor.
The hardware platform that described real-time voice encoding and decoding are handled adopts special DSP chip TMS320C6203.
The implementation method of multichannel combined vocoder may further comprise the steps:
1) hardware platform that real-time voice encoding and decoding are handled at first is set, hardware platform is made of the TMS320C6203 chip, and interior curing is provided with MCBSP interface, internal RAM and HPI interface;
2) in the MCBSP interface, be provided with input and output PCM buffer memory; G.729ab codec algorithm nuclear and G.723.1 codec algorithm nuclear are set in RAM; In the HPI interface, be provided with dateout bag buffer memory, input data pack buffer, control configuration order buffer memory;
3) associating vocoder software is set;
Associating vocoder software adopts the method for structure, required all state variables of the work of each passage, comprise and carry out the required state variable definition of code decode algorithm G.729ab and carry out the G.723.1 required state variable definition of code decode algorithm, and the passage Control Parameter, all be included in and also give the permanent memory headroom of its distributing independent in the structure; Be the corresponding complete status architecture definition of each passage, because the status architecture of each passage has all distributed independently permanent memory headroom, thereby guarantee that each passage can dispose the adjustment mode of operation flexibly, and do not influence the work of other passage.
The frame length of above-mentioned G.729ab encoder is 10ms, and processing delay 10ms adds the 5ms forward sight, and the time delay of algorithm amounts to 25ms; Data rate behind the coding is 8kbps; The user can be provided with the VAD startup as required or close;
The frame length of above-mentioned G.723.1 encoder is 30ms, and processing delay 30ms adds the 7.5ms forward sight, and the time delay of one-way algorithm amounts to 67.5ms; G.723.1 encoder provides the voice of toll-quality on 6.3kbps speed, and the low quality speech coding of 5.3kbps speed can also be provided; G.723.1 Code And Decode device is all supported this two kinds of speed, and can carry out speed at any time in interframe and switch, and can encoder rate and VAD be set according to user's needs and start or close.
The present invention is because the hardware platform that adopts special DSP chip TMS320C6203 to handle as the real-time voice encoding and decoding; Software is taked the method for C language, the special-purpose linear assembler language of DSP and the special-purpose pure assembler language hybrid programming of DSP, design high performance single channel G.729ab codec core algorithm and codec core algorithm G.723.1 respectively, and support multichannel G.729ab and G.723.1 to unite the software of vocoder.Core algorithm software efficiency height wherein, good stability can reach the G.729ab encoding and decoding that monolithic TMS320C6203 chip is supported 32 speech channel voice, or the G.723.1 encoding and decoding of 22 speech channel voice.
G.729ab and G.723.1 unite in the software of vocoder at the support multichannel, mode of operation (CodecMode, select G.729ab or G723.1), corresponding operating rate (Rate) and whether take the input parameter of controlled option such as VAD mode as the encoder principal function, external control is simple; The abundant user mode variable of vocoder software of the present invention organization definition, the corresponding independent structures definition of each passage, all state variable bags relevant with this passage all are contained in its corresponding structure, thereby guarantee that each speech channel can be by adjusting state variable, the independent mode of operation of adjusting;
The needed memory headroom of algorithm operation intermediate object program adopts the interim mode of sharing, and the internal memory that average every road takies is very little, has the very high ratio of performance to price.
The present invention compared with prior art has following advantage:
The present invention is implementation method and the equipment that G.729ab and G.723.1 a kind of multichannel based on TMS320C6000 series special DSP chip unites vocoder; G.729ab or G.723.1 the support multi-channel parallel is handled, but the mode of operation of each passage separate configurations encoder and can dynamically update configuration under the state of uninterrupted chip operation; Support embedded VAD, CNG and embedded code error to eliminate; Application programming interfaces are flexible.
The present invention adopts the method for C language, the linear assembler language of DSP and the manual pure assembler language hybrid programming of DSP, design G.729ab and the DSP program of core algorithm G.723.1, the algorithm routine stable performance, the efficient height, can reach monolithic TMS320C6203 chip and support the G.729ab encoding and decoding of 32 speech channel voice, or the G.723.1 encoding and decoding of 22 speech channel voice.
Support multichannel G.729ab and G.723.1 to unite the abundant user mode variable of the software organization definition of vocoder, the corresponding independent structures definition of each passage, wherein comprising all state variables relevant with this passage (comprises and carries out the required state variable definition of code decode algorithm G.729ab and carry out the G.723.1 required state variable definition of code decode algorithm, and passage Control Parameter), thus guarantee that each speech channel can independently adjust mode of operation; The algorithm of individual channel needed memory headroom in service can be shared temporarily, and the required internal memory in average every road is very little, ratio of performance to price height.
Four, description of drawings
Fig. 1 is that G.729ab and G.723.1 multichannel of the present invention unites vocoder implementation method schematic diagram;
Fig. 2 is that G.729ab and G.723.1 multichannel of the present invention unites vocoder hardware configuration schematic diagram;
Fig. 3 is a DSP control and treatment flow chart of the present invention;
Fig. 4 is a upper strata of the present invention control and treatment flow chart.
Five embodiments
Below in conjunction with the embodiment that accompanying drawing and inventor specifically finish, the invention will be further described.
According to technical scheme of the present invention, the inventor has provided a kind of a kind of multichannel G729ab and G723.1 associating vocoder and its implementation of developing based on TMS320C6000 series dedicated digital signal processor (Digital Signal Processor is called for short DSP) of the present invention.5.1 G.729ab and G.723.1 multichannel unites the vocoder implementation method
Single channel G.729ab codec core algorithm and codec core algorithm implementation method G.723.1 at first are described.
G.729ab the frame length of encoder is 10ms, and processing delay 10ms adds the 5ms forward sight, and the time delay of algorithm amounts to 25ms; Data rate behind the coding is 8kbps; The user can be provided with the VAD startup as required or close.
G.723.1 the encoder frame length is 30ms, and processing delay 30ms adds the 7.5ms forward sight, and the time delay of one-way algorithm amounts to 67.5ms.G.723.1 encoder provides the voice of toll-quality on 6.3kbps speed, and the low quality speech coding of 5.3kbps speed can also be provided; G.723.1 Code And Decode device is all supported this two kinds of speed, and can carry out the speed switching at any time in interframe.The user can be provided with encoder rate and VAD startup as required or close.
Weigh the efficient that important indicator is an algorithm of DSP program quality, the DSP program can be used the C language, linear assembler language and the exploitation of pure assembler language, and the three respectively has pluses and minuses.The C language is the most directly perceived, and the construction cycle is short, easy care; Pure assembler language is most effective, but the construction cycle is long, and difficulty is big, and the code intuitive is poor, is difficult for maintenance upgrade; Linear assembler language is between C language and pure assembler language, and the purer compilation of code is directly perceived, but efficient is high not as good as pure compilation.The present invention adopts special DSP chip TMS320C6203 to realize G.729ab and the core algorithm of voice compression coding device G.723.1.In order to take into account efficient, maintainability, portability and construction cycle, the present invention takes the method for C language, linear assembler language and hand assembly language hybrid programming, and function of different nature is adopted different development approaches.Finish the function of complex calculation for bottom, select to use linear assembler language and the exploitation of pure assembler language, can improve the efficient of code greatly; The codec control function of mainly finishing for the upper strata adopts the C language development, guarantees the maintainability and the controllability of function.By the multinomial DSP program development skill of using us to grasp, finished G.729ab and the G.723.1 exploitation of core algorithm software, its index is the maximum G.729ab encoding and decoding of supporting 32 speech channel voice of monolithic TMS320C6203 chip, or the G.723.1 encoding and decoding of 22 speech channel voice.
On the basis of codec core algorithm G.729ab and G.723.1, the invention provides a kind of multichannel and G.729ab and G.723.1 unite vocoder and its implementation.
G.729ab and G.723.1 Fig. 1 unites vocoder implementation method schematic diagram for multichannel.In the application scenario of vocoders such as switch and media gateway, angle from the ratio of performance to price and hardware volume, system flexibility, the general DSP that selects to handle a plurality of speech channels is as hardware platform, wishes that simultaneously vocoder can handle various protocols simultaneously.G.729ab and G.723.1 multichannel among the present invention unites vocoder just can satisfy these application demands.Associating vocoder software adopts the method for structure, required all state variables of the work of each passage, comprise and carry out the required state variable definition of code decode algorithm G.729ab and carry out the G.723.1 required state variable definition of code decode algorithm, and the passage Control Parameter, all be included in and also give the permanent memory headroom of its distributing independent in the structure; It is the corresponding complete status architecture definition of each passage, simultaneously again because the status architecture of each passage is all to have distributed independently permanent memory headroom, thereby guarantee that each passage can dispose the adjustment mode of operation flexibly, and do not influence the work of other passage.Each passage is in the process of work, and the shared memory headroom of intermediate object program adopts the interim mode of sharing, and the internal memory that average every road takies is very little again, has very high cost performance.Its schematic diagram as shown in Figure 1, wherein uniting vocoder control configuration interface program finishes the configuration of each passage mode of operation and the management and the controlled function of this equipment, PCM data-interface program is finished the input and output function of multichannel 64kbps data, the packet interface routine finish the Code And Decode packet output and input and corresponding framing, separate the frame function, the interface with upper layer network RTP (RTP/RTCP) is provided.Be core algorithm G.729ab and G.723.1 in the algorithms library, each passage calls corresponding code decode algorithm in the algorithms library according to flexible configuration.
The course of work below in conjunction with associating vocoder among Fig. 1 simple declaration the present invention: the operating state that each passage of vocoder at first is set by the program initialization of associating vocoder control configuration interface by the upper strata processor.The cataloged procedure of vocoder: after the PCM voice signal from the E1 interface is converted to linear speech data through PCM data-interface program, call the core encoder algorithm according to corresponding passage operating state, with the voice signal compressed encoding, obtain the speech data of compressed encoding; Speech data behind the compressed encoding forms the frame format output of fixing encoded speech frames by the packet interface routine, to make things convenient for the upper strata RTP to the data processing of packing.The decode procedure of vocoder: from the RTP of upper strata, solve the respective coding speech frame, encoded speech frames is passed to the packet interface routine, separate the speech data that frame obtains compressed encoding to be decoded; The speech data of compressed encoding to be decoded is by corresponding core decoder algorithm, and decoding recovers linear speech data; Linear speech data is converted to the PCM voice signal through PCM data-interface program, outputs to PSTN by the E1 interface.Realize principle 5.2 G.729ab and G.723.1 multichannel unites vocoder hardware
G.729ab and G.723.1 multichannel is united vocoder hardware and is realized principle as shown in Figure 2.Be used to deposit the control command that the upper strata processor sends to DSP in the control configuration order buffer area, be used for the initialization of passage and the mode of operation of new tunnel more dynamically, DSP is after the frame data operation of finishing all passages of opening, all passage unified access control configuration order buffer areas are according to the upper layer commands operating state of new tunnel more.The reason of doing like this with benefit is: because the frequency that upper layer commands occurs not frequent (speed of relative speech data), so allow all channels share control configuration order buffer areas, like this can the save memory space, reduce unnecessary frequent access number of times simultaneously to reach the purpose that improves the DSP operating efficiency.Control configuration order buffer area can be arranged on DSP inside.Data interaction is mainly used in the mutual of compressed with codecs speech data frame bag, each passage carries out the exchange of codec frames bag independently with the upper strata processor, the packet interface use DSP that TI company produces proprietary host interface (Host Processor Interface).PCM formatted data interface is a standard E1 bus.Realize principle 5.3 G.729ab and G.723.1 multichannel unites vocoder control configurator interface
The control and treatment flow process that G.729ab and G.723.1 multichannel unites vocoder DSP side as shown in Figure 3.Program begins to detect judges whether the upper strata processor has newer command; If no, then finish this control of taking turns configuration; If there is newer command on the upper strata, remove the newer command sign earlier, carry out command recognition then.If command recognition is unsuccessful, promptly put and receive the order failure flags, finish.If the command recognition success is then put to receive and is ordered successfully sign, then according to the character of newer command, promptly be to start channel command, or upgrade channel command, select different processing.If the startup channel command then receives the relevant parameter in the order, according to parameter interface configuration is set then, storage allocation starts codec; Finish.If the more order of new tunnel, at first to remove the old parameter that is provided with in the internal memory, simultaneously corresponding codec is resetted, receive the relevant parameter in the order then, according to the sub-journey setting of the corresponding algorithm of parameter update; Finish.
The control and treatment flow process of upper strata processor side as shown in Figure 4.At first the upper strata processor judges whether channel has new request, if do not have, does not then carry out any operation, finishes this and takes turns control and treatment.If believing has new request, the then new request of identification is provided with or undated parameter according to request then; Send newer command according to parameter, and the newer command sign is set.The upper strata processor checks that the reception order that the DSP side provides successfully indicates then; Reception is ordered successfully if sign shows DSP, then removes the request flag of channel, and corresponding modify system resource is used table then.If sign shows DSP and receives the order failure, then directly finishes the epicycle control and treatment.
G.729ab and G.723.1 multichannel unites the upper strata processor of vocoder can select general protocol processor, in order to the protocol conversion of the compressed voice bag after encoding, as the RTP/RTCP protocol processor.Thereby the work that guarantees vocoder can not rely on specific applied environment, and different applied environments is had extraordinary adaptability.Application for the media gateway that connects PSTN and Ethernet, also the realization and the processing section of RTP/RTCP RTP can be arranged at DSP inside, to reach the purpose that reduces hardware volume and complexity, this has made full use of the flexibility of the program development of digital signal processing chip.But G.729ab and G.723.1 multichannel among the present invention unites vocoder provides simple the protocol processor interactive interface of complete function.Can rationally expand this interface in the protocol processor, exploitation corresponding driving program is controlled the encoding and decoding mode of operation of vocoder to make things convenient for the upper strata, and the input and output of the compressed voice bag behind the control coding.
Code decode algorithm and interface routine that G.729ab and G.723.1 multichannel of the present invention unites the vocoder core are separate, thereby have guaranteed interface flexibility to greatest extent.