CN1440114A - Power supply device and discharge lamp illuminator - Google Patents

Abstract

The charging voltage of the capacitor is always controlled to be constant. A power supply device that connects a series circuit of a plurality of variable resistors 4 and capacitors 6 in parallel, each capacitor is charged through a corresponding variable resistor by a commercial power supply voltage, and a discharge current flows sequentially from each capacitor to a load, having : an impedance control unit 7-11, controlling the impedance of the corresponding variable resistor so that an input current of a preset target value flows in any capacitor; and an amplitude control unit 7-12, when the capacitor voltage is lower than the charging voltage target Control to increase the amplitude of the input current of the target value when the capacitor voltage is higher than the target value of the charging voltage, and control to reduce the amplitude of the input current of the target value when the capacitor voltage is higher than the target value of the charging voltage, so that the charging voltage of any capacitor is constant.

Description

Power supply unit and discharge lamp lighting unit

Detailed Description of the Invention

The technical field to which the invention belongs

The present invention relates to a power supply device and a discharge lamp lighting device using a plurality of capacitors as a power supply source.

current technology

JP-A-7-123733 describes a power supply device that converts a power supply frequency to a high frequency using capacitors and switching elements. The power supply device charges the capacitor with the full-wave rectified waveform of the AC power supply by a full-wave rectifier, and controls multiple switching elements on and off in sequence at the positive pole of the AC power supply, and charges the corresponding capacitors according to the power supply voltage. The negative electrode of the AC power supply turns on and off sequentially to control multiple switching elements, charges the corresponding capacitors according to the power supply voltage, uses the switching elements for discharging, controls each switching element to turn on and off at high speed, discharges these capacitors, and flows through the load. frequency current.

The problem to be solved by the invention

In such a power supply unit, problems such as changes in the charging voltage of the capacitor and distortion of the input current waveform occur due to changes in the load. Therefore, the first present invention provides a power supply device capable of controlling the charging voltage of a capacitor to be constant.

When a power supply device is generally used as a power source of a lamp lighting device such as a discharge lamp, conventional discharge lamp lighting devices use winding members such as coils to limit lamp current. Since the winding components such as the coil are heavy and bulky, it is difficult to reduce the size and weight of the device. Therefore, the second present invention provides a discharge lamp lighting device capable of current limiting control of lamp current without using winding components such as coils, and capable of reducing the size and weight of the device.

As this prior art discharge lamp lighting device, the AC stepped voltage waveform from the AC stepped voltage generating source is directly provided to the discharge lamp, and the effective value of the AC stepped voltage is controlled by changing the generation time of each voltage, so that the lamp The current is stabilized. However, in this kind of discharge lamp lighting device, due to the restriction of the high-frequency component of the input current, it is necessary to specify the effective value control range of the AC stepped voltage, and the effective value control range is about ±20% of the rated voltage. There is no operating point for a load voltage in the range, and therefore, the discharge lamp may not be operated in some cases. That is, the applicable discharge lamp has a narrow lamp voltage range. Therefore, the third invention provides a discharge lamp lighting device capable of expanding the lamp voltage range of the applicable discharge lamp and preventing excessive current from flowing when the discharge lamp is short-circuited.

means to solve the problem

The invention described in claim 1 is a power supply device in which a series circuit of a plurality of variable resistors and capacitors is connected in parallel, each capacitor is charged by a commercial power supply voltage through a corresponding variable resistor, and each variable resistor is controlled. The impedance is finite only during the charging period of the corresponding capacitor, and the impedance is controlled to be infinite during the other period, and the discharge current flows sequentially from each capacitor to the load. The power supply device has: an impedance control unit that controls the corresponding The impedance of the variable resistor allows an input current of a preset target value to flow through any variable resistor; the amplitude control unit increases the input of the target value when the capacitor voltage is lower than the target value of the charging voltage The control of the amplitude of the current is such that when the capacitor voltage is higher than the target value of the charging voltage, control is performed to reduce the amplitude of the input current to a target value so that the charging voltage of any capacitor is constant.

The invention described in claim 2 includes: a plurality of impedance control units that control the impedance of the corresponding variable resistors so that an input current of a preset target value flows through each variable resistor; and a plurality of amplitude control units. The unit, when the capacitor voltage is lower than the target value of the charging voltage, performs control of increasing the amplitude of the input current of the target value, and performs control of decreasing the amplitude of the input current of the target value when the capacitor voltage is higher than the target value of the charging voltage Control so that the capacitor charging voltage of the variable resistor corresponding to the controlled impedance of each impedance control unit becomes constant.

The invention described in claim 3 includes: a plurality of impedance control means that control the impedance of the corresponding variable resistors so that an input current of a preset target value flows through each variable resistor; and an amplitude control means that When the capacitor voltage is lower than the target value of the charging voltage, control is performed to increase the amplitude of the input current at the target value, and when the capacitor voltage is higher than the target value of the charging voltage, control is performed to decrease the amplitude of the input current at the target value, The charging voltage of the capacitor with the highest charging target value among the capacitors becomes constant, and each impedance control unit controls the impedance of the corresponding variable resistor so that the voltage flowing through each variable resistor tracks the voltage controlled by the amplitude control unit. Enter the input current for the current target value.

The invention described in claim 7 includes: a plurality of impedance control means that control the impedance of the corresponding variable resistors so that an input current of a preset target value flows through each variable resistor; and an amplitude control means that When the capacitor voltage is lower than the target value of the charging voltage, control is performed to increase the amplitude of the input current at the target value, and when the capacitor voltage is higher than the target value of the charging voltage, control is performed to decrease the amplitude of the input current at the target value, so that the charging voltage of a specific capacitor among the capacitors becomes constant, and each impedance control unit controls the impedance of the corresponding variable resistor so that an input current that tracks an input current target value whose amplitude is controlled by the amplitude control unit flows, And, switch a certain capacitor for other capacitors.

The invention described in claim 8 has: a plurality of DC voltage sources generating different positive voltage values; a switch circuit selectively extracting a DC voltage value from each DC voltage source, and outputting a stepped voltage waveform including a zero voltage value; Polarity reversal current, input step voltage waveform from switching circuit, output AC step voltage waveform; discharge lamp, provide AC step voltage waveform from polarity inversion circuit; effective value detection part, detect the discharge lamp The effective value of the lamp current flowing in the middle; and the control unit, which controls the switching circuit, variably controls the output time of each voltage value of the stepped voltage waveform including the zero voltage value, so that the effective value of the lamp current detected by the effective value detection part becomes is constant.

The invention described in claim 9 has: a plurality of first DC voltage sources generating different positive voltage values; a plurality of second DC voltage sources generating zero voltage values having absolute values equal to the voltage values of the first DC voltage sources Negative voltage value; the first switch circuit, select one of the first DC voltage sources to take out the DC voltage value, and output a ladder-shaped voltage waveform including zero voltage value; the second switch circuit uses a different voltage from the first switch circuit Select one of the DC voltage values from the second DC voltage source at regular intervals to output a stepped voltage waveform including zero voltage value; the discharge lamp provides the stepped voltage waveform from each switching circuit; the effective value detection part detects the discharge voltage in the discharge lamp. an effective value of the lamp current flowing in the lamp; and a control unit that controls each switching circuit to variably control the output time of each voltage value of the step-shaped voltage waveform including the zero voltage value, so that the effective value of the lamp current detected by the effective value detection unit value becomes constant.

The invention described in claim 10 is a discharge lamp lighting device comprising: an AC step voltage generating source, the voltage value changes stepwise, and a stepwise positive voltage waveform that increases and decreases like a sine wave and a voltage value stepwise change alternately output a stepped negative voltage waveform that increases and decreases like a sine wave; a discharge lamp that supplies an AC stepped voltage waveform from an AC stepped voltage generating source; and a capacitor connected in series between the AC stepped voltage generating source and the discharge lamp.

Description of drawings

Fig. 1 is a circuit configuration diagram including some functional blocks representing the first embodiment of the present invention;

Fig. 2 is a circuit configuration diagram including some functional blocks representing the specific configuration of the driving circuit in the first embodiment;

Fig. 3 is a partial circuit configuration diagram including some functional blocks representing the second embodiment of the present invention;

Fig. 4 is a partial circuit configuration diagram including some functional blocks representing the third embodiment of the present invention;

Fig. 5 is a waveform diagram of a power supply voltage and an input current used to illustrate the basis for detecting and controlling the capacitor charging voltage with the highest target voltage value in the third embodiment;

Fig. 6 is a partial circuit configuration diagram including some functional blocks representing the fourth embodiment of the present invention;

Fig. 7 is a partial circuit configuration diagram including some functional blocks representing the fifth embodiment of the present invention;

Fig. 8 is a partial circuit configuration diagram including some functional blocks representing the sixth embodiment of the present invention;

Fig. 9 is a partial circuit configuration diagram including some functional blocks representing the seventh embodiment of the present invention;

Fig. 10 is a partial circuit configuration diagram including some functional blocks representing an eighth embodiment of the present invention;

Fig. 11 is a partial circuit configuration diagram including some functional blocks representing the ninth embodiment of the present invention;

Fig. 12 is a partial circuit configuration diagram including some functional blocks representing a tenth embodiment of the present invention;

Fig. 13 is a circuit configuration diagram including some functional blocks representing an eleventh embodiment of the present invention;

Fig. 14 is a diagram showing an example of a stepped voltage waveform supplied to a discharge lamp in an eleventh embodiment;

Fig. 15 is a diagram showing another example of the stepped voltage waveform supplied to the discharge lamp in the eleventh embodiment;

Fig. 16 is a circuit configuration diagram including some functional blocks representing a twelfth embodiment of the present invention;

Fig. 17 is a circuit configuration diagram including some functional blocks representing a thirteenth embodiment of the present invention;

Fig. 18 is a diagram showing an example of a stepped voltage waveform supplied to a discharge lamp in a fourteenth embodiment of the present invention;

Fig. 19 is a diagram showing another example of the stepped voltage waveform supplied to the discharge lamp in the fourteenth embodiment;

Fig. 20 is a diagram showing another example of the stepped voltage waveform supplied to the discharge lamp in the fourteenth embodiment;

Fig. 21 is a diagram showing another example of the stepped voltage waveform supplied to the discharge lamp in the fourteenth embodiment;

Fig. 22 is a graph showing the relationship between the output voltage waveform from the full-wave rectifier and the charging voltage of each capacitor in the fifteenth embodiment of the present invention;

Fig. 23 is a diagram showing a high-frequency stepped voltage waveform supplied to the polarity inversion circuit in the fifteenth embodiment;

Fig. 24 is a circuit configuration diagram including some functional blocks representing a sixteenth embodiment of the present invention;

Fig. 25 is a diagram showing a sine wave waveform for comparison with a stepped voltage waveform supplied to the discharge lamp when the effective value of the lamp current varies in the seventeenth embodiment of the present invention;

Fig. 26 is a diagram showing the input current waveform when the effective value of the lamp current varies in the seventeenth embodiment;

Fig. 27 is a circuit configuration diagram including some functional blocks representing an eighteenth embodiment of the present invention;

Fig. 28 is a diagram showing an input current target waveform shaped by an input current target waveform shaping circuit when the effective values of the input voltage waveform and the stepped voltage waveform are rated values in the eighteenth embodiment;

Fig. 29 is a diagram showing a comparison between an input current target waveform shaped by an input current target waveform shaping circuit and a sinusoidal input current waveform when the effective value of the stepped voltage waveform is higher than the rated value in the eighteenth embodiment;

Fig. 30 is a diagram showing a comparison between the input current target waveform shaped by the input current target waveform shaping circuit and the sinusoidal input current waveform when the effective value of the stepped voltage waveform is lower than the rated value in the eighteenth embodiment;

Fig. 31 is a circuit configuration diagram including some functional blocks representing a nineteenth embodiment of the present invention;

Fig. 32 is a diagram showing load characteristics when an AC stepped voltage waveform is directly supplied to a discharge lamp without using a capacitor in the nineteenth embodiment;

Fig. 33 is a diagram showing load characteristics under the condition that an AC stepped voltage waveform is supplied to the discharge lamp through a capacitor and the effective value of the AC stepped voltage waveform is constant in the nineteenth embodiment;

Fig. 34 is a diagram showing load characteristics when an AC stepped voltage waveform is provided to the discharge lamp through a capacitor, and the time width of each voltage of the AC stepped voltage waveform can be changed to control the effective value in the nineteenth embodiment;

35 is a circuit configuration diagram including some functional blocks representing a twentieth embodiment of the present invention;

Fig. 36 shows the equivalent resistance of the discharge lamp when the average value of the time width of each voltage of the alternating-current step-shaped voltage waveform is ts, and the capacitance of the first capacitor and the rated lighting are used in the twenty-first embodiment of the present invention. The relationship curve between CR/ts and form factor when the determined time constant is CR;

Fig. 37 shows the AC stepped voltage waveform and the voltage waveform generated between both ends of the discharge lamp when the capacitance of the first capacitor changes when the number of steps of the AC stepped voltage waveform is set to 5 in the twenty-first embodiment. Waveform diagram;

Fig. 38 shows the AC stepped voltage waveform and the voltage generated between both ends of the discharge lamp when the capacitance of the first capacitor changes when the number of steps of the AC stepped voltage waveform is set to 11 in the twenty-first embodiment. Waveform diagram of the waveform;

Fig. 39 shows the AC stepped voltage waveform and the voltage generated between both ends of the discharge lamp when the capacitance of the first capacitor changes when the number of steps of the AC stepped voltage waveform is set to 21 in the twenty-first embodiment. Waveform diagram of the waveform;

Fig. 40 is a circuit configuration diagram showing a 22nd embodiment according to the present invention;

Fig. 41 is a waveform diagram showing the waveform of the AC stepped voltage and the waveform of the load current flowing into the discharge lamp in the twenty-second embodiment;

Fig. 42 is another circuit configuration diagram showing a bipolar switch used in the twenty-second embodiment;

FIG. 43 shows a circuit configuration diagram according to a 23rd embodiment of the present invention;

FIG. 44 shows a circuit configuration diagram according to a twenty-fourth embodiment of the present invention;

FIG. 45 is a diagram showing an example of an AC stepped voltage waveform output from an AC stepped voltage generating source in the twenty-fourth embodiment;

Fig. 46 is a circuit configuration diagram according to the twenty-fifth embodiment of the present invention;

Fig. 47 is a partial circuit configuration diagram showing a specific example of switching elements in the twenty-fifth embodiment.

Embodiment of the invention

Hereinafter, first to tenth embodiments of the first present invention will be described with reference to FIGS. 1 to 12 . The symbols in the description of the first to tenth embodiments and in FIGS. 1 to 12 are applicable to the first to tenth embodiments.

first embodiment

As shown in Figure 1, the input terminal of the full-wave rectification circuit 2 is connected to the commercial AC power supply 1, and the variable resistors 4-1, 4-2, ..., 4-n composed of MOS type FETs (field effect transistors) , the series circuit of the input current detection circuit 5-1, 5-2, ..., 5-n and the capacitor 6-1, 6-2 ... 6-n composed of impedance elements such as resistors pass through each Diodes 3-1, 3-2, .

The above-mentioned variable resistors 4-1, 4-2...4-n control the bias voltage between the gate and the source of the MOS FET, and drive it in the non-saturated region, thereby realizing it as a variable resistor Therefore, it is controlled to control the impedance to a finite value only during the charging of the corresponding capacitors 6-1, 6-2... 6-n through the drive circuits 7-1, 7-2... 7-n, and the other During the period, the impedance is infinite.

The driving power sources 8-1, 8-2...8-n are respectively connected to the above-mentioned driving circuits 7-1, 7-2...7-n. The voltages at both ends of the input current detection currents 5-1, 5-2...5-n are input to the driving circuits 7-1, 7-2...7-n. The base potentials of the above-mentioned driving circuits 7-1, 7-2...7-n and driving power sources 8-1, 8-2...8-n become the respective capacitors 6-1, 6-2...6-n the charging voltage.

Each of the drive circuits 7-1, 7-2...7-n described above is composed of an impedance control unit and an amplitude control unit. Specifically, in Fig. 2, the driving current 7-1 is composed of an impedance control unit 7-11 and an amplitude control unit 7-12, and the impedance control unit 7-11 is composed of a driving current 11, The first error amplifier 12 constitutes. The amplitude control unit 7 - 12 is composed of a multiplier 13 , an input current target value setting circuit 14 , a voltage detection circuit 15 corresponding to the capacitor 6 - 1 , and a second error amplifier 16 .

The sinusoidal waveform data for setting the input current target value setting circuit 14 is set in the input current target value setting circuit 14 , and the sinusoidal waveform data is supplied to the multiplier 13 . The resistance voltage dividing circuit 17 is connected in parallel to the capacitor 6 - 1 , and outputs the voltage at the voltage dividing point of the resistance voltage dividing circuit 17 through the output circuit 18 . In this way, the input circuit 19 acquires the output from the output circuit 18 and inputs it to the voltage detection circuit 15 . The above-mentioned relationship between the output circuit 18 and the input circuit 19 is, for example, the relationship between a light-emitting diode and a phototransistor in a photocoupler, and the input circuit 19 is insulated to obtain an output signal from the output circuit 18 .

The voltage detection circuit 15 detects the charging voltage of the capacitor 6 - 1 from the signal from the input circuit 19 , and supplies the detected output to the inverting input terminal (−) of the second error amplifier 16 . A reference voltage Vref for setting a charging voltage target value is applied to a non-inverting input terminal (+) of the second error amplifier 16 .

The second error amplifier 16 compares the charged voltage of the capacitor 6 - 1 detected by the voltage detection circuit 15 with the reference voltage Vref, and supplies a voltage signal corresponding to the difference to the multiplier 13 . The multiplier 13 controls the amplitude of the sinusoidal waveform data from the input current target value setting circuit 14 based on the voltage signal from the second error amplifier 16 .

That is, when the charging voltage of the capacitor 6-1 is lower than the reference voltage Vref, the multiplier 13 performs control to increase the amplitude of the sinusoidal waveform data from the input current target value setting circuit 14 based on the voltage signal from the second error amplifier 16, When the charging voltage of the capacitor 6 - 1 is higher than the reference voltage Vref, the multiplier 13 performs control to reduce the amplitude of the sinusoidal waveform data from the input current target value setting circuit 14 based on the voltage signal from the second error amplifier 16 .

The output of the above multiplier 13 is supplied to the non-inverting input terminal (+) of the first error amplifier 12 . The output of the input current detection circuit 5 - 1 is supplied to the inverting input terminal (−) of the first error amplifier 12 .

The above-mentioned first error amplifier 12 compares the output of the multiplier 13 with the output of the input current detection circuit 5-1, and drives the above-mentioned driving circuit 11 according to the difference, and the driving circuit 11 variablely controls the impedance of the variable resistor 4-1 according to the difference . Although FIG. 2 has explained the configuration of the driving circuit 7-1, the configurations of the other driving circuits 7-2 to 7-n are the same.

Although not shown here, the above-mentioned capacitors 6-1, 6-1...6-n are respectively connected to the load through a switch circuit and a polarity inversion circuit. The sex inversion circuit sequentially provides the charging voltage of each capacitor 6-1, 6-2...6-n to the load, and can drive the load in AC.

In this configuration, it is controlled so that while the output voltage of the full-wave rectifier circuit 2 rises, each variable resistor 4-1, 4-2...4-n becomes a prescribed impedance, and a desired input current flows through each variable resistor 4-1, 4-2...4-n, and charges each capacitor 6-1, 6-2...6, respectively -n.

That is, first, the impedance of the variable resistor 4-1 is controlled from infinity to a predetermined reactance value and the charging current to the capacitor 6-1 flows, and the impedance of the variable resistor 4-1 is controlled so that the charging current becomes The input current is set as the target value. In addition, when the input voltage from the full-wave rectification circuit 2 is equal to the charging voltage of the capacitor 6-2 of the lower stage, the impedance of the variable resistor 4-1 is controlled to be infinite and the charging of the capacitor 6-1 is stopped, instead, it will be possible The impedance of variable resistor 4-2 is controlled from infinity to a prescribed impedance value, and capacitor 6-2 is charged. Furthermore, the impedance of the variable resistor 4-2 is controlled so that the charging current becomes the input current set as the target value.

In this way, while the input voltage waveform from the full-wave rectifier 2 rises, the impedances of the variable resistors 4-1, 4-2...4-n are switched from infinite to finite at predetermined timing, and the variable control impedance does not change. The charging of the respective capacitors 6-1, 6-2...6-n is performed sequentially.

During the fall of the input voltage waveform from the full-wave rectifier 2, if the charging voltage of the capacitor 6-n is equal to the input voltage, the variable resistor 4-( The impedance of n-1) is switched to a finite value, and the capacitor 6-(n-1) is started to be charged instead of the capacitor 6-n. In the process of charging the capacitor 6-(n-1), the resistance reduction control of the variable resistor 4-(n-1) is performed to control the input current.

By performing such control, the input current waveform from the full-wave rectifier 2 becomes a sine wave having almost the same phase as the input voltage waveform. Thereby, the high-frequency component in the input current can be sufficiently suppressed, and the power factor can be improved.

When such control is performed, the charging voltage of capacitors 6-1, 6-2...6-n may become lower or higher than a target value due to a change in load. For example, when the charging voltage of the capacitors 6-1, 6-2...6-n is lower than the target value, the voltage detection circuits 15 of the drive circuits 7-1, 7-2...7-n detect it respectively, The second error amplifier 16 compares a reference voltage Vref, which is a charging voltage target value, with a detection voltage. Its error is output to the multiplier 13 . The multiplier 13 is controlled to increase the amplitude of the sinusoidal waveform data from the input current target value setting circuit 14 by the error output from the second error amplifier 16 .

The first error amplifier 12 compares the input current with a large amplitude target value and the actual input current detected by the input current detection circuits 5 - 1 , 5 - 2 . The drive circuit 11 controls the impedance of the variable resistors 4-1, 4-2...4-n so that the actual input current is close to the input current of the target value. Thus, when the charging voltage of the capacitors 6-1, 6-2...6-n is lower than the target value, the impedance of the variable resistors 4-1, 4-2...4-n is controlled so that the capacitors 6-1, 6-n A comparatively large charging current flows through 6-2...6-n, and the charging voltage of capacitor 6-1, 6-2...6-n is controlled to a target value.

When the charging voltage of the capacitors 6-1, 6-2...6-n is higher than the target value, on the contrary, the impedance of the variable resistors 4-1, 4-2...4-n is controlled so that the capacitors 6-1, 6 -2...6-n flows a relatively small charging current, and the charging voltage of capacitors 6-1, 6-2...6-n is controlled to a target value.

In this way, even when the load changes, the charging voltage of the capacitors 6-1, 6-2...6-n is always controlled to a target value and becomes constant. Accordingly, even if the load changes, the voltage supplied to the load can be stabilized.

second embodiment

The parts that are the same as those in the first embodiment are denoted by the same symbols, and detailed description is omitted.

As shown in FIG. 3, the input current target value setting circuit 141 is set for the reference potential of the entire circuit, and the sinusoidal waveform data of the input current as a target value from the input current target value setting circuit 141 are supplied to the multipliers 13-1, respectively. , 13-2.... Furthermore, outputs from the respective multipliers 13-1, 13-2... are supplied to non-inverting input terminals of the first error amplifiers 12-1, 12-2... through level shift circuits 20-1, 20-2..., respectively. (+).

That is, in this power supply device, the base potentials of the drive circuits 11-1, 11-2... and the first error amplifiers 12-1, 12-2... are the charging voltages of the respective capacitors 6-1, 6-2... , the base potentials of the voltage detection circuits 15-1, 15-2... and the second error amplifiers 16-1, 16-2... become the potential of the negative terminal among the output terminals of the full-wave rectification circuit 2 as the reference potential of the entire circuit. . Therefore, it is necessary to use the level shift circuits 20-1, 20-2, . . . to shift the level of the base potential with each capacitor. Voltage detection circuits 15-1, 15-2... are configured to detect direct voltages from capacitors 6-1, 6-2....

In the power supply unit with such a configuration, when a load change occurs and the charging voltage of the capacitors 6-1, 6-2 ... is lower than the target value, the voltage detection circuits 15-1, 15-2 ... detect it, and the second error Amplifiers 16 - 1 , 16 - 2 . . . compare reference voltages Vref1 , Vref2 . And, the errors thereof are output to multipliers 13-1, 13-2, . . . The multipliers 13-1, 13-2... perform control to increase the amplitude of the sinusoidal waveform data from the input current target value setting circuit 141 by the error outputs from the second error amplifiers 16-1, 16-2.... Outputs from the multipliers 13-1, 13-2, ... are level-shifted by level shift circuits 20-1, 20-2, ..., and input to first error amplifiers 12-1, 12-2, ....

The first error amplifiers 12-1, 12-2... compare the input current of the target value whose amplitude has become larger with the actual input current detected by the input current output circuits 5-1, 5-2..., and supply the error output to the drive circuit. 11-1, 11-2…. The drive circuits 11-1, 11-2... control the impedance of the variable resistors 4-1, 4-2... so that the actual input current approaches the input current of the target value. Thus, when the charging voltage of the capacitors 6-1, 6-2... is lower than the target value, the impedance of the variable resistors 4-1, 4-2... is controlled so that the capacitors 6-1, 6-2... A larger charging current controls the charging voltage of the capacitors 6-1, 6-2... to a target value.

If the charging voltage of the capacitors 6-1, 6-2... is higher than the target value, at this time, conversely, the impedance of the variable resistors 4-1, 4-2... is controlled so that the capacitors 6-1, 6-2... A relatively small charging current flows in the middle, and the charging voltage of the capacitors 6-1, 6-2... is controlled to a target value.

Therefore, in this embodiment, even if the load changes, the charging voltage of the capacitors 6-1, 6-2, ... is always controlled to a target value and becomes constant, so that the voltage supplied to the load is stabilized, as in the above-mentioned embodiment. . The input current target value setting circuit 141 can be generalized.

third embodiment

The parts that are the same as those in the above-mentioned first and second embodiments are denoted by the same symbols, and descriptions thereof are omitted.

As shown in FIG. 4, among the n capacitors, the charging voltage of the capacitor 6-n with the highest target voltage value is directly detected by the voltage detection circuit 151, and the detected output is input to the inverting input terminal (- )middle. The reference voltage Vrefn for setting the charging voltage target value of the capacitor 6-n is input to the non-inverting input terminal (+) of the second error amplifier 161 described above.

The second error amplifier 161 compares the charged voltage of the capacitor 6 - n detected by the voltage detection circuit 151 with the reference voltage Vrefn, and supplies a voltage signal corresponding to the difference to the multiplier 131 . The multiplier 131 controls the amplitude of the sinusoidal waveform data from the input current target value setting circuit 142 based on the voltage signal from the second error amplifier 161 .

That is, when the charging voltage of the capacitor 6-n is lower than the reference voltage Vrefn, the multiplier 131 increases the amplitude of the sinusoidal waveform data from the input current target value setting circuit 142 according to the voltage signal from the second error amplifier 161. Compared with the reference voltage Vrefn, when the charging voltage of the capacitor 6-n is high, the multiplier 131 reduces the sinusoidal waveform data from the input current target value setting circuit 142 according to the voltage signal from the second error amplifier 161 Amplitude control. Also, outputs from the multiplier 131 are supplied to non-inverting input terminals of the first error amplifiers 12-n, 12-(n-1)... through level shift circuits 20-n, 20-(n-1)..., respectively. (+).

That is, through the power supply device, the base potentials of the driving circuits 11-n, 11-(n-1)... and the first error amplifiers 12-n, 12-(n-1)... are respectively the capacitors 6-n, 6 The charging voltage of -(n-1) . Also, it is necessary to level shift the base potential of each capacitor using level shift circuits 20-n, 20-(n-1). . . .

In the power supply device with such a configuration, when a load change occurs and the charging voltage of the capacitor 6-n is lower than the target value, the voltage detection circuit 151 detects it, and the second error amplifier 161 compares the reference voltage as the charging voltage target value Vrefn and detection voltage. And, the error thereof is output to the multiplier 131 . The multiplier 131 is controlled to increase the amplitude of the sinusoidal waveform data from the input current target value setting circuit 142 by the error output from the second error amplifier 161 . Outputs from the multiplier 131 are level-shifted by level shift circuits 20-n, 20-(n-1)... and then input to first error amplifiers 12-n, 12-(n-1).

The first error amplifier 12-n, 12-(n-1) ... compares the input current of the target value whose amplitude becomes large with the actual input current detected by the input current output circuit 5-n, 5-(n-1) ..., The error outputs thereof are supplied to drive circuits 11-n, 11-(n-1).... The drive circuits 11-n, 11-(n-1)... control the impedance of the variable resistors 4-n, 4-(n-1)... so that the actual input current approaches the input current of the target value. Thus, when the charging voltage of the capacitor 6-n is lower than the target value, the impedances of the variable resistors 4-n, 4-(n-1)... are controlled so that the capacitors 6-n, 6-(n-1) ... to control the charging voltage of the capacitor 6-n to a target value.

If the charging voltage of the capacitor 6-n is higher than the target value, at this time, conversely, the impedances of the variable resistors 4-n, 4-(n-1) are controlled so that in the capacitors 6-n, 6-(n- 1) A relatively small charging current flows through ..., and the charging voltage of the capacitor 6-n is controlled to a target value.

Therefore, according to the present embodiment, the basis for detecting and controlling the charging voltage of the capacitor 6-n having the highest target voltage value will be described. For example, it is considered to detect and control the charging voltages of capacitors 6-(n-1) other than the capacitor 6-n having the highest target voltage value. When the charging voltage of the capacitor is lower than the target voltage value, control is performed to increase the amplitude of the sinusoidal waveform data from the input current target value setting circuit 142, thereby performing such control that the charging current increases, the capacitor voltage rises, and the charging voltage increases. The voltage is close to the target value.

This control is similarly performed for capacitors other than the capacitor for detecting the charging voltage. Then, the charging voltage of the capacitor 6-n is increased by performing the operation on the capacitor 6-n having the highest target voltage value. However, the charging voltage of the capacitor 6-n is not higher than the power supply voltage, that is, the peak value of the output voltage of the full-wave rectification circuit 2.

On the other hand, the condition of this circuit is that the MOS type FETs constituting the variable resistors 4-n, 4-(n-1)... operate in the active region, that is, in the non-saturated region, and give the capacitor 6 corresponding to the highest value of the target voltage The -n variable resistor 4-n applies a difference voltage between the charging voltage of the capacitor 6-n and the power supply voltage, and when the difference voltage becomes smaller, the operation of the MOS type FET approaches from a non-saturation region to a saturation region. Furthermore, it becomes switching action. When the MOS type FET performs switching operation, the input current becomes the waveform of the differential input voltage. Compared with the power supply voltage waveform shown in Fig. 5(a), the input current waveform becomes the peak portion shown in Fig. 5(b) and is cut off. distorted waveform.

Thus, when detecting and controlling the charging voltages of capacitors 6-(n-1) other than capacitor 6-n having the highest target voltage value, there arises a problem that the input current does not change smoothly. In this regard, when detecting and controlling the charging voltage of the capacitor 6-n having the highest target voltage value, there is no fear of the MOS type FET constituting the variable resistor 4-n corresponding to the capacitor 6-n having the highest target voltage value. The switching operation can always operate in the non-saturation region, and the input current can always flow smoothly and continuously.

In this embodiment, during the rise of the input voltage waveform from the full-wave rectification circuit 2 as the power supply voltage, if the voltage of a certain capacitor is not equal to the input voltage, the impedance of the corresponding variable resistor is switched from infinite to finite value and starts charging of this capacitor. While the input voltage waveform from the full-wave rectifier circuit 2 is falling, charging of a certain capacitor starts when the charged voltage of the preceding capacitor becomes equal to the input voltage, and stops when the charged voltage of the capacitor becomes equal to the input voltage. The input current can be continuously flowed by continuously performing this control among the respective capacitors. The input current target value setting circuit 142, the voltage detection circuit 151, the second error amplifier 161, and the multiplier 131 can be generalized, and the structure can be simplified.

Fourth embodiment

The parts that are the same as those in the above-mentioned first to third embodiments are denoted by the same symbols, and detailed description thereof will be omitted.

As shown in FIG. 6 , the charging voltages of the n capacitors 6 - n , 6 - (n−1) . . . are detected by the voltage detection circuit 151 through the first selection circuit 21 . The reference voltages Vrefn, Vref(n-1) ... Vref1 for setting the charging voltage target value of each capacitor 6-n, 6-(n-1) ... are provided through the second selection circuit 22 to supply the respective reference voltages to the second selection circuit 22. The non-inverting input terminal (+) of the second error amplifier 161. The selection signal S is input to each of the above-mentioned selection circuits 21 and 22, and switching of the capacitor for detecting the charging voltage and switching of the reference voltage are performed. That is, it is selected according to the capacitor and the reference voltage so that the reference voltage Vrefn is set when detecting the charging voltage of the capacitor 6-n, and the reference voltage Vref(n-1) is set when detecting the charging voltage of the capacitor 6-(n-1). ). Other constitutions are basically the same as those of the third embodiment described above.

In the power supply device having such a configuration, for example, in a state where the charging voltage detection of the capacitor 6-n and the reference voltage Vrefn are selected by the selection signal S, when the load changes and the charging voltage of the capacitor 6-n becomes lower than the target value , the voltage detection circuit 151 detects it, and the second error amplifier 161 compares the reference voltage Vrefn, which is a target value of the charging voltage, with the detected voltage. The error thereof is output to the multiplier 131 . The multiplier 131 is controlled to increase the amplitude of the sinusoidal waveform data from the input current target value setting circuit 142 by the error output from the second error amplifier 161 . Outputs from the multiplier 131 are level-shifted by level shift circuits 20-n, 20-(n-1)..., respectively, and input to first error amplifiers 12-n, 12-(n-1)....

The first error amplifiers 12-n, 12-(n-1)... The input current of the target value whose amplitude is increased is in phase with the actual input current detected by the input current output circuit 5-n, 5-(n-1)... Compared, the error output thereof is supplied to the drive circuits 11-n, 11-(n-1) . . . The drive circuits 11-n, 11-(n-1), ... control the variable resistors 4-n, 4-(n-1), ... so that the actual input current approaches the input current of the target value. Thus, when the charging voltage of the capacitor 6-n is lower than the target value, the impedances of the variable resistors 4-n, 4-(n-1)... are controlled so that no matter in the capacitor 6-n or in the other capacitors 6 -(n-1)... a large charging current flows.

However, for the other capacitors 6-(n-1)..., since the charging voltage is not directly detected, there is still concern that the charging voltage may deviate from the target value. In this regard, in this embodiment, the reference voltage Vref(n-1) is selected when detecting the charging voltage of the next capacitor 6-(n-1) through the selection signal S, so this time, the capacitor is directly detected 6-(n-1) charging voltage. And the charging voltage of the capacitor 6-(n-1) is controlled to a target value.

Therefore, the reference voltage is set correspondingly while sequentially switching the capacitors for detecting the charging voltage. Accordingly, the charging voltage of each capacitor can be reliably brought close to the target value. That is, the charging voltage of each capacitor can be reliably controlled to a target value and become constant.

Moreover, the present embodiment is the same as the above-mentioned embodiment, even if the charging voltage of the capacitor 6-n, 6-(n-1)... even if the load changes, etc., it can always be controlled to a target value and become constant, and the charging voltage to the load can be made constant. The supplied voltage is stabilized, and at the same time, the input current can be sinusoidal.

fifth embodiment

The parts that are the same as those in the above-mentioned first to fourth embodiments are denoted by the same symbols, and detailed description thereof will be omitted.

As shown in FIG. 7, as a circuit for detecting the charging voltage of the capacitor, by obtaining the charging voltage of each capacitor 6-n, 6-(n-1)..., using the voltage average value output circuit 152 that outputs the average value, the The output of the voltage average value output circuit 152 is supplied to the inverting input terminal (−) of the second error amplifier 161 . As the reference voltage, an average value reference voltage Vrefav that sets the average value of the charging voltage target values of the respective capacitors 6-n, 6-(n-1) . . . non-inverting input terminal (+).

In this way, the average value of the charging voltage of each capacitor 6-n, 6-(n-1) ... is obtained by the average voltage output circuit 152, for example, when the average value of the charging voltage becomes lower than the average value due to a load change. When the reference voltage is Vrefav, the second error amplifier 161 provides the difference to the multiplier 131 . Thus, the multiplier 131 increases the amplitude of the sinusoidal waveform data of the input current from the input current target value setting circuit 142, and supplies each level shift circuit 20-n, 20-(n-1)... to each first An error amplifier 12-n, 12-(n-1)....

Moreover, in this embodiment, when the average value of the charging voltage of each capacitor is lower than the target value, the impedance of the variable resistors 4-n, 4-(n-1)... is controlled so that a large amount of charging voltage flows in each capacitor. current. If the average value of the charging voltage of each capacitor is higher than the target value, on the contrary, the impedances of the variable resistors 4-n, 4-(n-1) . . . are controlled so that less charging current flows in each capacitor.

Furthermore, in this embodiment, as in the above-described embodiment, even if a load change or the like occurs, the charging voltage of the capacitors 6-n, 6-(n-1)... can always be controlled to a target value and become constant, The voltage supplied to the load can be stabilized and the input current becomes sinusoidal.

Sixth embodiment

The parts that are the same as those in the above-mentioned first to fifth embodiments are denoted by the same symbols, and detailed description is omitted.

In this embodiment, the circuit shown in FIG. 8 is used instead of the voltage average value output circuit 152 of the fifth embodiment. This circuit is configured to be used in the capacitor with the largest difference between the detection control and the target value of the charging voltage of the capacitor. Other structures are the same as the fifth embodiment.

That is, the charging voltages of the respective capacitors 6-n, 6-(n-1)..., 6-1 are input to one input terminal of the difference detectors 23-n, 23-(n-1)..., 23-1, respectively. input to the controlled voltage selector 26 at the same time. The reference voltages Vrefn, Vref(n-1) ... Vref1 for setting the target value of each capacitor are supplied to the other input terminals of the above-mentioned difference detectors 23-n, 23-(n-1) ..., 23-1, At the same time, it is provided to the target voltage selector 27 .

The above-mentioned respective difference detectors 23-n, 23-(n-1)..., 23-1 detect the charge voltage and the reference voltage Vrefn, Vref(n The difference between -1) ... Vref1 is supplied to the absolute value detectors 24-n, 24-(n-1), ... 24-1, respectively. The absolute value detectors 24-n, 24-(n-1), . The above-mentioned maximum value detector 25 detects the maximum value of the absolute value, and the selection signal for selecting the capacitor corresponding to the maximum value is provided to the above-mentioned controlled voltage selector 26, and at the same time, the selection signal for selecting the reference voltage corresponding to the maximum value is provided to to the above-mentioned target voltage selector 27.

The above-mentioned controlled voltage selector 26 selects a charging voltage of each capacitor 6-n, 6-(n-1)..., 6-1 through the selection signal from the above-mentioned maximum value detector 25 and inputs it to the second error amplifier 161. Inversion input terminal (-). The target voltage selector 27 selects a reference voltage corresponding to the selection capacitor from among the reference voltages Vrefn, Vref(n-1) ... Vref1 by the selection signal from the maximum value detector 25, and inputs the reference voltage to the second error amplifier 161. Inversion input terminal (+).

In this configuration, the charging voltage of each capacitor 6-n, 6-(n-1), . . . , 6-1 varies due to load variation. Difference detectors 23-n, 23-(n-1), . . . , 23-1 respectively detect charging voltages of capacitors 6-n, 6-(n-1), . , Vref(n-1) ... Vref1 difference, then, the absolute value detector 24-n, 24-(n-1), ... 24-1 detects the absolute value of the difference, and the maximum value detector 25 detects the absolute value the maximum value. That is, the maximum value detector 25 detects the capacitor having the largest difference between the reference voltage and the charging voltage. The maximum value detector 25 supplies a selection signal for selecting the charging voltage of the capacitor with the largest difference to the controlled voltage selector 26 , and simultaneously supplies a selection signal for selecting a reference voltage corresponding to the capacitor with the largest difference to the target voltage selector 27 .

Thus, the second error amplifier 161 obtains the difference between the charging voltage of the capacitor with the largest difference and the corresponding reference voltage, and supplies it to the multiplier 131 . The multiplier 131 controls the amplitude of the sinusoidal waveform data from the input current target value setting circuit 142 through the error output from the second error amplifier 161 . Outputs from the multiplier 131 are level-shifted by level shift circuits 20-n, 20-(n-1)..., respectively, and then input to first error amplifiers 12-n, 12-(n-1)....

The first error amplifier 12-n, 12-(n-1)... compares the input current of the target value of the control amplitude with the actual input current detected by the input current output circuit 5-n, 5-(n-1), The error outputs thereof are supplied to drive circuits 11-n, 11-(n-1).... The drive circuits 11-n, 11-(n-1)... control the impedance of the variable resistors 4-n, 4-(n-1)... so that the actual input current approaches the input current of the target value. Accordingly, the charging voltage of the corresponding capacitor is controlled to be close to the target value.

This embodiment is the same as the above-mentioned embodiment, even if the load changes etc., the charging voltage of the capacitor 6-n, 6-(n-1)... can always be controlled to the target value and become constant, and the voltage supplied to the load can be made constant. The voltage is stabilized, and at the same time, the input current can become sinusoidal.

Seventh embodiment

The parts that are the same as those in the above-mentioned first to sixth embodiments are denoted by the same symbols, and detailed description is omitted.

As shown in Figure 9, the present embodiment replaces the difference detectors 23-n, 23-(n-1)...28-1 of the sixth embodiment with ratio detectors 28-n, 28-(n-1)... , 23-1, the absolute value detectors 24-n, 24-(n-1), .

This circuit is constituted as follows: after detecting the ratio between the charging voltage of the capacitor and the target value by the above-mentioned ratio detectors 28-n, 28-(n-1)...28-1, the difference detectors 29-n, 29 -(n-1)...29-1 detects the absolute value of the difference between the detected ratio and 1, and detects the maximum absolute value of the detected difference between the detected ratio and 1 by the maximum value detector 25, and makes the charging voltage close to the target value The detected charging voltage of the capacitor and the target value are used in the control of . For example, when the detected ratios are 0.5, 1.2, etc., |0.5-1|=0.5, |1.2-1|=0.2, etc. are obtained, and the maximum value detector 25 judges that 0.5>0.2.

In this way, the absolute value of the difference between the ratio of the charging voltage of the capacitor and the target value and 1 is detected to be the largest, and control is performed to bring the charging voltage of the capacitor close to the target value. Like the above-mentioned embodiment, even if there is a load change, etc., the The charging voltage of the capacitors 6-n, 6-(n-1)..., 6-1 is controlled to be constant at the target value, and the voltage supplied to the load can be stabilized, and the input current can be sinusoidal.

Eighth embodiment

The parts that are the same as those in the above-mentioned first to seventh embodiments use the same symbols, and detailed description is omitted.

With the structure of the driving circuit 7-1 shown in FIG. 10, this embodiment shows a modified example of the first embodiment described above. That is, a resistor divider circuit 31 is connected in parallel to the output terminal of the full-wave rectifier circuit 2 , and the voltage at the divider point of the resistor divider circuit 31 is output from the output circuit 32 .

On the other hand, a power supply voltage detection circuit 33 is provided in the amplitude control unit 7-12, and an output from the above-mentioned output circuit 32 is received by an input circuit 34 and supplied to the above-mentioned power supply voltage detection circuit 33. The above-mentioned relationship between the output circuit 32 and the input circuit 34 is, for example, the relationship between a light emitting diode and a phototransistor in a photocoupler, and the input circuit 34 is insulated and obtains an output signal from the output circuit 32 .

The power supply voltage detection circuit 33 detects the power supply voltage through the output circuit 32 and the input circuit 34, and changes the reference voltage Vref for setting the target value of the charging voltage according to the detected power supply voltage. Here, although the configuration of the drive circuit 7-1 has been described, the configurations of the other drive circuits 7-2 to 7-n are also the same.

In this configuration, during the rise of the input voltage waveform from the full-wave rectifier 2, the impedances of the variable resistors 4-1, 4-2...4-n are switched from infinite to finite at predetermined timing, and, The impedance is variably controlled and the respective capacitors 6-1, 6-2..., 6-n are charged sequentially.

During the fall of the input voltage waveform from the full-wave rectifier 2, if the charging voltage of the capacitor in the previous stage is equal to the input voltage, the impedance of the corresponding variable resistor is switched to infinite, and at the same time, the variable resistor of the next stage The impedance of the switch to a finite value replaces the capacitor of the previous stage and begins to charge the capacitor of the next stage. Then, the input current is controlled so that the impedance of the variable resistor corresponding to the charging of the capacitor decreases.

By performing such control, the input current waveform from the full-wave rectifier 2 becomes a sine wave almost in phase with the input voltage waveform. In this way, the power factor for sufficiently suppressing high-frequency components in the input current can be improved.

When performing such control, there are cases where the load changes and the charging voltage of the capacitors 6-n, 6-(n-1), . . . , 6-1 becomes lower or higher than the target value. In this case, the charging voltages of the capacitors 6-n, 6-(n-1), . . . , 6-1 are controlled to target values. Therefore, even if there is a load change, etc., the charging voltage of the capacitors 6-n, 6-(n-1)..., 6-1 is always controlled to a target value and becomes constant, and even if the load changes, etc., the voltage supplied to the The load voltage is stabilized.

When the power supply voltage changes, the power supply voltage detection circuit 33 detects the change through the output circuit 32 and the input circuit 34 . The reference voltage Vref is variable according to its variation. That is, when the power supply voltage is higher than the rated voltage, the power supply voltage detection circuit 33 raises the reference voltage Vref, and when the power supply voltage is lower than the target voltage, the power supply voltage detection circuit 33 lowers the reference voltage Vref.

Accordingly, the load voltage of the MOS type FETs constituting the variable resistors 4-1, 4-2...4-n is reduced to suppress circuit loss. The situation where the input current does not flow can be avoided, and the input current can flow continuously.

Ninth embodiment

The parts that are the same as those in the above-mentioned first to eighth embodiments are denoted by the same symbols, and detailed description is omitted.

As shown in FIG. 11, this embodiment shows a modified example of the third embodiment described above. That is, the resistor divider circuit 37 made up of the series circuit of resistors 35 and 36 is connected in parallel to the output terminal of the full-wave rectifier circuit 2, the capacitor 38 is connected in parallel to the resistor 36 of the resistor divider circuit 37, and the resistors 35 and 36 are connected in parallel. The connection point of 36 is connected to the non-inverting input terminal (+) of the second error amplifier 161 . That is, the average voltage is output from the parallel circuit of the resistor 36 and the capacitor 38, and the average voltage is used instead of the reference voltage Vrefn for setting the target value of the charging voltage of the capacitor 6-n.

In this configuration, when the power supply voltage changes from the rated value, the target value of the charging voltage is set in proportion to the change. As a result, the relationship between the charging voltage of the capacitor and the power supply voltage always satisfies the conditions for improving the charging efficiency, without losing the variation efficiency. When the power supply voltage rises, the load voltage of the MOS type FET constituting the variable resistors 4-n, 4-(n-1) . When the power supply voltage drops, if the control is performed to lower the capacitor voltage, it is possible to avoid the situation where the input current does not flow, and the input current can continue to flow. In this embodiment, as in the other embodiments, even if load changes or the like occur, the charging voltages of the capacitors 6-n, 6-(n-1)... are always controlled to be constant at target values, enabling Stabilizes the voltage supplied to the load.

Tenth embodiment

The parts that are the same as those in the above-mentioned first to ninth embodiments are denoted by the same symbols, and detailed description is omitted.

As shown in FIG. 12, this embodiment shows a modified example of the second embodiment described above. That is, a resistor divider circuit 40 composed of a series circuit of (n+2) resistors is connected in parallel to the output terminal of the full-wave rectifier circuit 2, and among the (n+2) resistors of the resistor divider circuit 40, A capacitor 41 is connected in parallel to a series circuit of n resistors. Furthermore, the connection points of the (n+1) resistors are sequentially connected to the non-inverting input terminals (+) of the n second error amplifiers 16-1, 16-2, . . . in order of lower voltage. Therefore, in this circuit, each connection point voltage of (n+1) resistors is substituted for the reference voltages Vref1, Vref2... for setting the charging voltage target value of each capacitor 6-1, 6-2....

In this configuration, when the power supply voltage changes from the rated value, the target value of the charging voltage of each capacitor 6-1, 6-2... is set in proportion thereto. As a result, the relationship between the charging voltage of each capacitor and the power supply voltage always satisfies the conditions for improving the charging efficiency, without losing the variation efficiency. When the power supply voltage rises, the load voltage of the MOS type FET constituting the variable resistors 4-n, 4-(n-1) . When the power supply voltage drops, if the control is performed to lower the capacitor voltage, it is possible to avoid the situation where the input current does not flow, and the input current can continue to flow. In this embodiment, as in the other embodiments, even if load changes or the like occur, the charging voltages of the capacitors 6-n, 6-(n-1)... are always controlled to be constant at target values, enabling Stabilizes the voltage supplied to the load.

Hereinafter, for the second present invention, the eleventh to eighteenth embodiments will be described with reference to FIGS. 13 to 30 . The symbols in the description of the eleventh to eighteenth embodiments and the drawings in FIGS. 13 to 30 are applicable to the eleventh to eighteenth embodiments.

11th embodiment

As shown in FIG. 13, one end of n switches 12-1, 12-2...12-n composed of FETs (field effect transistors) etc. is connected to n DC voltage sources 11-1 generating different positive voltage values. , 11-2...11-n positive terminal. The switches 12-1 to 12-n described above constitute a switch circuit. The switches 12 - 1 to 12 - n are connected to one end of the polarity inversion circuit 13 .

The polarity inversion circuit 13 is constituted by four switches 14-1, 14-2, 14-3, and 14-4 composed of FETs and the like. That is, the series circuit of the switch 14-1 and the switch 14-2 is connected in parallel to the series circuit of the switch 14-3 and the switch 14-4, and one end of each of the switches 12-1 to 12-n is connected to the switches 14-1, 14-3 on one end.

The other end of the polarity inverting circuit 13, that is, the other ends of the switches 14-2 and 144 are connected to the negative terminals of the DC voltage sources 11-1 to 11-n. The discharge lamp 15 is connected to the connection point of the switch 14-1 and the switch 14-2 and the connection point of the switch 14-3 and the switch 14-4 in the above-mentioned polarity inversion circuit 13 through a lamp current detector 16 composed of a low resistance or the like. between.

The above-mentioned switches 12-1~12-n are repeatedly switched one by one through the drive circuit 17, and the DC voltage values are sequentially taken out from the above-mentioned current and voltage sources 11-1~11-n, which will include zero voltage The stepped voltage waveform of the value is output to the polarity inversion circuit 13 described above. The polarity inversion circuit 13 alternately repeats the opening of the switches 14-1 and 14-4 and the opening of the switches 14-2 and 14-3 in each cycle of the repeated operation of the above-mentioned switches 12-1 to 12-n, For example, a voltage waveform of a stepped voltage is supplied to the discharge lamp 15 at a high frequency of several tens of KHz.

The discharge lamp current detected by the lamp current detector 16 is supplied to an effective value converter 18 . The effective value converter 18 converts the discharge lamp current detected by the lamp current detector 16 into a voltage according to the effective value of the discharge lamp current, and the effective value voltage is supplied to the inverting input terminal (-) of the error amplifier 19 . A voltage Vref corresponding to a rated value of the effective value of the discharge lamp current is supplied to the non-inverting input terminal (+) of the above-mentioned error amplifier 19 .

The error amplifier 19 compares the effective value voltage from the effective value converter 18 with the voltage Vref equivalent to the rated value, and outputs a feedback signal for bringing the effective value voltage closer to the voltage Vref equivalent to the rated value. A feedback signal from the above-mentioned error amplifier 19 is supplied to the on/off timing control section 21 of the controller 20 .

The on/off timing control section 21 determines the timing of opening and closing the respective switches 12-1 to 12-n of the above-mentioned drive circuit 17 through the feedback signal from the error amplifier 19, and supplies the timing signal to the drive signal generation section of the same controller 20. twenty two.

The driving signal generation unit 22 acquires a clock signal from the clock generation unit 23 , and supplies the driving signal to the driving circuit 17 in synchronization with the timing determined by the on/off timing control unit 21 and the clock signal. Accordingly, the drive circuit 17 sequentially turns on each of the switches 12-1 to 12-n at a predetermined timing so that the effective value voltage approaches the voltage Vref corresponding to the rated value. In this way, the frequency of the stepped voltage waveform including the zero voltage value supplied from the polarity inversion circuit 13 to the discharge lamp 15 is fixed by the clock signal from the clock generator 23 .

The controller 20 outputs to the drive circuit 17 the drive signals for switching the switches 12-1 to 12-n so that when the effective value voltage from the effective value converter 18 is substantially equal to the voltage Vref corresponding to the rated value, the A stepped voltage waveform including zero voltage value is supplied from the polarity inversion circuit 13 to the discharge lamp 15 as shown in FIG. 14( b ).

The controller 20 outputs, to the drive circuit 17, driving signals for switching the switches 12-1 to 12-n so that when the effective value voltage from the effective value converter 18 is lower than the voltage Vref corresponding to the rated value, it will be as follows: A step-shaped voltage waveform including zero voltage value shown in FIG. 14( a ) is supplied from the polarity inversion circuit 13 to the discharge lamp 15 . That is, the controller 20 performs control such that the higher the voltage value in the stepped voltage waveform is, the longer the output time is, and the lower the voltage value including the zero voltage value, the shorter the output time is.

The controller 20 outputs, to the drive circuit 17, driving signals for switching and controlling the respective switches 12-1 to 12-n so that when the effective value voltage from the effective value converter 18 is higher than the voltage Vref corresponding to the rated value, it will be as follows: A step-shaped voltage waveform including zero voltage value shown in FIG. 14( c ) is supplied from the polarity inversion circuit 13 to the discharge lamp 15 . That is, the controller 20 performs control such that, in the stepped voltage waveform, the higher the voltage value, the shorter the output time, and the lower the voltage value including the zero voltage value, the longer the output time.

By performing such control, the effective value of the discharge lamp current flowing through the discharge lamp 15 is controlled to be constant, and therefore, the discharge lamp current flowing through the discharge lamp 15 is limited and stabilized. That is, without using winding components such as coils, the discharge lamp 15 can be stably illuminated, and the size and weight of the device can be reduced.

By this control, the time for supplying the zero voltage value to the discharge lamp 15 is controlled, and therefore, the control range of the effective value of the supply voltage to be taken can be expanded.

As another control, the controller 20 outputs switching control driving signals for the respective switches 12-1 to 12-n so that when the effective value voltage from the effective value converter 18 is approximately equal to the voltage Vref equivalent to the rated value, each The switches 12 - 1 to 12 - n supply the polarity inversion circuit 13 with a stepped voltage waveform shown in FIG. 15( b ).

The controller 20 performs such a control that when the effective value voltage from the effective value converter 18 is lower than the voltage Vref corresponding to the rated value, the polarity reversal circuit 13 is supplied with the voltage shown in FIG. 15 through the switches 12-1 to 12-n. In the stepped voltage waveform in which the time of the zero voltage value shown in (a) is constant, the higher the voltage value is, the longer the output time is, and the lower the voltage value is, the shorter the output time is.

The controller 20 performs such control that when the effective value voltage from the effective value converter 18 is higher than the voltage Vref corresponding to the rated value, the polarity inversion circuit 13 is supplied with the voltage shown in FIG. 15 through the switches 12-1 to 12-n. In the stepped voltage waveform in which the time of the zero voltage value shown in (a) is constant, the higher the voltage value is, the longer the output time is, and the lower the voltage value is, the shorter the output time is.

By performing such control, the discharge lamp current flowing through the discharge lamp 15 is limited and stabilized. By this control, the period during which power is supplied to the discharge lamp 15 is always constant, so that the luminous efficiency of the discharge lamp is improved, and emission noise emitted from the discharge lamp can be suppressed.

12th embodiment

The parts that are the same as those in the above-mentioned eleventh embodiment are denoted by the same symbols, and the detailed description of these parts will be omitted.

As shown in FIG. 16, using n DC voltage sources 31-1, 31-2...31-n with newly generated different negative voltage values, connect the negative terminals of the DC voltage sources 31-1 to 31-n respectively One end of n switches 32 - 1 , 32 - 2 . . . 32 - n composed of FET (Field Effect Transistor) or the like. The switches 12-1 to 12-n constitute a first switch circuit, and the switches 32-1 to 32n constitute a second switch circuit.

When the polarity inversion circuit 13 is not used, the other ends of the switches 12 - 1 to 12 - n and the other ends of the switches 32 - 1 to 32 - n are connected to one end of the discharge lamp 15 . The other end of the discharge lamp 15 is connected to the negative terminals of the DC voltage sources 11-1 to 11-n and the positive terminals of the respective DC voltage sources 31-1 to 31-n through the lamp current detector 16. In addition, other configurations are the same as the above-mentioned embodiment.

In this configuration, the controller 20 outputs the drive signals for switching the switches 12-1 to 12-n and 32-1 to 32-n to the drive circuit 17 so that the effective value from the effective value converter 18 When the voltage is substantially equal to the voltage Vref equivalent to the rated value, the discharge lamp 15 is supplied with the power supply including the voltage shown in FIG. 14(b) or FIG. The shown step-like voltage waveform contains zero voltage value.

The controller 20 outputs the drive signals for switching the switches 12-1 to 12-n and 32-1 to 32-n to the drive circuit 17 so that the effective value voltage ratio from the effective value converter 18 is equivalent to the rated value When the voltage Vref of Vref is low, the discharge lamp 15 is provided with a step including zero voltage value as shown in FIG. 14(a) or FIG. shaped voltage waveform. That is, control is performed such that the higher the voltage value in the stepped voltage waveform, the longer the output time, the lower the voltage value including the zero voltage value, the shorter the output time, or the output time of the zero voltage value is fixed, The lower the voltage value, the shorter the output time.

The controller 20 outputs the drive signals for switching the switches 12-1 to 12-n and 32-1 to 32-n to the drive circuit 17 so that the effective value voltage ratio from the effective value converter 18 is equivalent to the rated value When the voltage Vref of Vref is high, the discharge lamp 15 is provided with a step including zero voltage value as shown in FIG. 14(c) or FIG. shaped voltage waveform. That is, such control is performed that, in the stepped voltage waveform, the higher the voltage value, the shorter the output time, the lower the voltage value including the zero voltage value, the longer the output time, or the fixed output time of the zero voltage value, the voltage value The lower the value, the longer the output time.

Therefore, in this embodiment, the discharge lamp current flowing through the discharge lamp 15 is controlled so that its effective value becomes constant, and the discharge lamp current flowing through the discharge lamp 15 is limited and stabilized. Therefore, similarly to the above-described embodiments, the device can be reduced in size and weight.

In this embodiment, if the control of the stepped voltage waveform is performed as shown in FIG. 14, the control range of the effective value of the supplied voltage can be expanded. By controlling the stepped voltage waveform as shown in FIG. 15, the luminous efficiency can be improved and emission noise can be suppressed.

Thirteenth embodiment

The parts that are the same as those in the eleventh to twelfth embodiments described above are denoted by the same symbols, and detailed descriptions of these parts are omitted. As shown in FIG. 17, capacitors are used instead of the DC voltage sources 11-1 to 11-n in the eleventh embodiment described above.

That is, the input terminal of the full-wave rectifier 42 is connected to the commercial AC power supply 41, and the capacitors 44-1, 44-2...44-n pass through the variable resistors 43-1, 43-n composed of FETs (field effect transistors), respectively. 2 . . . 43-n are connected to output terminals of the full-wave rectifier 42, respectively. The polarity inversion circuit 13 is connected to the respective capacitors 44-1 to 44-n through switches 12-1, 12-2...12-n, respectively.

The variable resistors 43-1 to 43-n mentioned above drive FETs in the non-saturated region to realize the function as variable resistors. Therefore, they are controlled so that the impedance of becomes a finite value, and other than this period, the impedance becomes infinite. The above-mentioned variable resistors 43-1 to 43-n become impedances when controlling the charging of the respective capacitors 44-1 to 44-n, so that the input current of a waveform approximately proportional to the commercial AC input voltage flows from the above-mentioned full-wave rectifier 42 inflow.

During the rise of the absolute value of the power supply voltage of the commercial AC power supply 41, the charging of a certain capacitor is started when the voltage of the capacitor is equal to the absolute value of the commercial AC power supply voltage, and is stopped when the voltage of the lower stage capacitor is equal to the absolute value of the commercial AC power supply voltage. , during the period when the absolute value of the power supply voltage of the commercial AC power supply 41 drops, the charging of a certain capacitor starts when the voltage of the previous capacitor is equal to the absolute value of the commercial AC power supply voltage, and when the charging voltage is equal to the absolute value of the commercial AC power supply voltage stop. Other configurations are the same as those of the above-mentioned twelfth embodiment.

In this configuration, the variable resistors 43-1 to 43-n are controlled to have sequentially prescribed impedances according to changes in the output voltage of the full-wave rectifier 42. A desired charging current flows through each of the capacitors 44-1 to 44-n.

That is, when the output voltage of the full-wave rectifier 42 rises, when the capacitor 44-1 is charged by the variable resistor 43-1, if the output voltage of the full-wave rectifier 42 is equal to the charging voltage of the next-stage capacitor 44-2 , then the impedance of the variable resistor 43-1 switches from a finite value to an infinite value, and stops charging the capacitor 44-1, instead, the impedance of the variable resistor 43-2 switches from an infinite value to a finite value, through the variable The resistor 43-2 charges the capacitor 44-2.

In this way, while the output voltage of the full-wave rectifier 42 is rising, the impedances of the variable resistors 43-1 to 43-n are switched from infinite to finite at predetermined timing, and current flows in the capacitors 44-1 to 44-n. The charging current exceeds the preset target value.

When the output voltage of the full-wave rectifier 42 drops, if the charging voltage of the capacitor 44-n is equal to the output voltage of the full-wave rectifier 42, the impedance of the variable resistor 43-n is switched from a finite value to an infinite value, and at the same time, the variable The resistance of the resistor 43-(n-1) is switched from infinite to finite, and instead of the capacitor 44-n, the capacitor 44-(n-1) starts to be charged.

In this way, while the output voltage of the full-wave rectifier 42 is falling, the impedances of the variable resistors 43-1 to 43-n are switched from infinite to finite at predetermined timing, and current flows in the capacitors 44-1 to 44-n. The charging current exceeds the preset target value. The charging current waveform of the target value is set as a sine wave having the same phase as the input voltage waveform. By performing this control, the input current waveform from the full-wave rectifier 42 can be changed into a sine wave having almost the same phase as the voltage waveform, and the input voltage can be improved. power factor.

On the other hand, the switches 12-1 to 12-n sequentially perform switching operations at a cycle earlier than the cycle of switching impedances of the variable resistors 43-1 to 43-n, and sequentially supply polarity inverting circuit 13 with The charging voltage of each capacitor 44-1 to 44-n. Furthermore, a stepped voltage waveform is supplied from the polarity inversion circuit 13 to the discharge lamp 15 . In this way, the discharge lamp 15 is illuminated with high frequency.

In this embodiment, the stepped voltage waveform supplied from the polarity inversion circuit 13 to the discharge lamp 15 is controlled so that the effective value of the discharge lamp current flowing in the discharge lamp 15 becomes constant, and therefore, the current flowing in the discharge lamp 15 becomes constant. The excess discharge lamp current is limited and stabilized. Therefore, similarly to the above-described embodiments, the device can be reduced in size and weight.

In this embodiment, if the control of the stepped voltage waveform is performed as shown in FIG. 14, the control range of the effective value of the supply voltage can be expanded. By controlling the stepwise voltage waveform as shown in FIG. 15, the luminous efficiency of the discharge lamp can be improved, and radiation noise emitted from the discharge lamp can be suppressed.

14th embodiment

The structure of this embodiment is shown in FIG. 16 . In this embodiment, for example, as an example, when the effective value of the discharge lamp current is in the rated state, as shown in FIG. The on-time of the lamp is not variable but constant, and a stepped voltage waveform including zero voltage value is supplied to the discharge lamp 15 .

When the effective value of the discharge lamp current increases more than the rated value, as shown in FIG. 18(a), when the voltage from the DC voltage source whose voltage is higher than the rated effective value is supplied to the discharge lamp 15, the connection of the corresponding switch The on-time is not variable but constant. When the voltage from the DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the on-time of the corresponding switch can be extended, and a stepped voltage waveform is provided to the discharge lamp 15. .

When the effective value of the discharge lamp current decreases smaller than the rated value, as shown in FIG. 18(c), when the voltage from the DC voltage source whose voltage is higher than the rated effective value is supplied to the discharge lamp 15, the corresponding switch is turned on. The time is not variable but constant. When the voltage from the DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the on-time of the corresponding switch can be shortened, and a stepped voltage waveform is provided to the discharge lamp 15.

By performing such control, the effective value of the electric current can be controlled to be constant, thereby enabling the discharge lamp 15 to be illuminated stably without using a winding member, and the size and weight of the device can be reduced.

As another example, when the effective value of the discharge lamp current is in the rated state, as shown in FIG. To be constant, a stepped voltage waveform including a zero voltage value is supplied to the discharge lamp 15 .

When the effective value of the discharge lamp current increases more than the rated value, as shown in FIG. The time is controlled to be shortened. When the voltage from the DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the ON time of the switch is not variable but constant, and the discharge lamp 15 is supplied with a stepped voltage waveform.

When the effective value of the discharge lamp current decreases smaller than the rated value, as shown in Fig. 19(c), when the voltage from a DC voltage source having a voltage higher than the rated effective value is supplied to the discharge lamp 15, the ON time of the switch Controlled to be longer, when the voltage from the DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the ON time of the switch is not variable but constant, and a stepped voltage waveform is supplied to the discharge lamp 15.

By performing such control, the effective value of the current of the discharge lamp can be controlled to be constant, whereby the discharge lamp 15 can be stably illuminated without using a winding member, and the size and weight of the device can be reduced.

As another example, when the effective value of the discharge lamp current is in the rated state, as shown in FIG. To be constant, a stepped voltage waveform including a zero voltage value is supplied to the discharge lamp 15 .

When the effective value of the discharge lamp current is increased more than the rated value, as shown in FIG. The time is controlled to be shortened, and when the voltage from the DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the on-time of the switch is controlled to be long, and the discharge lamp 15 is provided with a stepped voltage waveform.

When the effective value of the discharge lamp current decreases smaller than the rated value, as shown in FIG. 20(c), when the voltage from a DC voltage source having a voltage higher than the rated effective value is supplied to the discharge lamp 15, the ON time of the switch Controlled to be longer, when the voltage from the DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the ON time of the switch is controlled to be shortened, and the discharge lamp 15 is supplied with a stepped voltage waveform.

By performing such control, the effective value of the current of the discharge lamp can be controlled to be constant, whereby the discharge lamp 15 can be stably illuminated without using a winding member, and the size and weight of the device can be reduced.

As another example, as shown in FIG. 21, in a state where the frequency of the stepped voltage waveform supplied to the discharge lamp 15 is almost constant, control is performed such that the DC voltage source whose difference from the rated effective value is larger, the corresponding switch The longer the on-time, or increase the degree to shorten the on-time. That is, when the effective value of the discharge lamp current is in the rated state, as shown in FIG. 21(b), the on-times of the switches 12-1 to 12-n and 32-1 to 32-n are not variable but constant. A stepped voltage waveform including a zero voltage value is supplied to the discharge lamp 15 .

When the effective value of the discharge lamp current increases more than the rated value, as shown in Fig. 21(a), when the voltage from the DC voltage source whose voltage is higher than the rated effective value is supplied to the discharge lamp 15, the switch-on The time is controlled to be as short as possible, and when the voltage from a DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the on-time of the switch is controlled to be as long as possible, and a stepped voltage is provided to the discharge lamp 15 waveform.

When the effective value of the discharge lamp current decreases smaller than the rated value, as shown in FIG. 21(c), when a voltage from a DC voltage source having a voltage higher than the rated effective value is supplied to the discharge lamp 15, the on-time of the switch Control to be as long as possible, when the voltage from the DC voltage source whose voltage is lower than the rated effective value is supplied to the discharge lamp 15, the on-time of the switch is controlled to be as short as possible to provide the discharge lamp 15 with a stepped voltage waveform .

By performing such control, the effective value of the current of the discharge lamp can be controlled to be constant, whereby the discharge lamp 15 can be stably illuminated without using a winding member, and the size and weight of the device can be reduced.

15th embodiment

The structure of this embodiment is shown in FIG. 17 . In this embodiment, as shown in FIG. 22 , the charging voltages of the respective capacitors 44-1 to 44-n are controlled by the impedances of the respective variable resistors 43-1 to 43-n as output voltages along the full-wave rectifier 42. The stepped voltage VA of the waveform Vin.

In this way, the charging voltages of the capacitors 44-1 to 44-n are supplied to the polarity inversion circuit 13 as high-frequency stepped voltage waveforms through the switching operations of the switches 12-1 to 12-n, and the polarity inversion The circuit 13 supplies the discharge lamp 14 with a high-frequency stepped voltage waveform.

At this time, the switch operation time of the switches 12-1～12-n is set to be: according to the impedance switching timing of each variable resistor 43-1～43-n, the variable resistors 43-1～43-n The time when the n impedance switches to a finite value is multiplied by the same constant time.

Therefore, as shown in FIG. 23 , the high-frequency stepped voltage waveform supplied to the polarity inversion circuit 13 is a waveform along the sinusoidal envelope VX. In this way, the envelope of the stepped voltage waveform supplied from the polarity inversion circuit 13 to the discharge lamp 15 can be sinusoidal, thereby improving the luminous efficiency of the discharge lamp and suppressing emission noise from the discharge lamp and the like. In addition, in this embodiment, the effective value of the discharge lamp current can be controlled to be constant without using a winding member, so that the size and weight of the device can be realized.

Sixteenth embodiment

The parts that are the same as those in the eleventh to fifteenth embodiments described above are denoted by the same symbols, and detailed descriptions of these parts are omitted.

As shown in Figure 24, the input current detection circuit 46-1...46-n composed of impedance elements such as series connected diodes 5-1...45-n, variable resistors 43-1...43-n, resistors, etc. The capacitors 44 - 1 . . . 44 - n are connected to the output terminals of the full wave rectifier 42 .

The variable resistors 43-1 to 43-n are driven by the drive circuits 47-1 to 47-n, and outputs from the error amplifiers 48-1 to 48-n are supplied to the drive circuits 47-1 to 47-n. .

The charging voltages of the respective capacitors 44-1 to 44-n are detected by the capacitor voltage detecting circuits 49-1...49-n, and the detected outputs are supplied to the inverting input terminals of the error amplifiers 50-1...50-n (- )superior. Reference voltages Vref1 to Vrefn for setting the charging voltage target value are supplied to the non-inverting input terminals (+) of the above-mentioned error amplifiers 50-1...50-n. The outputs of the above-mentioned error amplifiers 50-1...50-n are supplied to multipliers 51-1 to 51-n, respectively.

An input current target value setting circuit 52 is provided, and the sine wave data of the input current as a target value is supplied from the setting circuit 52 to the above-mentioned respective multipliers 51-1 to 51-n. The multipliers 51-1 to 51-n variably control the amplitude of the input current sine wave data from the input current target value setting circuit 52 by the outputs from the error amplifiers 50-1...50-n.

Outputs from the respective multipliers 51-1 to 51-n are level-shifted by level shift circuits 53-1 to 53-n, respectively, and input to the non-inverting circuits of the first error amplifiers 48-1 to 48-n. on the input terminal (+). The error amplifiers 48-1 to 48-n compare the input current of the target value with the actual input current detected by the input current detection circuits 46-1 to 46-n, obtain the error, and supply it to the drive circuit 47-1. ~47-n. The drive circuits 47-1 to 47-n variably control the variable resistors 43-1 to 43-n so that the actual input current approaches the input current of the target value.

In addition, in this device, the reference potentials of the drive circuits 47-1 to 47-n and the error amplifiers 48-1 to 48-n are the charging voltages of the respective capacitors 44-1 to 44-n, and the capacitor voltage detection circuit 49 -1 to 49-n and the reference potentials of the error amplifiers 50-1 to 50-n are the potentials of the negative terminals of the output terminals of the full-wave rectifier 42 which are the reference potentials of the entire circuit. Therefore, in order to match the reference potentials using the level shift circuits 53-1 to 53-n, it is necessary to shift each capacitor.

The charging voltages of the respective capacitors 44-1 to 44-n are supplied to the polarity inversion circuit 13 through diodes 54-1 to 54-n and switches 12-1 to 12-n, respectively.

The capacitor voltages detected by the respective capacitor voltage detection circuits 49 - 1 to 49 - n are supplied to the capacitor voltage comparison circuit 55 . The clock signal from the clock generator 23 is input to the capacitor voltage comparison circuit 55 described above. The capacitor voltage comparison circuit 55 calculates the average value of the capacitor voltages detected by the capacitor voltage detection circuits 49-1 to 49-n synchronously with the clock signal, and compares the calculated average value with the preset charging voltage target value of each capacitor. compared to the mean. At the non-inverting input terminal (+) of the error amplifier 19, a variable voltage VRref having a rated value corresponding to the effective value of the lamp current is supplied.

The capacitor voltage comparison circuit 55 variably controls the voltage VRref according to the comparison result. That is, when the average value of the detected capacitor voltage is larger than the average value of the charging voltage target value, the voltage VRref which is the target value of the effective value of the lamp current is lowered. When the average value of the detected capacitor voltage is smaller than the average value of the charging voltage target value, the voltage VRref which is the target value of the effective value of the lamp current is increased.

In this configuration, when the charging voltage of each capacitor 44-1 to 44-n becomes higher as a whole, control is performed to reduce the effective value of the lamp current, and conversely, the charging voltage of each capacitor 44-1 to 44-n becomes lower as a whole. , the control of increasing the effective value of the lamp current is carried out.

At the same time, through input current detection circuits 46-1~46-n, drive circuits 47-1~47-n, capacitor voltage detection circuits 49-1~49-n, error amplifiers 48-1~48-n, 50-1 ~50-n, input current target value setting circuit 52, multipliers 51-1~51-n, etc. control the capacitor voltage so that the charging voltage is close to the target value, and the target value of the lamp current converges to the rated value as the original target value . Thereby, the lamp current is prevented from excessively increasing or excessively decreasing in response to changes in the capacitor voltage. Realize the improvement of power factor. In the present embodiment, the discharge lamp 15 is controlled so that the lamp current becomes constant without using a winding member, so that the size and weight of the device can be realized as in the above-mentioned embodiments.

17th embodiment

The structure of this embodiment is shown in FIG. 24 . In this embodiment, the variable range of the effective value of the output voltage is within the range of ±20% of the effective value at the rated time.

That is, the stepwise voltage waveform is supplied to the polarity reversing circuit 13 by the switching operation of one of the switches 12-1 to 12-n, and the AC stepwise voltage waveform is supplied from the polarity reversing circuit 13 to the discharge lamp 15 so that Discharge lamp 15 illuminates.

The amplitude of the sine wave data of the input current as the target value from the input current target value setting circuit 52 is variably controlled by the output from the error amplifiers 50-1 to 50-n for each of the multipliers 51-1 to 51-n. In this way, the impedances of the variable resistors 43-1 to 43-n are controlled based on the difference between the actual capacitor voltage and the target value, and the amount of input current to the capacitors 46-1 to 46-n is controlled to control the charging voltage close to the target. value.

In the output section, the ON operation time of the switches 12-1 to 12-n is controlled so that the effective value of the lamp current flowing through the discharge lamp 15 becomes a rated value set by the voltage VRref.

Accordingly, corresponding switches among the switches 12-1 to 12-n are controlled such that the amount of charge discharged to the discharge lamp 15 by the capacitor that is turned on for a time shorter than the rated time is reduced, thereby increasing the charging voltage of the capacitor. At this time, the control is such that the amplitude of the sine wave data which is the target value of the input current from the multiplier is reduced by the capacitor constant voltage control, and the capacitor voltage is lowered so that the charging voltage of the capacitor approaches the target value.

Corresponding ones of the switches 12-1 to 12-n are controlled such that the amount of charge discharged to the discharge lamp 15 from the capacitor that is turned on longer than the rated time increases, and thus the charging voltage of the capacitor decreases. At this time, the control is such that the amplitude of the sine wave data which is the target value of the input current from the multiplier is increased by the capacitor constant voltage control, and the capacitor voltage is increased so that the charging voltage of the capacitor approaches the target value.

As a result, even if the waveform of the input current target value of each capacitor 46-1 to 46-n is set as a sine wave, the setting of the amplitude is different for each capacitor, and a level appears in the input current, and high-frequency components become large. . Therefore, in order not to increase and degrade the high-frequency component of the input current, it is necessary to define the effective value range of the stepped voltage waveform supplied to the discharge lamp 15 .

25 shows sine wave waveforms for comparison with the stepped voltage waveforms supplied to the discharge lamp 15, (a) showing the stepped voltage waveforms when the effective value of the lamp current is -24% of the rated effective value and Sine wave waveform, (b) indicates the stepped voltage waveform and sine wave waveform when the RMS value of the lamp current is -11% of the rated RMS value, (c) indicates that the RMS value of the lamp current is consistent with the rated RMS value When the ladder-like voltage waveform and sine wave waveform, (d) indicates the ladder-like voltage waveform and sine wave waveform when the effective value of the lamp current is +10% of the rated effective value, (e) indicates the effective value of the lamp current Step voltage waveform and sine wave waveform at +19% of rated effective value.

The input current waveform when the effective value of the lamp current is -24% of the rated effective value is shown in Figure 26(a), and the input current waveform when the effective value of the lamp current is -11% of the rated effective value is shown in Figure 26 As shown in (b), the input current waveform when the effective value of the lamp current is consistent with the rated value is shown in Figure 26(c), and the input current waveform when the effective value of the lamp current is +10% of the rated value As shown in Fig. 26(d), the input current waveform when the lamp current effective value is -19% of the rated effective value is shown in Fig. 26(e).

Table 1 shows the relationship between the change of the effective value of the stepped voltage and the input current. When the effective value of the step-shaped voltage is outside the rating, it is obvious that the third-order high-frequency component of the input current becomes large. It can be seen from the results that by setting the variation range of the effective value of the step-shaped voltage waveform below the absolute value of about 20% of the effective value of the step-shaped voltage waveform during rated operation, the high-frequency component of the input current will not be increased to change Difference.

Table 1 Output voltage change points -22.0% -10.9% 0.0% 9.8% 18.5% human current 0.219A 0.232A 0.278A 0.333A 0.407A Manpower rate 0.919 0.954 1.000 0.987 0.969 THD 40.6% 33.0% 0.0% 20.5% 33.1% 3 times 30.5% 22.4% 0.0% 12.5% 22.6% 5 times 1.1% 3.1% 0.0% 4.9% 3.3% 7 times 2.0% 1.0% 0.0% 4.0% 2.5% 9 times 3.6% 2.3% 0.0% 1.1% 2.0% 11 times 1.2% 0.4% 0.0% 1.3% 0.7% 13 times 3.3% 2.5% 0.0% 0.5% 0.7% 15 times 2.8% 2.4% 0.0% 0.5% 0.6% 17 times 1.0% 1.2% 0.0% 1.3% 0.7% 19 times 0.5% 0.3% 0.0% 0.4% 0.4% 21 times 2.0% 1.0% 0.0% 1.7% 2.0% 23 times 0.9% 1.2% 0.0% 1.5% 1.3% 25 times 3.9% 3.1% 0.0% 1.0% 2.1% 27 times 0.8% 0.6% 0.0% 1.3% 1.9% 29 times 2.0% 1.3% 0.0% 0.8% 1.2%

Output voltage variation

Input Current

input power factor

(Other parts of the table are the same as the original table 1)

The structure of this embodiment is shown in FIG. 24. Therefore, it goes without saying that in this embodiment, the discharge lamp 15 is controlled so that the current of the discharge lamp becomes constant without using a winding member. Therefore, the same effect.

Eighteenth embodiment

The parts that are the same as those in the eleventh to seventeenth embodiments described above are denoted by the same symbols, and detailed description thereof will be omitted.

As shown in FIG. 27 , the voltages of the respective capacitors 44 - 1 to 44 - n are detected by a capacitor voltage average value detection circuit 56 , and the average value thereof is obtained as a representative value. Not limited to the average value as the representative value, one of the voltages among the capacitors 44 - 1 to 44 - n may be detected as the representative value. In this case, if a high capacitor voltage is detected based on the charging target value, the impedance control of each of the variable resistors 43-1 to 43-n can be reliably performed, and the input current can always flow smoothly and continuously.

The average value of the capacitor voltage obtained by the capacitor voltage average detection circuit 56 is supplied to the inverting input terminal (−) of the error amplifier 57 and simultaneously supplied to the capacitor voltage comparison circuit 58 .

The reference voltage Vref for setting the average value of the charging voltage target value is supplied to the non-inverting input terminal (+) of the above-mentioned error amplifier 57 . The error amplifier 57 compares the average value of the capacitor voltage obtained by the capacitor voltage average detection circuit 56 with the reference voltage Vref for setting the charging voltage target value, and supplies the error output to the input current target waveform shaping circuit 59 .

The above input current target waveform shaping circuit 59 forms a sine wave input voltage waveform similar to that shown in FIG. Display the sine wave input current waveform as the input current target waveform and output it.

The above-mentioned input current target waveform shaping circuit 59 is made: when the effective value of the stepped voltage waveform is higher than the rated value, as shown in FIG. , the amplitude is larger than the input current waveform I0 as the target value, and the amplitude is relatively large toward 90° and 270°, and in other parts, a current waveform with an amplitude smaller than the input current waveform I0 is formed as the input current target waveform I1 output.

The above-mentioned input current target waveform shaping circuit 59 is made: when the effective value of the stepped voltage waveform is lower than the rated value, as shown in FIG. , the amplitude is smaller than the input current waveform I0 as the target value, and the amplitude is relatively small toward 90° and 270°, and in other parts, a current waveform with a larger amplitude than the input current waveform I0 is output as the input current target waveform I2 .

The clock signal from the clock generator 23 is input to the capacitor voltage comparison circuit 58 . The capacitor voltage comparison circuit 58 compares the average value of the capacitor voltage obtained by the capacitor voltage average detection circuit 56 with the average value of the charging voltage target value of each capacitor set in advance in synchronization with a clock signal. The capacitor voltage comparison circuit 58 variably controls the voltage Vrref based on the comparison result.

In this configuration, when the effective value of the stepped voltage waveform supplied to the discharge lamp 15 rises from the rated value, the switching of the capacitor for supplying the low charging voltage to the discharge lamp 15 is controlled so as to be performed in a time shorter than the rated time. In the ON operation, the amount of electric charge discharged from the capacitor to the discharge lamp 15 decreases, so the capacitor voltage increases.

The switch for supplying the capacitor with a high charging voltage to the discharge lamp 15 is controlled so that it is turned on for a longer time than the rated time, and the discharge charge amount from the capacitor to the discharge lamp 15 increases, so that the capacitor voltage drops.

Therefore, as the target waveform of the input current from the full-wave rectifier 42, in one cycle of commercial AC, the waveform is shaped by the input current target waveform shaping circuit 59 so that the amplitude ratio is sinusoidal before and after the phase is 90° and 270°. The input current waveform I0 of the wave is large, and the amplitude is small in other parts. Therefore, the control according to the representative value of the capacitor voltage can make the charging voltage of each capacitor close to the corresponding target value voltage, and at the same time, the input current waveform can be smoothed.

When the effective value of the stepped voltage waveform supplied to the discharge lamp 15 decreases from the rated value, the switch for supplying the capacitor with a low charging voltage to the discharge lamp 15 is controlled so that it is turned on for a time longer than the rated value, and the capacitor is turned on. The discharge charge amount of the discharge lamp 15 increases, and therefore, the capacitor voltage thereof decreases.

The switch for supplying the capacitor with a high charging voltage to the discharge lamp 15 is controlled so that it is turned on for a shorter time than the rated time, and the amount of discharged charge from the capacitor to the discharge lamp 15 decreases, so that the capacitor voltage increases.

Therefore, as the target waveform of the input current from the full-wave rectifier 42, in one cycle of commercial AC, the waveform is shaped by the input current target waveform shaping circuit 59 so that the amplitude ratio is sinusoidal before and after the phase is 90° and 270°. The input current waveform I0 of the wave is small, and the amplitude is large in other parts. Therefore, by controlling according to the representative value of the capacitor voltage, the charging voltage of each capacitor can be made close to the corresponding target value voltage, and at the same time, the input current waveform can be smoothed. .

In this way, the target input current waveforms supplied from the input current target waveform shaping circuit 59 to the error amplifiers 48-1 to 48-n are changed according to the change in the effective value of the stepped voltage waveform supplied to the discharge lamp 15. The control of the representative value of the voltage can make the charging voltage of each capacitor close to the corresponding target value voltage, and at the same time, the input current waveform from the full-wave rectifier 42 always changes smoothly without changing sharply. Therefore, it is possible to suppress the occurrence of the input current waveform, especially the high-order high-frequency component. In the present embodiment, it goes without saying that the discharge lamp 15 is controlled so that the discharge lamp current becomes constant without using a winding member, and therefore the same effects as those of the above-described embodiment can be obtained.

Next, for the third present invention, the nineteenth to twenty-fifth embodiments will be described with reference to FIGS. 31 to 47. FIG. The symbols in the description of the nineteenth to twenty-fifth embodiments and in FIGS. 31 to 47 are applicable to the nineteenth to twenty-fifth embodiments.

Nineteenth embodiment

As shown in Figure 31, set the AC ladder-shaped voltage generator 1, the voltage value changes in a ladder shape, and the stepped positive voltage waveform and voltage value change like a sine wave increase and decrease in a step shape, and the alternating output increases and decreases like a sine wave The stepped negative voltage waveform.

One end of each filament electrode 2a, 2b of the discharge lamp 2 is connected to the output terminal of the above-mentioned voltage generating source 1 through a lamp current detector 4 composed of a first capacitor 3 and a low resistance. That is, one end of one filament electrode 2a of the discharge lamp 2 is connected to one end of the output terminal of the voltage generating source 1 by connecting the first capacitor 3 in series, and the other end of the discharge lamp 2 is connected by connecting the lamp current detector 4 in series. One end of one filament electrode 2b is connected to the other end of the output terminal of the voltage generating source 1 described above.

Between the other ends of the respective filament electrodes 2a, 2b of the discharge lamp 2, a series circuit of a second capacitor 5 and a bipolar switching element 6 composed of a MOSFET (MOS Field Effect Transistor) is connected. This series circuit constitutes a preheating circuit, and when the discharge lamp 2 starts preheating before lighting, the switching element 6 is turned on.

The above-mentioned AC ladder-shaped voltage generating source 1 connects the input terminal of the full-wave rectifier 12 to the commercial AC power supply 11, and uses n switches 13-1, 13-2 ... 13-3 and A series circuit of n capacitors 14 - 1 , 14 - 2 . Thus, the lamp current detector 16 is connected to the respective capacitors 14-1 to 14-n through the switching elements 15-1, 15-2...15-n, respectively.

The above-mentioned lamp current detector 16 is formed by a series circuit of two switching elements 16-1, 16-2 composed of FETs and a parallel circuit of a series circuit of two switching elements 16-3, 16-4 composed of MOSFETs. The connection points of the elements 16-1, 16-2 and the connection points of the switching elements 16-3, 16-4 serve as output terminals of the AC step voltage generator 1 described above.

The switching elements 13-1 to 13-n used as the above-mentioned variable resistors are driven in a non-saturated region to function as variable resistors, and therefore, are controlled to charge only the respective corresponding capacitors 14-1 to 14 In the -n period, the impedance becomes a finite value, and in other periods, the impedance becomes infinite. In this way, the impedances of the switching elements 13-1 to 13-n when charging the capacitors 14-1 to 14-n are controlled so that an input current having a waveform substantially proportional to the commercial AC input voltage flows from the full-wave rectifier. Thus, high-frequency components of the input current can be suppressed.

During the rise of the absolute value of the power supply voltage of the commercial AC power supply 11, the charging of a certain capacitor starts when the absolute value of the commercial AC power supply voltage is equal to the voltage of the capacitor, and the voltage of the next stage capacitor is equal to the absolute value of the commercial AC power supply voltage. When the absolute value of the power supply voltage of the commercial AC power supply 11 drops, the charging of a certain capacitor starts when the voltage of the previous capacitor is equal to the absolute value of the commercial AC power supply voltage. Stop when the absolute values are equal. Accordingly, the respective capacitors 14-1 to 14-n are charged with voltage values different from each other. For example, capacitor 14-1 is charged to a minimum voltage value, and capacitor 14-n is charged to a maximum voltage value.

The above-mentioned switching elements 15-1~15-n are repeatedly switched one by one at high frequency by the drive circuit 17, and the charging voltage is sequentially taken out from the above-mentioned capacitors 14-1~14-n, and the taken-out step The shape voltage waveform is supplied to the above-mentioned lamp current detector 16.

The above-mentioned lamp current detector 16 realizes: in each repeated switching cycle of each of the above-mentioned switching elements 15-1 to 15-n, alternately repeat the turning on of the switching elements 16-1, 16-4 and the switching of the switches 16-2, 16-2, When 16-3 is turned on, the first capacitor 3 supplies the discharge lamp 2 with an AC stepped voltage waveform including zero voltage value at a high frequency such as tens of KHz.

The above-mentioned lamp current detector 4 detects the lamp current, and supplies the detected signal to the effective value converter 18 . The effective value converter 18 converts the detection signal from the lamp current detector 4 into a voltage according to the effective value of the lamp current, and the effective value voltage is supplied to an inverting input terminal (−) of the error amplifier 19 . A voltage Vref corresponding to a rated value of the effective value of the lamp current is supplied to the non-inverting input terminal (+) of the above-mentioned error amplifier 19 .

The error amplifier 19 compares the effective value voltage from the effective value converter 18 with the voltage Vref equivalent to the rated value, and outputs a feedback signal for bringing the effective value voltage closer to the voltage Vref equivalent to the rated value. A feedback signal from the above-mentioned error amplifier 19 is supplied to the on/off timing control section 21 of the controller 20 .

With the feedback signal from the error amplifier 19, the ON/OFF control unit 21 determines the timing when the driving circuit 17 turns on and off the respective switching elements 15-1 to 15-n and supplies the timing signal to the same controller 20 to generate the driving signal. Section 22.

The drive signal generation unit 22 takes out a clock signal from the clock generation unit 23 and supplies a drive signal at a timing determined by the on/off timing control unit 21 to the drive circuit 17 in synchronization with the clock signal. As a result, the drive circuit 17 selectively turns on/off each of the switching elements 15-1 to 15-n at a predetermined timing so that the effective value of the lamp current approaches the voltage Vref corresponding to the rated value. Thus, the frequency of the stepped voltage waveform including zero voltage value supplied from the lamp current detector 16 to the discharge lamp 2 via the first capacitor 3 is fixed by the clock signal from the clock generator 23 .

In this configuration, each switching element 13-1 to 13-n corresponds to the output voltage waveform from the full-wave rectifier 12 and the absolute value of the power supply voltage rises according to 13-1—>13-2—>…13- In the order of n, the impedance becomes a limited value only in a certain period of time, and the corresponding capacitors 14-1 to 14-n are charged in sequence, and during the period when the absolute value of the power supply voltage drops, according to 13-n...—>13-2—>13 In the order of -1, the impedance becomes a finite value only for a certain period of time, and the corresponding capacitors 14-1 to 14-n are sequentially charged. In this way, the respective capacitors 14-1 to 14-n are charged to different voltage values.

On the other hand, the switching elements 15-1 to 15-n are sequentially switched by the driving circuit 17, and the AC stepped voltage waveform including zero voltage value from the lamp current detector 16 is supplied to the discharge lamp 2 through the first capacitor 3. During preheating of the discharge lamp 2 , the switching element 6 conducts and a preheating current flows through the respective filament electrodes 2 a , 2 b via the second capacitor 5 .

Therefore, the AC stepped voltage waveform from the lamp current detector 16 is supplied to the discharge lamp 2 through the first capacitor 3 . On the other hand, when controlling the effective value of the AC stepped voltage waveform by changing the time width of each voltage of the stepped voltage waveform, it is necessary to specify the control range of the effective value according to the constraints of the high-frequency component of the input current.

When the AC stepped voltage waveform from the lamp current detector 16 is directly supplied to the discharge lamp 2 without using the first capacitor 3, the control range of the effective value is ±20%, and the load characteristics at this time are shown in FIG. 32 . It can be seen from the load characteristics that for the load voltage exceeding ±20% of the rated voltage, there is no operating point, so it cannot operate.

On the other hand, when the first capacitor 3 is used, the load characteristics under the condition that the effective value of the AC stepped voltage waveform is constant are shown in FIG. 33 . Therefore, when the time width of each voltage of the stepped voltage waveform is changed to control the effective value of the AC stepped voltage waveform, the load characteristic is as shown in FIG. 34 . That is, the discharge lamp 2 has operating points in a wide range from disconnection (load current is zero) to short circuit (load voltage is zero), and the range of applicable lamp voltage can be expanded. Furthermore, the load current flowing when the discharge lamp 2 is short-circuited can be suppressed, and an excessive current can be prevented from flowing.

20th embodiment

The parts that are the same as those in the nineteenth embodiment described above are denoted by the same symbols, and detailed descriptions of these parts are omitted.

As shown in FIG. 35, an AC stepped voltage generator 31 that does not use a full-wave rectifier or a polarity inversion circuit is used. That is, the above-mentioned AC stepped voltage generating source 31 is composed of n switching elements 32-1, 32-2 ... 32-n serving as variable resistors constituted by MOSFETs and n capacitors 34-1 constituting the first DC voltage source. , 34-2 ... 34-n series circuits are respectively connected to the commercial AC power supply 11 in parallel as branches. A series connection of n switching elements 33-1, 33-2...33-n made of MOSFETs serving as variable resistors and n capacitors 35-1, 35-2...35-n making up the second DC voltage source The circuits are respectively connected in parallel to the commercial AC power supply 11 as branches.

The switching elements 32-1 to 32-n used as the above-mentioned variable resistors are driven in the non-saturation region to realize the function as the variable resistors, so it is controlled to charge only the respective corresponding capacitors 34-1 to 34-n. During the n period, the impedance becomes a finite value, and in other periods, the impedance becomes infinite. In this manner, the switching elements 32-1 to 32-n control the impedance when charging the capacitors 34-1 to 34-n so that an input current having a waveform approximately proportional to the positive half cycle of the commercial AC input voltage flows.

The switching elements 33-1 to 33-n used as the above-mentioned variable resistors are driven in the non-saturation region to realize the function as the variable resistors, so it is controlled to charge only the respective corresponding capacitors 35-1 to 35-n. During the n period, the impedance becomes a finite value, and in other periods, the impedance becomes infinite. In this manner, the switching elements 33-1 to 33-n control the impedance when charging the capacitors 35-1 to 35-n so that an input current having a waveform approximately proportional to the negative half cycle of the commercial AC input voltage flows.

During the rise of the absolute value of the power supply voltage of the commercial AC power supply 11, the charging of the capacitor is started when the voltage of a certain capacitor is equal to the absolute value of the commercial AC power supply voltage, and the voltage of the next stage capacitor is equal to the absolute value of the commercial AC power supply voltage. When the absolute value of the power supply voltage of the commercial AC power supply 11 drops, the charging of a certain capacitor starts when the voltage of the previous capacitor is equal to the absolute value of the commercial AC power supply voltage. When the charging voltage is equal to the absolute value of the commercial AC power supply voltage Stop when equal.

Accordingly, the respective capacitors 34-1 to 34-n are charged with different positive voltage values, and the respective capacitors 35-1 to 35-n are charged with different negative voltage values. For example, during a positive half cycle, capacitor 34-1 is charged to a minimum voltage value in the positive direction, capacitor 34-n is charged to a maximum voltage value in the positive direction, and capacitor 35-n is charged to a maximum voltage value in the negative direction during a negative half cycle. 1 is charged to a minimum voltage value, and the capacitor 35-n is charged to a maximum voltage value in the negative direction.

One end of the switching elements 36-1, 36-2...36-n made of FETs is respectively connected to the positive side of the capacitors 34-1 to 34-n, and the switching elements 37-1, 37-2...37 made of MOSFETs One end of -n is connected to the negative side of the above-mentioned capacitors 35-1 to 35-n, respectively. The other ends of the switching elements 36 - 1 to 36 - n and 37 - 1 to 37 - n are connected to one end of the other filament electrode 2 a of the discharge lamp 2 through the first capacitor 3 connected in series. One end of the other filament electrode 2b in the discharge lamp 2 is connected to the negative side and the negative electrode side of each of the capacitors 34-1 to 34-n, which are the other ends of the output terminals of the voltage generating source 31, respectively, through the series-connected lamp current detector 4. The positive side of the above-mentioned capacitors 35-1 to 35-n.

The drive signal generation unit 22 obtains a clock signal from the clock generation unit 23, and supplies the drive signal at the timing determined by the on/off timing control unit 21 to the drive circuit 171 in synchronization with the clock signal, and the drive circuit 171 sequentially selects the clock signal at a predetermined timing. Switching elements 36-1 to 36-n and 37-1 to 37-n are turned on at one time so that the effective value of the lamp circuit approaches the voltage Vref corresponding to the rated value. In this way, the frequency of the stepped voltage waveform including zero voltage value supplied from the AC stepped voltage generator 31 to the discharge lamp 2 is fixed by the first capacitor 3 based on the clock signal from the clock generator 23 . In addition, other configurations are the same as the above-mentioned embodiment.

In this configuration, in the positive half cycle of the AC power supply 11, the impedances of the switching elements 32-1 to 32-n sequentially become finite values, and the capacitors 34-1 to 34-n are charged differently from each other. value of positive voltage. In the negative half cycle of the AC power supply 11, the impedances of the switching elements 33-1 to 33-n sequentially become finite, and positive voltages of different values are charged to the capacitors 35-1 to 35-n.

On the other hand, on the output side, each of the switching elements 36-1 to 36-n, 37-1 to 37-n sequentially performs switching operations one at a time shorter than that on the input side, and repeats this operation. As a result, an AC stepped voltage whose voltage value changes stepwise is supplied to the discharge lamp 2 from each of the switching elements 36-1 to 36-n and 37-1 to 37-n via the first capacitor 3 . In this way, during preheating, the switching element 6 is turned on, and a preheating current flows through the second capacitor 5 to each of the filament electrodes 2 a and 2 b.

Therefore, in this embodiment, when the time width of each voltage of the variable stepped voltage waveform is controlled to control the effective value of the AC stepped voltage waveform, the load characteristic is when the discharge lamp 2 is from open circuit (load current is zero) to short circuit ( There are operating points in a wide range where the load voltage is zero), and the range of applicable lamp voltages can be expanded. Furthermore, the load current flowing when the discharge lamp 2 is short-circuited can be suppressed, and an excessive current can be prevented from flowing.

21st embodiment

The circuit configuration of the discharge lamp lighting device used in this embodiment is the same as that of the nineteenth embodiment described above. That is, the configuration is as shown in FIG. 31 .

In this embodiment, the capacitances of the capacitors 14-1 to 14-n constituting the DC voltage source are equal. In addition, assuming that the average value of the time width of each voltage of the AC stepped voltage waveform supplied from the AC stepped voltage generator 1 to the discharge lamp 2 through the first capacitor 3 is ts, the capacitance of the first capacitor 3 and the rated lighting time When the time constant determined by the equivalent resistance of the discharge lamp 2 is CR, the capacitance of the first capacitor 3 and the time width of each voltage of the AC stepped voltage waveform are set so that CR/ts>1 is satisfied.

However, in the configuration in which the AC stepped voltage waveform is supplied to the discharge lamp 2 through the first capacitor 3, there is a problem that the waveform factor (crest factor) of the lamp current during rated operation deteriorates. The form factor is obtained from (maximum value/rms value). When the form factor of the lamp current deteriorates, the luminous efficiency of the lamp decreases, the damage of the filament increases, and the life of the lamp becomes shorter.

For example, as the discharge lamp 2, a discharge lamp with a rated voltage of 125V and a rated current of 0.255A is used, and the frequency of the AC stepped voltage waveform supplied to the discharge lamp 2 is 20KHz, and the effective value of the AC stepped voltage is adjusted so as to obtain a rated output. The capacitance of the first capacitor 3 was changed to 0.02 μF, 0.015 μF, 0.01 μF, and 0.005 μF, and the relationship between CR/ts and the crest factor was studied. The obtained relationship is shown in FIG. 36 .

In the figure, the curve drawn by □ is when the capacitance of the first capacitor 3 is 0.02 μF, the curve drawn by △ is when the capacitance of the first capacitor 3 is 0.015 μF, and the curve drawn by × is the capacitance of the first capacitor 3 When the capacitance is 0.01 μF, the curve drawn with ○ is when the capacitance of the first capacitor 3 is 0.005 μF.

It can be seen from the curve that when CR/ts>1 is set, the form factor can be less than 2.1, and when CR/ts>2.5 is set, the form factor can be less than 1.7. That is, by setting CR/ts>1, the form factor of the lamp current can be relatively good, and by setting CR/ts>2.5, the form factor of the lamp current can be further improved. Thereby, the luminous efficiency of a lamp can be prevented from being reduced, and the lifetime of a lamp can be prevented from being shortened.

Fig. 37 shows that the step number (step number) in the half cycle of the AC step-like voltage waveform supplied to the discharge lamp 2 under the above conditions is 5 steps, which occurs between the AC step-like voltage waveform and the both ends of the discharge lamp 2. voltage waveform. The lighting frequency is 20kHz, so the lamp voltage waveform and the lamp current waveform are roughly similar. Therefore, the form factor of the lamp voltage is identical to the form factor of the lamp current. Therefore, the form factor of the lamp voltage is considered here.

That is, (a) is an AC stepped voltage waveform, (b) is a voltage waveform generated between both ends of the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.1 μF, and (c) is that the capacitance of the first capacitor 3 is 0.02 μF. The voltage waveform generated between the two ends of the discharge lamp 2 at the time of μF, (d) is the voltage waveform generated between the two ends of the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.015 μF, and (e) is the capacitance of the first capacitor 3 (f) is a voltage waveform generated across the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.005 μF. At this time, there is a difference in the form factor of the lamp current between (e) and (f).

Fig. 38 shows that the step number (step number) in the half cycle of the AC step-like voltage waveform supplied to the discharge lamp 2 under the above conditions is 11 steps, which occurs between the AC step-like voltage waveform and both ends of the discharge lamp 2. voltage waveform. That is, (a) is an AC stepped voltage waveform, (b) is a voltage waveform generated between both ends of the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.1 μF, and (c) is that the capacitance of the first capacitor 3 is 0.02 μF. The voltage waveform generated between the two ends of the discharge lamp 2 at the time of μF, (d) is the voltage waveform generated between the two ends of the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.015 μF, and (e) is the capacitance of the first capacitor 3 (f) is a voltage waveform generated across the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.005 μF.

Fig. 39 shows the occurrence between the AC stepped voltage waveform and both ends of the discharge lamp 2 when the number of steps (the number of steps) in the half cycle of the AC stepped voltage waveform supplied to the discharge lamp 2 is 21 steps under the above conditions. voltage waveform. That is, (a) is an AC stepped voltage waveform, (b) is a voltage waveform generated between both ends of the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.1 μF, and (c) is that the capacitance of the first capacitor 3 is 0.02 μF. The voltage waveform generated between the two ends of the discharge lamp 2 at the time of μF, (d) is the voltage waveform generated between the two ends of the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.015 μF, and (e) is the capacitance of the first capacitor 3 (f) is a voltage waveform generated across the discharge lamp 2 when the capacitance of the first capacitor 3 is 0.005 μF.

From the above results, it can be seen that the average value ts of the time width of each voltage of the AC stepped voltage waveform can be reduced by increasing the number of steps in the half cycle of the AC stepped voltage waveform. Therefore, even if the time constant CR becomes smaller, the CR can be satisfied. /ts > 1. In other words, in order to keep the form factor of the lamp current good for various capacitance values of the first capacitor 3, it is only necessary to increase the number of steps in the half cycle of the AC stepped voltage waveform. By appropriately setting the capacitance of the capacitor 3 according to the number of steps in the half cycle of the AC stepped voltage waveform, the form factor of the lamp current can be kept good.

The circuit configuration of the discharge lamp illuminating device used in this embodiment is the same as that shown in FIG. 31. Therefore, this embodiment can naturally obtain the same effects as those of the nineteenth to twentieth embodiments described above.

22nd embodiment

The parts that are the same as those in the nineteenth to twenty-second embodiments described above are denoted by the same symbols, and detailed descriptions of these parts are omitted. As shown in FIG. 40, one end of each filament electrode 2a, 2b of the discharge lamp 2 is connected to an output terminal of an AC stepped voltage generator 41 via a first capacitor 3. As shown in FIG.

The above-mentioned AC stepped voltage generating source 41 is provided with a plurality of DC voltage sources 42-1, 42-2...42-n that generate different positive voltage values, and the input terminals of the polarity inversion circuit 16 can respectively control the two poles as switching elements. The bipolar switches 43-1, 43-2...43-n for disconnecting and conducting the polar current are connected to the DC voltage sources 42-1~42-n. The above-mentioned bipolar switches 43-1 to 43-n are commonly connected to source terminals and gate terminals of two MOSFETs. In this embodiment, the circuit for controlling the effective value voltage of the AC stepped voltage waveform to a rated value and the drive circuits for the bipolar switches 43-1, 43-2...43-n are omitted.

In this configuration, the AC stepped voltage generator 41 supplies the discharge lamp 2 with the AC stepped voltage waveform from the polarity inverting circuit 16 through the first capacitor 3. FIG. 41 shows an example of an AC step-like voltage waveform and a load current waveform flowing through the discharge lamp 2 at this time. That is, in this example, the AC stepped voltage waveform Vo and the load current waveform Io are out of phase by approximately 90° due to the first capacitor 3 .

Therefore, for example, when the switching elements 16-1 and 16-4 of the polarity reversing circuit 16 are turned on and a positive voltage is applied to the filament electrode 2a side of the discharge lamp 2, the lamp current initially takes the form of switching element 16-1->first The path of capacitor 3->discharge lamp 2->switching element 16-4 flows, but reverses on the way, taking the path of switching element 16-4->discharge lamp 2->first capacitor 3->switching element 16-1 flow. At this time, since the bipolar switches 43-1 to 43-n are used, current flows into the DC voltage sources 42-1 to 42-n side through the bipolar switches 43-1 to 43-n.

Accordingly, the lamp current can be efficiently passed through the discharge lamp 2 without waste, and the luminous efficiency of the lamp can be improved.

On the contrary, when the bipolar switches 43-1 to 43-n are unipolar switches, the current in the opposite direction does not flow and the electric lamp current is cut off. Therefore, in the case of obtaining a constant light output, the luminous efficiency of the electric lamp decline.

In this embodiment, since the AC stepped voltage is supplied from the AC stepped voltage generating source 41 to the discharge lamp 2 through the first capacitor 3, as in the above-mentioned embodiment, the discharge lamp 2 is turned off (the load current is zero) to There are operating points in a wide range of short circuit (load voltage is zero), and the range of applicable lamp voltage can be expanded. Furthermore, the load current flowing when the discharge lamp 2 is short-circuited can be suppressed, and an excessive current can be prevented from flowing.

In this embodiment, a structure in which source terminals and gate terminals of two MOSFETs are commonly connected is used as a bipolar switch, but this configuration is not limited to this. For example, a series circuit of a MOSFET 44 and a diode 45 as shown in FIG. 42 and a series circuit of a diode 46 and a MOSFET 47 whose polarity is opposite to that of the diode 45 are connected in parallel in parallel.

23rd embodiment

The parts that are the same as those in the nineteenth to twenty-second embodiments described above are denoted by the same symbols, and detailed descriptions of these parts are omitted. As shown in FIG. 43, one end of each filament electrode 2a, 2b of the discharge lamp 2 is connected to an output terminal of an AC stepped voltage generator 51 via a first capacitor 3. As shown in FIG.

The above-mentioned AC stepped voltage generating source 51 is provided with a plurality of first DC voltage sources 52-1, 52-2...52-n that generate different positive voltage values, and the absolute value of the generation and each first DC voltage source 52-1～52-n A plurality of second DC voltage sources 53-1, 53-2...53-n of different negative voltage values with equal voltage values of n.

As switching elements, one end of bipolar switches 54-1, 54-2...54-n that can separately control the bipolar currents to be turned off and on is connected to the above-mentioned first DC voltage sources 52-1~52-n. . One end of the bipolar switches 55-1, 55-2 ... 55-n, which can respectively control the disconnection and conduction of bipolar currents as switching elements, is connected to the above-mentioned second DC voltage sources 53-1~53-n. .

The other ends of the above-mentioned bipolar switches 54-1, 54-2 ... 54-n and the other ends of the above-mentioned bipolar switches 55-1 to 55-n are commonly connected as the output terminals of the above-mentioned AC stepped voltage generating source 51 one end. The negative terminals of the above-mentioned first DC voltage sources 52-1 to 52-n and the positive terminals of the above-mentioned second DC voltage sources 53-1 to 53-n are commonly connected as output terminals of the above-mentioned AC stepped voltage generating source 51. the other end of the

A polarity switch 56 is also connected between the output terminals of the above-mentioned AC stepped voltage generator 51 . The bipolar switch 56 short-circuits the output terminals of the AC step voltage generator 51 to obtain a zero voltage value applied to the discharge lamp 2 .

The aforementioned bipolar switches 54-1 to 54-n, 55-1 to 55-n, and 56 have a structure in which source terminals and gate terminals of two MOSFETs are commonly connected.

In this embodiment, the circuit for controlling the effective value voltage of the AC step-shaped voltage waveform to a rated value and the drive circuits for the bipolar switches 54-1 to 54-n, 55-1 to 55-n, and 56 are omitted.

In this configuration, the AC step voltage generating source 51 provides the positive half cycle AC step voltage including zero voltage value to the discharge through the first capacitor 3 through the action of the bipolar switches 54-1~54-n, 56. The lamp 2 supplies the discharge lamp 2 with a negative half-period AC stepped voltage including zero voltage value through the first capacitor 3 through the operation of the bipolar switches 55 - 1 to 55 - n and 56 . At this time, the relationship between the AC stepped voltage waveform and the load current waveform flowing into the discharge lamp 2 is the same as that of the twenty-second embodiment, as shown in FIG. 41 .

Therefore, for example, when the bipolar switches 54-1~54-n operate, the lamp current initially flows into the discharge lamp from the first DC voltage sources 52-1~52-n through the bipolar switches 54-1~54-n and the capacitor 3. 2, but reversed on the way, flowing from the side of the discharge lamp 2 to the side of the first DC voltage source through the capacitor 3 and the polarity switches 54-1~54-n. When the bipolar switches 55-1~55-n operate, the lamp current initially flows into the side of the bipolar switches 55-1~55-n from the second DC voltage source 53-1~53-n through the discharge lamp 2 and the capacitor 3, but It is reversed on the way, and flows into the second DC voltage source side from the side of the bipolar switches 55-1 to 55-n via the capacitor 3 and the discharge lamp 2.

Accordingly, the lamp current flows efficiently into the discharge lamp 2 without waste, and the luminous efficiency of the lamp can be improved. In this embodiment, since the AC stepped voltage is supplied from the AC stepped voltage generating source 51 to the discharge lamp 2 through the first capacitor 3, the discharge lamp 2 can be turned off (the load current is zero) to There are operating points in a wide range of short circuit (load voltage is zero), and the range of applicable lamp voltage can be expanded. Furthermore, the load current flowing when the discharge lamp 2 is short-circuited can be suppressed, and an excessive current can be prevented from flowing.

24th embodiment

The parts that are the same as those in the above-mentioned nineteenth to twenty-third embodiments are designated by the same symbols, and detailed descriptions of these parts are omitted. As shown in FIG. 44 , the AC stepped voltage generating source 61 connects n branches 62 - 1 , 62 - 2 . . . to the output terminal of the full-wave rectifier 12 in parallel.

Each of the aforementioned branches 62-1, 62-2... is provided with a series circuit of switching elements 13-1, 13-2... and n capacitors 14-11, 14-21... constituting a DC voltage source. In the branch circuit of the switching element 13-1 and the capacitor 14-11, (m-1) capacitors 14-12, 14-13...14-1m of the same capacity are respectively connected in parallel to the above-mentioned capacitor 14 via switching elements composed of MOSFETs. -11 on.

That is, one end of the above-mentioned capacitor 14-12 is connected to one end of the above-mentioned capacitor 14-11 through the switching element 63-11, and the other end of the above-mentioned capacitor 14-12 is connected to the other end of the above-mentioned capacitor 14-11 through the switching element 64-11. superior. One end of the above-mentioned capacitor 14-13 is connected in series to one end of the above-mentioned capacitor 14-11 through the switching elements 63-12 and 63-11, and the other end of the above-mentioned capacitor 14-13 is connected in series to the capacitor through the switching elements 64-12 and 64-11. The other end of the capacitor 14-11. Connect other capacitors similarly, and finally, one end of the above-mentioned capacitor 14-1m is connected in series to one end of the above-mentioned capacitor 14-11 through switching elements 63-1(m-1)...63-12, 63-11, and the above-mentioned capacitor 14-1m The other end of 1m is connected in series to the other end of the capacitor 14-11 via switching elements 64-1(m-1)...64-12, 64-11.

The switching element 65-11 is connected in parallel on the series circuit of the above-mentioned switching element 63-11 and the capacitor 14-12, and the switching element 65-12 is connected in parallel on the series circuit of the above-mentioned switching element 63-12 and the capacitor 14-13, to similarly The switching element is connected in the configuration, and finally the switching element 65-1 (m-1) is connected in parallel to the series circuit of the switching element 63-1 (m-1) and the capacitor 14-1m.

One end of the capacitor 14-22 is connected to one end of the capacitor 14-21 via a switching element 63-21, and the other end of the capacitor 14-22 is connected to the other end of the capacitor 14-21 via a switching element 64-21. One end of the above-mentioned capacitor 14-23 is connected in series to one end of the above-mentioned capacitor 14-21 through the switch elements 63-22 and 63-21, and the other end of the above-mentioned capacitor 14-23 is connected in series to the capacitor through the switch elements 64-22 and 64-21. The other end of the capacitor 14-21. Connect other capacitors similarly, and finally, one end of the above-mentioned capacitor 14-2m is connected in series to one end of the above-mentioned capacitor 14-21 through the switching elements 63-2(m-1)...63-22, 63-21, and the above-mentioned capacitor 14-2m is connected in series. The other end of 2m is connected in series to the other end of the capacitor 14-21 via switching elements 64-2(m-1)...64-22, 64-21.

On the series circuit of the above-mentioned switching element 63-21 and the capacitor 14-22, the switching element 65-21 is connected in parallel, and on the series circuit of the above-mentioned switching element 63-22 and the capacitor 14-23, the switching element 65-22 is connected in parallel, to similarly The switching element is connected in the configuration, and finally the switching element 65-2 (m-1) is connected in parallel to the series circuit of the switching element 63-2 (m-1) and the capacitor 14-2m.

In this way, all the remaining branches also constitute the same circuit as the above-mentioned two branches 62-1, 62-2 by a plurality of switching elements and capacitors.

The connection points of final capacitors 14-1m, 14-2m... and switching elements 63-1(m-1), 63-2(m-1) of each branch are respectively connected via switching elements 66-1, 66-2... To the connection point of the switching elements 16 - 1 and 16 - 3 of the polarity inversion circuit 16 . The connection point of the switching elements 16-2 and 16-4 of the above-mentioned polarity reversing circuit 16 is connected to the other end of each of the above-mentioned capacitors 14-11, 14-21....

When the AC stepped voltage generating source 61 of this structure is charging, in the branch 62-1, the impedance of the switching element 13-1 is controlled to a finite value, so that the switching elements 63-11～63-1 (m-1 ), 64-11 to 64-1 (m-1) perform the opening operation, and the switching elements 65-11 to 65-1 (m-1) perform the closing operation. Accordingly, all the capacitors 14-11 to 14-1m of the branch 62-1 are connected in parallel, and the output voltage of the full-wave rectifier 12 is charged to a predetermined level.

In the next branch 62-2, the impedance of the switching element 13-2 is controlled to a finite value, so that the switching elements 63-21~63-2(m-1), 64-21~64-2(m-1) The ON operation is performed, and the switching elements 65-21 to 65-2(m-1) are subjected to the OFF operation. Thus, all the capacitors 14-21 to 14-2m of the branch 62-2 are connected in parallel, and the output voltage of the full-wave rectifier 12 is charged to a predetermined level slightly higher than that of the capacitors 14-11 to 14-1m. .

In this way, all the capacitors of the n-level branches are charged to different voltage values for each branch by the output voltage of the full-wave rectifier 12 .

The discharge of the capacitor is controlled so that the impedance of the switching elements 13-1, 13-2, ... in each branch becomes infinite, and the other switching elements are selectively turned on.

For example, the impedance of the switching element 13-1 in the branch 62-1 is controlled to be infinite, and the switching elements 63-11~63-1(m-1), 64-11~64-1(m-1) are turned off. When the operation, switching elements 65-11～65-1(m-1) and 66-1 are opened and operated, all the capacitors 14-11～14-1m of the branch circuit 62-1 are connected in series, and the polarity reversal circuit 16 A voltage value m times the charging voltage of each capacitor is output.

In the branch 62-2, the impedance of the switching element 13-2 is controlled to be infinite, and the switching elements 63-21～63-2(m-1), 64-21～64-2(m-1) are turned off. , when the switching elements 65-21～65-2(m-1), 66-2 are on and in operation, all the capacitors 14-21～14-2m of the branch circuit 62-2 are connected in series, and output to the polarity inversion circuit 16 The voltage value of m times the charging voltage of each capacitor.

In this way, during discharge, all branches operate sequentially, and through repetition, a high-voltage AC stepped voltage waveform is supplied to the discharge lamp 2 from the AC stepped voltage generator 61 through the first capacitor 3 at a high frequency of, for example, 20KHz.

Here, although the AC stepped voltage waveform provided from the AC stepped voltage generating source 61 as an example to boost the charging voltage of each capacitor to m times is described, by controlling the switching elements of each branch, it can be adjusted from 1 times to m times. times the range to control the output voltage. For example, if all the capacitors in each branch are connected in parallel, the output voltage becomes the same level as the input voltage, and an AC stepped voltage waveform as shown in Fig. 45(a) is output. If it is controlled so that only two capacitors of each branch are connected in series, as shown in FIG. 45( b ), an AC stepped voltage waveform boosted by a factor of 2 is output.

In this way, various AC stepped voltages can be generated, and versatility can be improved.

In the case of this circuit, since the voltage level is different when the boosted AC stepped voltage waveform is supplied, the charging and discharging of the capacitors can not be performed simultaneously in each branch. Therefore, when a certain branch is in a charge cycle and the branch must be used for the output to the discharge lamp 2, the switching elements 13-1... must be controlled to be off during that period. Therefore, since charging is stopped during this period, the input current from the full-wave rectifier 12 is cut off.

However, assuming that the period during which the boosted AC stepped voltage waveform is supplied to the discharge lamp 2 is only for the start of lighting, this period is very short, and the input current will not be distorted even if the input current is cut off. After the discharge lamp 2 starts to illuminate, if the switching elements are controlled so that the capacitors in each branch are connected in parallel, the charging and discharging voltage levels of the capacitors are consistent, so when a certain branch is in the charging cycle, even if it becomes the discharge lamp The state of this branch has to be used in the output of 2, and it is not necessary to turn off the switching elements 13-1 . . . Therefore, the input power factor at the time of lighting by the discharge lamp 2 can be improved.

In this configuration, the capacitors in each branch are connected in parallel for charging, and the capacitors in each branch are connected in series from the start of warm-up to lighting to supply the discharge lamp 2 with a boosted AC stepped voltage waveform. In addition, the preheating is performed after the switching element 6 is turned on for a certain period of time, and thereafter, the discharge lamp 2 starts to illuminate with the boosted AC stepped voltage waveform. After lighting, the capacitors of each branch are connected in parallel to maintain lighting with an output voltage at the same level as the input voltage.

In this configuration, the AC stepped voltage waveform from the AC stepped voltage generator 61 is supplied to the discharge lamp 2 via the first capacitor 3 . Therefore, in the present embodiment, when the time width of each voltage of the stepped voltage waveform is variable to control the effective value of the AC stepped voltage waveform, the load characteristic ranges from the disconnection of the discharge lamp 2 (the load current is zero) to the short circuit ( There are operating points in a wide range where the load voltage is zero), and the range of applicable lamp voltages can be expanded. Furthermore, the load current flowing when the discharge lamp 2 is short-circuited can be suppressed, and an excessive current can be prevented from flowing.

In the above example, the AC stepped voltage waveform supplied from the AC stepped voltage generator 61 to the discharge lamp 2 is boosted when lighting is started, but the AC stepped voltage waveform may not be boosted, and the capacitors may be connected in parallel during discharge. And set the time to discharge and charge the capacitor with the highest voltage longer. Therefore, when lighting is started, the waveform of the AC stepped voltage supplied from the AC stepped voltage generating source 61 to the discharge lamp 2 is as shown in FIG. 45(c). In this way, the effective value applied to the discharge lamp 2 can be higher than usual, so that the discharge lamp can start to illuminate.

25th embodiment

The parts that are the same as those in the nineteenth to twenty-fourth embodiments described above are denoted by the same symbols, and detailed descriptions of these parts are omitted.

As shown in FIG. 46, the AC ladder-shaped voltage generating source 71 connects n branches 72-1, 72-2... to the output terminals of the full-wave rectifier 12 in parallel. The above-mentioned n branches 72-1, 72-2... are respectively constituted by a plurality of capacitors and switching elements constituted by a plurality of MOSFETs.

For example, the branch 72-1 is a circuit in which m switching elements and m capacitors are alternately connected in series via the switching element 13-1, that is, the switching element 73-11, the capacitor 74-11, the switching element 73-12, the capacitor 74 -12. A series circuit of switching element 73 - 13 , capacitor 74 - 13 . The respective capacitors 74-11 to 74-1m constitute a DC voltage source.

The switching element 75-11 is connected in parallel to the series circuit of the capacitor 74-11 and the switching element 73-12, the switching element 75-12 is connected in parallel to the series circuit of the capacitor 74-12 and the switching element 73-13, and the capacitor 74-12 is connected in parallel to the series circuit of the switching element 73-13. 13 and the series circuit of the switching element 73-14 (not shown), the switching element 75-13 is connected in parallel, ..., and the series circuit of the capacitor 74-1 (m-1) (not shown) and the switching element 73-1m A switching element 75-1 (m-1) is connected in parallel thereto.

The switching element 76-11 is connected in parallel on the series circuit of the switching element 73-12 and the capacitor 74-12, the switching element 76-12 is connected in parallel on the series circuit of the switching element 73-13 and the capacitor 74-13, ..., in the switch A switching element 76-1(m-1) is connected in parallel to the series circuit of the element 73-1m and the capacitor 74-1m.

Branch 72-2 is a circuit in which m switching elements and m capacitors are alternately connected in series via switching element 13-2, that is, switching element 73-21, capacitor 74-21, switching element 73-22, capacitor 74-22 , switching element 73 - 23 , capacitor 74 - 23 . The respective capacitors 74-21 to 74-2m constitute a DC voltage source.

The switching element 75-21 is connected in parallel on the series circuit of the capacitor 74-21 and the switching element 73-22, the switching element 75-22 is connected in parallel on the series circuit of the capacitor 74-22 and the switching element 73-23, and the capacitor 74-22 is connected in parallel. 23 and the series circuit of the switching element 73-24 (not shown), the switching element 75-23 is connected in parallel, ..., and the series circuit of the capacitor 74-2 (m-1) (not shown) and the switching element 73-2m A switching element 75-2 (m-1) is connected in parallel thereto.

The switching element 76-21 is connected in parallel on the series circuit of the switching element 73-22 and the capacitor 74-22, the switching element 76-22 is connected in parallel on the series circuit of the switching element 73-23 and the capacitor 74-23, ..., in the switch A switching element 76-2(m-1) is connected in parallel to the series circuit of the element 73-2m and the capacitor 74-2m.

In this way, all the branches constitute the same circuit as the above-mentioned two branches through a plurality of switching elements and capacitors.

The connection points of the above switching elements 73-11, 73-21... and capacitors 74-11, 74-21... are connected to the switching elements 16-1 and 16-3 on the connection point. The connection point of the switching elements 16-2 and 16-4 of the polarity inversion circuit is connected to the other end of the capacitors 74-1m and 74-2m on the othermost end side of each branch.

Each switching element of each branch 72-1, 72-2... is comprised by MOSFET, and the specific example is described below.

FIG. 47 shows the configuration of the branch 72-1, the switching element 13-1 is composed of a diode and a MOSFET, and the other switching elements 73-11~73-1m, 75-11~75-1(m-1) , 76-11 ~ 76-1 (m-1) consists of two polarity switches that are connected to the source and gate of two MOSFETs.

This configuration is also the same for the other branches 72-2.... When outputting the stepped-down voltage, the AC stepped voltage generating source 71 is as follows: when charging, in the branch 72-1, the impedance of the switching element 13-1 is controlled to a finite value, so that the switching element 73-11～ 73-1m performs the opening operation, and the switching elements 75-11 to 75-1(m-1), 76-11 to 76-(m-1) perform the closing operation. Accordingly, all the capacitors 74-11 to 74-1m of the branch 72-1 are connected in series, and the output voltage of the full-wave rectifier 12 is charged to a predetermined level.

In the next branch 72-2, the impedance of the switching element 13-2 is controlled to a finite value, so that the switching elements 73-21~73-2(m-1) are opened, and the switching elements 75-21~75- 2(m-1), 76-21 to 76-2(m-1), and 66-2 perform the closing operation. Accordingly, all the capacitors 74-21 to 74-2m of the branch 72-2 are connected in series, and the output voltage of the full-wave rectifier 12 is charged to a predetermined level slightly higher than that of the branch 72-1.

In this way, when charging, all the capacitors of the n-stage branches are connected in series, and the series circuit of the capacitors is charged to a different voltage value for each branch by the output voltage from the full-wave rectifier 12 .

The AC stepped voltage generating source 71 is as follows: when discharging, in the branch circuit 72-1, the switching elements 73-11 to 73-1m are turned off, and the switching elements 75-11 to 75-1 (m-1) , 76-11～76-1(m-1), 66-1 perform the opening action, so that all the capacitors 74-11～74-1m of the branch circuit 72-1 become connected in parallel, and can output a voltage of 1/m .

In the next branch 72-2, the switching elements 73-21～73-2m are turned off, and the switching elements 75-21～75-2(m-1), 76-21～76-2(m-1) , 66-2 performs an open operation, and all the capacitors 74-21 to 74-2m of the branch circuit 72-2 are connected in parallel to output a voltage of 1/m.

Therefore, in this example, when discharging, each capacitor is connected in parallel to each branch, and a current flows through the polarity inversion circuit 16 . Therefore, an AC stepped voltage in which the input voltage is stepped down to 1/m is supplied from the AC stepped voltage generating source 71 to the discharge lamp 2 via the first capacitor 3 . When discharging, any number of capacitors can be connected in series by controlling the switching elements of each branch circuit 72-1, 72-2..., so that the AC stepped voltage can be stepped down arbitrarily.

When outputting the boosted voltage, the AC stepped voltage generating source 71 is as follows: when charging, in the branch 72-1, the impedance of the switching element 13-1 is controlled to a finite value, so that the switching element 73-11, 75-11 to 75-1(m-1) and 76-11 to 76-(m-1) perform the opening operation, and the switching elements 73-12 and 73-1m perform the closing operation. Accordingly, all the capacitors 74-11 to 74-1m of the branch 72-1 are connected in parallel, and the output voltage of the full-wave rectifier 12 is charged to a predetermined level.

In the next branch 72-2, the impedance of the switching element 13-2 is controlled to a finite value, so that the switching elements 73-21, 75-21~75-2(m-1), 76-21~76-2( m-1) turns on and makes the switching elements 73-22 to 73-2m turn off. Accordingly, all the capacitors 74-21 to 74-2m of the branch 72-2 are connected in parallel, and the output voltage of the full-wave rectifier 12 is charged to a predetermined level slightly higher than that of the branch 72-2.

In this way, when charging, all the capacitors of the n-level branches are connected in parallel, and the series circuit of the capacitors is charged to a different voltage value for each branch by the output voltage from the full-wave rectifier 12 .

The alternating current stepped voltage generation source 71 is such: during discharging, in the branch circuit 72-1, switch elements 73-11, 75-11～75-1(m-1), 76-11～76-1( m-1) is turned on, and the switching elements 73-12 to 73-1m and 66-1 are turned off, so that the capacitors 74-11 to 74-1m of the branch circuit 72-1 are all connected in series, and the current flows from the capacitors 74 -11 to 74-1m flow into the polarity inversion circuit 16 through the switching element 66-1. That is, the charging voltages of the respective capacitors 74-11 to 74-1m are added and output.

In the next branch 72-2, the switching elements 73-21, 75-21 to 75-2 (m-1), and 76-21 to 76-2 (m-1) are turned off, and the switching elements 73-22 ～73-2m, 66-2 carry out open operation, thereby each capacitor 74-21～74-2m of branch circuit 72-2 is all connected in series, and electric current flows in from each capacitor 74-21～74-2m through switching element 66-2 Polarity Reversal Circuit 16. That is, the charging voltages of the respective capacitors 74-21 to 74-2m are added and output.

In this way, when discharging, each capacitor is connected in series in each branch, and a current flows through the polarity inversion circuit 16 . Therefore, an AC stepped voltage in which the input voltage is boosted by m times is supplied from the AC stepped voltage generating source 71 to the discharge lamp 2 via the first capacitor 3 . During discharge, the number of capacitors connected in series can be changed by controlling the switching elements of each branch 72-1, 72-2..., thereby changing the degree of voltage boosting. In this way, various AC stepped voltages can be generated, and versatility can be improved.

In this device, one branch cannot be charged and discharged at the same time. That is, in branch 72-1, when discharging is performed during charging, switching element 73-11 is turned off to stop charging and then discharge is performed. At this time, due to the stop of charging, the input current is cut off. To avoid this, no discharge is performed during charging. That is, only charging is performed during the charging period, and discharge is performed by other branches that are not during the charging period. Thus, the phenomenon that the input current is cut off can be avoided.

In this configuration, the AC stepped voltage waveform from the AC stepped voltage generator 71 is supplied to the discharge lamp 2 via the first capacitor 3 . Therefore, in this embodiment, when the time width of each voltage of the step-shaped voltage waveform is variable to control the effective value of the AC step-shaped voltage waveform, the discharge lamp 2 is from open circuit (load current is zero) to short circuit (load voltage is There are operating points in a wide range of zero), which can expand the range of applicable lamp voltage. Furthermore, it is possible to suppress the load current flowing through the discharge lamp 2 when the discharge lamp 2 is short-circuited, and it is possible to prevent excessive current from flowing.

Invention effect

According to the inventions of claims 1 and 2, there is provided a power supply device capable of controlling the charging voltage of a capacitor to be constant.

According to the inventions of claims 3-7, the input current can also flow smoothly and continuously. That is, the input current can be sinusoidal.

Furthermore, according to the inventions of claims 5-7, it is also possible to sufficiently suppress high-frequency components in the input current to improve the power factor.

According to the invention according to claims 8 and 9, the effective value detection unit detects the effective value of the lamp current flowing into the discharge lamp, controls the switching circuit, and variably controls the output time of each voltage value of the stepped voltage waveform including the zero voltage value. The effective value of the lamp current detected by the effective value detecting unit becomes constant. Therefore, the lamp current can be limited and controlled without using coil lamp winding components, and the size and weight of the device can be realized.

According to the invention of claim 10, the AC stepped voltage waveform from the AC stepped voltage generating source is supplied to the discharge lamp through the capacitor, so that the applicable lamp voltage range of the discharge lamp can be expanded, and the discharge lamp can be prevented from being damaged. Excessive current flows during a short circuit.

Claims (10)

1. A power supply device in which a series circuit of a plurality of variable resistors and capacitors is connected in parallel, each of the above-mentioned capacitors is charged by means of a corresponding variable resistor by a commercial power supply voltage, and each of the above-mentioned variable resistors is controlled to be charged only during charging The impedance of the corresponding capacitor period is a finite value, and the impedance during the other period is infinite, and the discharge current flows sequentially from each capacitor to the load, and it is characterized in that it has: an impedance control unit that controls the impedance of the corresponding variable resistor , causing an input current of a preset target value to flow through an arbitrary variable resistor; and an amplitude control unit, when the capacitor voltage is lower than the target value of the charging voltage, performing control to increase the amplitude of the input current of the target value , when the capacitor voltage is higher than the target value of the charging voltage, control is performed to reduce the amplitude of the input current of the target value so that the charging voltage of the above-mentioned arbitrary capacitor becomes constant. 2. A power supply device in which a series circuit of a plurality of variable resistors and capacitors is connected in parallel, each of the above-mentioned capacitors is charged by means of a corresponding variable resistor by a commercial power supply voltage, and each of the above-mentioned variable resistors is controlled to be charged only during charging The impedance of the corresponding capacitor is a finite value, and the impedance of the other period is infinite, and the discharge current flows sequentially from each capacitor to the load. It is characterized in that it has: a plurality of impedance control units, which control the corresponding variable resistors. impedance, so that input currents of preset target values respectively flow in the above-mentioned variable resistors; and a plurality of amplitude control units, when the capacitor voltage is lower than the target value of the charging voltage, input to increase the target value The control of the amplitude of the current, when the capacitor voltage is higher than the target value of the charging voltage, controls the amplitude of the input current to reduce the target value, so that the capacitor charging voltage of the variable resistor corresponding to the controlled impedance of each impedance control unit changes. is constant. 3. A power supply device in which a series circuit of a plurality of variable resistors and capacitors is connected in parallel, each of the above-mentioned capacitors is charged by means of a corresponding variable resistor by a commercial power supply voltage, and each of the above-mentioned variable resistors is controlled to be charged only during charging The impedance of the corresponding capacitor is a finite value, and the impedance of the other period is infinite, and the discharge current flows sequentially from each capacitor to the load. It is characterized in that it has: a plurality of impedance control units, which control the corresponding variable resistors. Impedance so that an input current of a preset target value flows through each variable resistor respectively; and an amplitude control unit that increases the input current of a target value when the capacitor voltage is lower than the target value of the charging voltage Amplitude control, when the capacitor voltage is higher than the target value of the charging voltage, control the amplitude of the input current that reduces the target value, so that the charging voltage of the capacitor with the highest charging target value among the capacitors becomes constant, and the above-mentioned impedances The control unit controls the impedance of the corresponding variable resistors such that an input current following an input current target value whose amplitude is controlled by the amplitude control unit flows through each variable resistor. 4. The power supply device according to claim 2 or 3, wherein the amplitude control unit is provided with a power supply voltage detection circuit, and according to the power supply voltage detected by the power supply voltage detection circuit, the corresponding capacitor charging voltage target value can be changed. 5. The power supply device according to claim 2 or 3, wherein the target value of the charging voltage of each capacitor is set so that the higher the capacitor charged, the smaller the ratio of the charging voltage of the adjacent capacitor. 6. The power supply device according to claim 2 or 3, characterized in that, during the period when the absolute value of the commercial power supply voltage rises, a certain capacitor voltage starts to charge the capacitor when the absolute value of the above-mentioned commercial power supply voltage is equal, and the lower stage Stop when the capacitor voltage of the capacitor is equal to the above-mentioned commercial power supply voltage. During the period when the absolute value of the commercial power supply voltage drops, the charging of a certain capacitor starts when the voltage of the previous capacitor is equal to the above-mentioned commercial power supply voltage absolute value, and stops when the charging voltage is equal to the above-mentioned commercial power supply voltage. . 7. A power supply device in which a series circuit of a plurality of variable resistors and capacitors is connected in parallel, each of the capacitors is charged by means of a corresponding variable resistor by a commercial power supply voltage, and each of the above-mentioned variable resistors is controlled to be charged only during charging The impedance of the corresponding capacitor is a finite value, and the impedance of the other period is infinite, and the discharge current flows sequentially from each capacitor to the load. It is characterized in that it has: a plurality of impedance control units, which control the corresponding variable resistors. Impedance, so that the input current of the preset target value flows respectively in each of the above-mentioned variable resistors; and the amplitude control unit, when the capacitor voltage is lower than the target value of the charging voltage, the input current of the target value is increased The control of the amplitude, when the capacitor voltage is higher than the target value of the charging voltage, the control of the amplitude of the input current that reduces the target value is performed, so that the charging voltage of a specific capacitor among the above-mentioned capacitors becomes constant, and the above-mentioned impedances The control unit controls the impedance of the corresponding variable resistor so that an input current following the input current target value whose amplitude is controlled by the amplitude control unit flows, and switches a specific capacitor to another capacitor. 8. A discharge lamp lighting device, characterized in that it has: a plurality of DC voltage sources, which generate different positive voltage values; a switch circuit, which selects one of the DC voltage sources to take out the DC voltage value, and the output contains zero voltage value The ladder-like voltage waveform; the polarity inversion circuit, input the ladder-like voltage waveform from the switching circuit, and output the AC ladder-like voltage waveform; the discharge lamp, provides the AC ladder-like voltage waveform from the polarity inversion circuit; RMS detection a section that detects the effective value of the lamp current flowing in the discharge lamp; and a control unit that controls the above-mentioned switching circuit and variably controls the output time of each voltage value of the step-shaped voltage waveform including the zero voltage value so that the above-mentioned effective value The effective value of the lamp current detected by the detection unit becomes constant. 9. A discharge lamp lighting device, characterized in that it has: a plurality of first DC voltage sources that generate different positive voltage values; a plurality of second DC voltage sources that generate an absolute value equal to the voltage of each first DC voltage source Negative voltage values that are equal in value and include zero voltage values; the first switch circuit selects one of the DC voltage values from the above-mentioned first DC voltage sources, and outputs a ladder-shaped voltage waveform including zero voltage values; the second switch circuit, Select one of the DC voltage values from the above-mentioned second DC voltage sources at a timing different from that of the first switching circuit, and output a ladder-shaped voltage waveform including zero voltage value; the discharge lamp provides the ladder-shaped voltage from each of the above-mentioned switching circuits a waveform; an effective value detection unit for detecting an effective value of a lamp current flowing through the discharge lamp; and a control unit for controlling each of the above-mentioned switching circuits, and variablely controlling the output time of each voltage value of the stepped voltage waveform including a zero voltage value , so that the effective value of the lamp current detected by the effective value detection unit becomes constant. 10. A discharge lamp lighting device, characterized in that it has: an alternating current step voltage generating source, a step-like change in voltage value, a step-like positive voltage waveform that increases and decreases like a sine wave, and a step-like change in voltage value, and alternately outputs a sine wave a stepped negative voltage waveform that increases and decreases like a wave; a discharge lamp that supplies an AC stepped voltage waveform from an AC stepped voltage generating source; and a capacitor connected in series between the AC stepped voltage generating source and the discharge lamp.

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