CN1431629A - Method for selecting data processing path and graphics processing unit using method - Google Patents
Method for selecting data processing path and graphics processing unit using method Download PDFInfo
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- CN1431629A CN1431629A CN03103035A CN03103035A CN1431629A CN 1431629 A CN1431629 A CN 1431629A CN 03103035 A CN03103035 A CN 03103035A CN 03103035 A CN03103035 A CN 03103035A CN 1431629 A CN1431629 A CN 1431629A
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Abstract
The system includes the central processing unit. The graphic processor includes the conversion and polishing engines and the path selection unit. The application program is executed in the system. The selection method includes the following steps. The path selection unit receives the several vertexes data generated by the said application program and detects the utilization rate of the central processing unit. Whether the vertexes data are sent to the central processing unit to the conversion and polishing engines to carry out the processing, based on the magnitude of the utilization rate of the central processing unit.
Description
Technical field
The present invention relates to a kind of data processing routing resource and use the graphic process unit of this method, refer to the graphic process unit that is applied to the data processing routing resource in the digital data system and uses this method especially.
Background technology
See also Fig. 1, the part step synoptic diagram of one three dimensions image processing process, wherein the apex document (vertex) that produced of application program (AP) needs through after the summit calculation process (vertex processing), can obtain to be incident upon the coordinate position and the effect of shadow of screen space (screenspace), and then these coordinate positions and effect of shadow are sent to the action that the next stop is depicted picture (rendering) as.
And main two kinds of main treatment steps " conversion (transformation) " and " polishing (lighting) " of carrying out in the above-mentioned summit calculation process (vertex processing), in order to obtain being incident upon the coordinate position and the effect of shadow of screen space (screenspace) respectively.And in the above-mentioned summit calculation process three dimensions image processing architecture (seeing the function block schematic diagram shown in Fig. 2 (a)) in early days, the apex document that application program 20 (AP) is produced is transferred to CPU (central processing unit) 21 (CPU) and is handled, and is then finished by the graphic process unit 22 of a special use as for depicting picture subsequent actions such as (rendering) as.But, in the framework (seeing the function block schematic diagram shown in Fig. 2 (b)) that follow-up developments are come out, then directly be integrated with the conversion and the polishing engine 221 (T﹠amp of a special use in the graphic process unit 22 for asking the increase of processing speed; L engine) handle above-mentioned " conversion (transformation) " with " polishing (lighting) " be sent to the follow-up imager 222 of describing after the step again.And under the definition of Microsoft, above-mentioned " conversion (transformation) ", with " polishing (lighting) " step by a conversion and a polishing engine (T﹠amp who is called vertex shader (vertex shader); Lengine) finish.
But in the huge day by day three dimensions image processing flow process of data quantity, even have special-purpose conversion and polishing engine, still having the slow excessively congestion phenomenon of processing speed to take place when data quantity is excessive, and how to improve the shortcoming of this conventional means, is development fundamental purpose of the present invention.
Summary of the invention
The present invention is a kind of data processing routing resource, be applied in the digital data system, this system includes a CPU (central processing unit) and a graphic process unit, this graphic process unit includes a conversion and polishing engine, and carry out an application program in this system, this system of selection then comprises the following step: receive several apex documents by this application program produced; Survey the utilization factor of this CPU (central processing unit); And decide according to the size of this CPU (central processing unit) utilization factor and these apex documents to be sent into this CPU (central processing unit) or send into this conversion and the polishing engine is handled.
According to above-mentioned conception, data processing routing resource of the present invention, the method for wherein surveying this CPU (central processing unit) utilization factor is for to take a sample to the instruction flow of this CPU (central processing unit).
According to above-mentioned conception, data processing routing resource of the present invention, wherein decide and these apex documents are sent into this CPU (central processing unit) or send into this conversion and method side that the polishing engine is handled contains the following step:, these apex documents are sent into this conversion and the polishing engine is handled when this CPU (central processing unit) utilization factor during greater than a threshold value according to the size of this CPU (central processing unit) utilization factor; And, these apex documents are sent into this CPU (central processing unit) handle when this CPU (central processing unit) utilization factor during less than this threshold value.
Another aspect of the invention is a kind of graphic process unit, be applied in the digital data system, this system includes a CPU (central processing unit), and the application program of execution one several apex documents of generation in this system, comprise as for this graphic process unit: a conversion and polishing engine, it is changed received apex document with polishing and handles back output; An and path selection unit, its signal is connected to this CPU (central processing unit) and this conversion and polishing engine, it receives these apex documents that this application program produces and the utilization factor of surveying this CPU (central processing unit), these apex documents is sent into this CPU (central processing unit) or send into this conversion and the polishing engine is changed with polishing and handled and decide according to the size of this CPU (central processing unit) utilization factor.
According to above-mentioned conception, graphic process unit of the present invention, wherein this path selection unit is taken a sample to the instruction flow of this CPU (central processing unit) and is obtained the utilization factor of this CPU (central processing unit).
According to above-mentioned conception, graphic process unit of the present invention, wherein this path selection unit is when this CPU (central processing unit) utilization factor during greater than a threshold value, these apex documents are sent into this conversion and the polishing engine is handled, and, then these apex documents are sent into this CPU (central processing unit) and handle when this CPU (central processing unit) utilization factor during less than this threshold value.
According to above-mentioned conception, graphic process unit of the present invention, wherein this path selection unit is integrated in the north bridge chips.
According to above-mentioned conception, graphic process unit of the present invention, wherein this path selection unit is finished with hardware mode.
According to above-mentioned conception, graphic process unit of the present invention, wherein this path selection unit is finished with hardware mode.
Description of drawings
The present invention makes it to obtain more deep understanding by following accompanying drawing and detailed description:
Fig. 1 is the part step synoptic diagram of one three dimensions image processing process.
Fig. 2 (a) is (b) for carrying out the part function block schematic diagram of summit calculation process in two kinds of three dimensions image processing architectures in the common technology.
The preferred embodiment function block schematic diagram that Fig. 3 develops out for improvement shortcoming commonly used for the present invention.
Fig. 4 (a) is (b) for using the technology of the present invention means two kinds of system architecture function block schematic diagrams on it.
Embodiment
See also Fig. 3, the preferred embodiment function block schematic diagram that the present invention develops out for improvement shortcoming commonly used is because the CPU (central processing unit) 32 in the computer system and this conversion and polishing engine 33 (T﹠amp; Lengine) these apex documents that all can receive this application program 30 and produced and change and polishing is handled, but conventional means all only utilize wherein one carry out above-mentioned conversion and polishing action, therefore cause treatment effeciency not cite.And the technology of the present invention means mainly have additional a path selection unit 31 in system, and its signal is connected to the CPU (central processing unit) 32 and this conversion and polishing engine 33 (T﹠amp in the computer system; L engine), this path selection unit 31 is mainly in order to receive these apex documents that this application program 30 produced with centralized control, and it just surveys the utilization factor (for example regularly the instruction flow of this CPU (central processing unit) 32 is taken a sample and learn its utilization factor) of this CPU (central processing unit) 32 at set intervals, so just can decide according to the size of these CPU (central processing unit) 32 utilization factors and these apex documents be sent into this CPU (central processing unit) 32 or send into this conversion and polishing engine 33 is changed with polishing and handled.
For instance, when the utilization factor of this CPU (central processing unit) 32 during greater than a threshold value, expression CPU (central processing unit) 32 is not idle, so path selection unit 31 just will promptly will be exported at that time, and the apex document of handling is sent into this conversion and polishing engine 33 is handled, and when the utilization factor of this CPU (central processing unit) 32 during less than this threshold value, represent that then CPU (central processing unit) 32 is in idle state, path selection unit 31 can be sent into the apex document that promptly will export at that time this CPU (central processing unit) 32 and handled this moment.Thus, see through the centralized control of path selection unit 31, system of the present invention can utilize CPU (central processing unit) 32 and conversion and polishing engine 33 to reach the parallel processing of conversion and polishing, and then improve the processing speed of system.
And because the framework of computer system has many distortion, for knowing that expressing the technology of the present invention means uses the practice on it, the spy describes in following two kinds of system architectures.See also Fig. 4 (a), wherein CPU (central processing unit) 32, north bridge chips 34, South Bridge chip 35, graphic process unit 36, region memory 37 are all finished with the individual chips form with Installed System Memory 38, conversion and polishing engine 33 then are arranged in north bridge chips 34 and the graphic process unit 36, see through the control of building the path selection unit 31 that places north bridge chips 34 with hardware pattern or example, in hardware, produced by application program 30 and deposited in these apex documents in the Installed System Memory 38, just can send at that time the higher path of treatment effeciency and carry out computing.But come data transmission owing to see through the slower bus interface of transmission speed between individual chips mostly, efficient still has the space of improvement.
See also Fig. 4 (b), its the technology of the present invention means can be used second kind of system architecture on it, its with first system architecture maximum different be in, has CPU (central processing unit) 32 at least, north bridge chips 34, graphic process unit 36, region memory 37 is all built with Installed System Memory 38 and is put on same chip 40, this kind framework is a future trend and be commonly called system combination chip (System On Chip, SOC), thus, just can inner faster online the finishing of transmission speed between each function square, and finish above-mentioned three dimensions image processing in more efficient mode.
In sum, in the huge day by day three dimensions image processing flow process of data quantity, using technological means of the present invention can be under the situation that increases hardware and software cost not significantly, effectively solve the slow excessively problem of processing speed, and then improve the conventional means shortcoming, and then effectively reach development fundamental purpose of the present invention.And the technology of the present invention means can be widely used in as on the digital data systems such as personal computer, game host, those skilled in the art should know, under the situation that does not break away from the spirit and scope of the present invention of illustrating by additional claim, can carry out various variations and replacement.
Claims (9)
1. data processing routing resource, be applied in the digital data system, this system includes a CPU (central processing unit) and a graphic process unit, this graphic process unit includes a conversion and polishing engine, and carry out an application program in this system, this system of selection then comprises the following step:
Reception is by several apex documents that this application program produced;
Survey the utilization factor of this CPU (central processing unit); And
Decide according to the size of this CPU (central processing unit) utilization factor and these apex documents to be sent into this CPU (central processing unit) or send into this conversion and the polishing engine is handled.
2. data processing routing resource as claimed in claim 1, the method for wherein surveying this CPU (central processing unit) utilization factor is for to take a sample to the instruction flow of this CPU (central processing unit).
3. data processing routing resource as claimed in claim 1, wherein decide according to the size of this CPU (central processing unit) utilization factor and these apex documents sent into this CPU (central processing unit) or send into this conversion and method that the polishing engine is handled is dominated and contained the following step:
When this CPU (central processing unit) utilization factor during, these apex documents are sent into this conversion and the polishing engine is handled greater than a threshold value; And
When this CPU (central processing unit) utilization factor during, these apex documents are sent into this CPU (central processing unit) handle less than this threshold value.
4. a graphic process unit is applied in the digital data system, and this system includes a CPU (central processing unit), and carries out the application program of several apex documents of generation in this system, comprises as for this graphic process unit:
One conversion and polishing engine, it is received apex document to be changed with polishing handle back output; And
One path selection unit, it is that signal is connected to this CPU (central processing unit) and this conversion and polishing engine, it receives these apex documents that this application program produces and the utilization factor of surveying this CPU (central processing unit), these apex documents is sent into this CPU (central processing unit) or send into this conversion and the polishing engine is changed with polishing and handled and decide according to the size of this CPU (central processing unit) utilization factor.
5. graphic process unit as claimed in claim 4, wherein this path selection unit is the instruction flow of this CPU (central processing unit) is taken a sample and to obtain the utilization factor of this CPU (central processing unit).
6. graphic process unit as claimed in claim 4, wherein this path selection unit is when this CPU (central processing unit) utilization factor during greater than a threshold value, these apex documents are sent into this conversion and the polishing engine is handled, and, then these apex documents are sent into this CPU (central processing unit) and handle when this CPU (central processing unit) utilization factor during less than this threshold value.
7. graphic process unit as claimed in claim 4, wherein this path selection unit is to be integrated in the north bridge chips.
8. graphic process unit as claimed in claim 4, wherein this path selection unit is to finish with hardware mode.
9. graphic process unit as claimed in claim 4, wherein this path selection unit is finished with hardware mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031030351A CN1186748C (en) | 2003-01-28 | 2003-01-28 | Method for selecting data processing path and graphics processing unit using method |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB031030351A CN1186748C (en) | 2003-01-28 | 2003-01-28 | Method for selecting data processing path and graphics processing unit using method |
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| CN1431629A true CN1431629A (en) | 2003-07-23 |
| CN1186748C CN1186748C (en) | 2005-01-26 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8134562B2 (en) | 2008-01-04 | 2012-03-13 | Asustek Computer Inc. | Method for assisting in data calculation by using display card |
| CN101354780B (en) * | 2007-07-26 | 2012-05-30 | Lg电子株式会社 | Graphic data processing apparatus and method |
-
2003
- 2003-01-28 CN CNB031030351A patent/CN1186748C/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101354780B (en) * | 2007-07-26 | 2012-05-30 | Lg电子株式会社 | Graphic data processing apparatus and method |
| US8217951B2 (en) | 2007-07-26 | 2012-07-10 | Lg Electronics Inc. | Graphic data processing apparatus and method |
| US8134562B2 (en) | 2008-01-04 | 2012-03-13 | Asustek Computer Inc. | Method for assisting in data calculation by using display card |
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| Publication number | Publication date |
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| CN1186748C (en) | 2005-01-26 |
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