CN1414622A - Double-mosaic process using metal hard cover screen - Google Patents
Double-mosaic process using metal hard cover screen Download PDFInfo
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- CN1414622A CN1414622A CN 01134239 CN01134239A CN1414622A CN 1414622 A CN1414622 A CN 1414622A CN 01134239 CN01134239 CN 01134239 CN 01134239 A CN01134239 A CN 01134239A CN 1414622 A CN1414622 A CN 1414622A
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Abstract
A dual-inlay preparation method for using hard cover curtain of metal includes semiconductor substrate consisting of a conducting wire structure, a dielectric separation layer, a dielectric layer of low dielectric constant, a first and a second hard cover curtains of metal, forming a first opening on the second hard cover curtain and a second opening on the first one with the second opening below the first one as the bore of the second opening smaller than the first one, rewoving off dielectric layer being not covered by the first hard cover curtain until an interlayer hole being formed as the dielectric separation layer to the exposed and furthermore forming, a ditch above the into layer hole by removing the dielectric layer off to the preset depth after the first hard cover curtain which is not covered by the second one to have been removed off.
Description
Technical field
The present invention relates to double-insert process, be particularly to a kind of double-insert process that uses metal hard cover screen.
Background technology
In the processing procedure of highdensity integrated circuit (IC),, be that many metal interconnectings are made into tridimensional multi-layer conductor leads structure as super large integrated circuit (VLSI) processing procedure.Yet, along with the capacity effect between the integration increase meeting raising metal interconnecting of IC assembly, and then cause that RC prolongs time of delay, interference (cros stalk) frequency between the metal interconnecting increases, therefore the rate of current by these metal interconnectings becomes very slow.In order to improve the speed of electric current, how to reduce the resistance value of metal interconnecting and the parasitic capacitance between the minimizing metal interconnecting, become the very important processing procedure factor.If effectively reduce the resistance value of metal interconnecting, then need adopt the metal material of low-resistance value; If the parasitic capacitance between the minimizing metal interconnecting, then need adopt the insulating material of low-k make inner layer dielectric layer between the metal interconnecting (inter-layer dielectric, ILD).But, when the organic material of low-k being applied in the making of ILD layer, still suffer from many problems.
Consult Fig. 1-shown in Figure 3, it shows the manufacture method of the interlayer hole between conventional metals intraconnections.As shown in Figure 1, semiconductor substrate 10 includes: a plain conductor 12; The one ILD layer 14 with low-k is covered on the exposed surface of plain conductor 12 and substrate 10; The hard cover screen 16 of silicon monoxide is deposited on the surface of ILD layer 14; And one photoresist layer 18 definition with pattern be formed on the surface of hard cover screen 16.At first, hard cover screen 16 etchings that do not covered by photoresist layer 18 are removed, to form an opening;
Then, as shown in Figure 2, continue the ILD layer 14 of etching openings below, to form an interlayer hole 19, wherein interlayer hole 19 has angled side walls 15, and exposes the top of plain conductor 12; At last, carry out oxygen electric paste etching processing procedure, photoresist layer 18 is removed.In above-mentioned processing procedure, when ILD layer 14 uses organic macromolecular material, because the material character of ILD layer 14 is very similar to the material character of photoresist layer 18, and the keeping out property of 14 pairs of oxygen electric paste etching of ILD layer processing procedure is very poor, therefore pneumoelectric is starched etch process meeting etching part ILD layer 14, make to form a pothole 15a on the sidewall 15 of interlayer hole 19, so influence follow-up in interlayer hole 19 effect of filled conductive layer, as shown in Figure 3.
One of solution is to make an antireflection barrier layer in addition at photoresist layer 18, can slow down the problem that oxygen electric paste etching processing procedure is produced, but this can meet with a bigger control difficult problem when the pattern of etching interlayer hole 19.
Two of solution is that the material of easily being damaged by oxygen electricity slurry is used in restriction, and then ILD layer 14 only can be selected the material that contains silicon dioxide for use, as PSG, USG, Black Diamond, Coral, Aurora, Flowfill.In order to address this problem, United States Patent (USP) the 6th, 159 discloses a kind of double-insert process No. 661, is to make a SiON cap rock on the hard cover screen of silica in addition, can be used to protect the ILD layer, to avoid being subjected to the etching of oxygen electricity slurry.Its major defect is:
In order to define the pattern of SiON cap rock, how to adjust the hard cover screen of silica, and the high etching selectivity between the SiON cap rock, become a new problem.And the making of SiON cap rock still can't improve the limited problem of material of ILD layer.
Summary of the invention
The purpose of this invention is to provide a kind of double-insert process that uses metal hard cover screen, be on the ILD layer, to make double-deck hard cover screen, and one of them layer hard cover screen is metal material, overcome the drawback of prior art, reach the ability of the filling dual damascene opening that promotes conductive layer, shorten RC time of delay, reduce the interfering frequency between the metal interconnecting, do not need to make antireflecting coating in addition, make the purpose that processing procedure is simplified and cost of manufacture reduces.
The object of the present invention is achieved like this: a kind of double-insert process that uses metal hard cover screen, it is characterized in that: it comprises the following steps:
(1) provide the semiconductor substrate, it includes, and a conductor structure, a dielectric separate layer are covered on this conductor structure, the dielectric layer of a low-k is formed on this dielectric separate layer;
(2) form one first hard cover screen on this dielectric layer surface, and this first hard cover screen is made of metal material;
(3) form one second hard cover screen on this first hard cover screen surface;
(4) form one first opening in this second hard cover screen, this first opening is positioned at this conductor structure top;
(5) form one second opening in this first hard cover screen, this second opening is positioned at this first opening below, and the bore of this second opening is less than the bore of this first opening;
(6) this dielectric layer that will do not covered by this first hard cover screen is removed, until exposing this dielectric separate layer to the open air, to form an interlayer hole;
(7) this first hard cover screen that will do not covered by this second hard cover screen is removed;
(8) this dielectric layer that will do not covered by this first hard cover screen is removed, and until arriving a desired depth, forms a trench in this interlayer hole top, and this interlayer hole and trench constitute a dual damascene opening.
The material of this first hard cover screen is selected from one of them of following metal material: Ti, TiN, Ta, TaN, Al or AlCu.The material of this second hard cover screen is selected from one of them of following metal material: Ti, TiN, Ta, TaN, Al or AlCu.The material of this second hard cover screen is selected from one of them of following dielectric material: SiO
2, SiC, SiN, SRO or SiON.The material of this dielectric layer is the organic polymer of spin coating processing procedure made.The material of this dielectric layer is the material that contains SiO of chemical vapor deposition process made.
Also comprise another step: the dielectric separate layer of this dual damascene opening bottom is removed, to expose the top of this conductor structure.Also comprise another step: form a conductive layer and fill up this dual damascene opening.Also comprise another step: before forming this conductive layer, form a barrier layer in the sidewall and the bottom of this dual damascene opening.
The another kind of double-insert process that uses metal hard cover screen, it is characterized in that: it comprises the following steps:
(1) provide the semiconductor substrate, it includes, and a conductor structure, a dielectric separate layer are covered on this conductor structure, the dielectric layer of a low-k is formed on this dielectric separate layer;
(2) on this dielectric layer surface, form a hard cover screen, and this hard cover screen is made of metal material;
(3) in this hard cover screen, form one first opening, and this first opening is positioned at the top of this conductor structure;
(4) definition forms a photoresist layer on this hard cover screen, includes one second opening in this photoresist layer, and this second opening is positioned at this first opening, and the bore of this second opening is less than the bore of this first opening;
(5) this dielectric layer that will do not covered by this photoresist layer is removed, until a desired depth, to form an interlayer hole;
(6) this photoresist layer is removed;
(7) this dielectric layer of this interlayer hole below is removed, until exposing this dielectric separate layer, simultaneously the dielectric layer around this interlayer hole is removed, to form a trench, this interlayer hole and trench constitute a dual damascene opening.
The double-insert process that another uses metal hard cover screen is characterized in that: also comprise another step:
(1) provide the semiconductor substrate, it includes, and a conductor structure, a dielectric separate layer are covered on this conductor structure, first dielectric layer of a low-k is formed on this dielectric separate layer, an etching stopping layer is formed on this first dielectric layer, second dielectric layer is formed on this etching stopping layer;
(2) on this second dielectric layer surface, form one first hard cover screen, and this first hard cover screen is made of metal material;
(3) on this first hard cover screen surface, form one second hard cover screen;
(4) in this second hard cover screen, form one first opening, and this first opening is positioned at this conductor structure top;
(5) form one second opening in this first hard cover screen, this second opening is positioned at this first opening below, and the bore of this second opening is less than the bore of this first opening;
(6) this second dielectric layer, this etching stopping layer and this first dielectric layer that will do not covered by this first hard cover screen removed, until exposing this dielectric separate layer to the open air, to form an interlayer hole;
(7) this first hard cover screen that will do not covered by this second hard cover screen is removed;
(8) exposed areas of this first dielectric layer is removed, until exposing this etching stopping layer, formed a trench in this second interlayer layer, this interlayer hole and trench constitute a dual damascene opening.
The material of this first dielectric layer is the organic polymer of spin coating processing procedure made.The material of this first dielectric layer is the material that contains SiO of chemical vapor deposition process made.The material of this second dielectric layer is the organic polymer of spin coating processing procedure made.The material of this second dielectric layer is the material that contains SiO of chemical vapor deposition process made.Also comprise another step: the dielectric separate layer of this dual damascene opening bottom is removed, to expose the top of this conductor structure.Also comprise another step: form a conductive layer and fill up this dual damascene opening.Also comprise another step: before forming this conductive layer, form a barrier layer in the sidewall and the bottom of this dual damascene opening.
Further specify below in conjunction with preferred embodiment and accompanying drawing.
Description of drawings
Fig. 1-Fig. 3 is the manufacture method schematic diagram of the interlayer hole between the conventional metals intraconnections.
Fig. 4-Figure 15 is the generalized section of double-insert process of the present invention.
Figure 16-Figure 24 is the generalized section of the double-insert process of the embodiment of the invention 2.
Figure 25-Figure 34 is the generalized section of the double-insert process of the embodiment of the invention 3.
Embodiment
Embodiment 1
In the double-insert process of the first embodiment of the present invention, be to make double-deck hard cover screen on the ILD of low-k layer, and this double-deck hard cover screen can be metal material, also wherein one deck hard cover screen is a metal material.
Consult Fig. 4-shown in Figure 15, double-insert process of the present invention is as follows:
As shown in Figure 4, semiconductor substrate 30 includes most plain conductor 32, one dielectric separate layers 34 and covers the exposed surface of plain conductor 32 and substrate 30, and the ILD layer 36 of a low-k is formed on the surface of dielectric separate layer 34.Plain conductor 32 is made of the copper metal.Dielectric separate layer 34 can be selected silicon nitride or carborundum for use, is used for preventing the oxidative phenomena of plain conductor 32, and makes atom/ions diffusion in the plain conductor 32 to ILD layer 36.The material of ILD layer 36 can be macromolecular material, and (spin-on polymer SOP), FLARE, SILK, Parylene, PAE-11 or polyimides, also can be and contains SiO as: the spin coating macromolecule of making via the spin coating processing procedure
2Inorganic, as the SiO that makes via the spin coating processing procedure
2, FSG, FUG or via chemical vapor deposition process (chemical vapordeposition, CVD) black diamond, the Coral of Zhi Zuoing, Aurora, GreenDot or other dielectric material.
In addition, substrate 30 includes first hard cover screen 38 and second hard cover screen 40 in addition, is formed in regular turn on the surface of ILD layer 36.The material of first hard cover screen 38 can be selected metal materials such as Ti, TiN, Ta, TaN, Al or AlCu for use, the material of second hard cover screen 40 can be selected metal materials such as Ti, TiN, Ta, TaN, Al or AlCu for use, and the material of second hard cover screen 40 also can be selected dielectric materials such as SiO, SiC, SiN, SRO or SiON for use.
As shown in Figure 5, definition forms first photoresist layer 42 on second hard cover screen 40, in order to the figure of the trench of definition dual damascene opening.
Then, as shown in Figure 6, second hard cover screen 40 that is not covered by first photoresist layer 42 is removed,, again first photoresist layer 42 is removed to form most first openings 41.
Subsequently, as shown in Figure 7, definition forms one second photoresist layer 44 on the surface of substrate 30, in order to the figure of the interlayer hole of definition dual damascene opening.
Subsequently, as shown in Figure 8, first hard cover screen 38 that is not covered by second photoresist layer 44 is removed,, again second photoresist layer 44 is removed to form most second openings 43.Wherein, the bore of first opening 41 is greater than the bore of second opening 43.
As shown in Figure 9, carry out dry ecthing procedure, the ILD layer 36 that is not covered by first hard cover screen 38 is removed,, then can above each plain conductor 32, form most interlayer holes 45 until exposing dielectric separate layer 34.Because second photoresist layer 44 is removed earlier, therefore can avoid ILD layer 36 to be subjected to the etching of oxygen electricity slurry and have influence on the side wall profile of interlayer hole 45.
Then, as shown in figure 10, the exposed areas of first curtain layer of hard hood 38 is removed, so that the side wall profile of first curtain layer of hard hood 38 and second hard cover screen 40 trims.
And then, as shown in figure 11, will be etched to a desired depth, make the upper area of interlayer hole 45 become a trench 47 by the ILD layer 36 of a hard cover screen 38 and second hard cover screen 40.Thus, interlayer hole 45 above each plain conductor 32 and trench 47 constitute a dual damascene opening 46.
Follow-up, as shown in figure 12, the dielectric separate layer 34 of dual damascene opening 46 bottoms to be removed, and second hard cover screen 40 is removed, the top area of plain conductor 32 exposes the bottom at dual damascene opening 46 to the open air.Next, can need carry out relevant manufacture of semiconductor with design, in dual damascene opening 46, to make the intraconnections of a dual-damascene structure according to processing procedure.
As shown in figure 13, deposit a barrier layer 48 equably on the whole surface of substrate 30, its material can be selected Ta/TaN, Ti/TiN or W/WN for use, and one of its purpose is to be used for reciprocation between the conductive layer of isolated ILD layer 36 and follow-up making; Two of its purpose is the tacks that are used for increasing between the conductive layer of ILD layer 36 and follow-up making.Then, can adopt PVD, CVD, plating or other deposition process, the conductive layer 50 of deposition one bronze medal metal on the whole surface of substrate 30, and make conductive layer 50 fill up dual damascene opening 46.
Subsequently, as shown in figure 14, carry out etch-back processing procedure or grinding technique as CMP, the apparent height of conductive layer 50, barrier layer 48 and first curtain layer of hard hood 38 is trimmed, the conductive layers 50 that then remain in the dual damascene opening 46 are used as a dual-damascene structure 50 '.
At last; as shown in figure 15; go up deposition one protective layer 52 in substrate 30 surfaces; its material can be selected SiN or SiC for use; to cover the top of dual-damascene structure 50 '; be used for preventing the oxidative phenomena of dual-damascene structure 50 ', and the atom/ions diffusion that prevents dual-damascene structure 50 ' is to the dielectric layer of follow-up making.
In addition, need, can repeat above-mentioned double-insert process and make other dual-damascene structure according to processing procedure.
Compared to conventional art, the double-insert process of first embodiment of the invention has the following advantages:
First; the first hard light shield 38 and the second hard light shield 40 of metal material can effectively be protected ILD layer 36; to avoid when removing first photoresist layer 42 and second photoresist layer 44, be subjected to the etching of oxygen electricity slurry, and then promote the ability of the filling dual damascene opening 46 of conductive layer 50.
Second; because the present invention can effectively protect ILD layer 36; therefore do not need painstakingly to limit the use material of ILD layer 36; can adopt the organic material of low-k to make ILD layer 36; shorten RC time of delay to reach, reduce the purposes such as interfering frequency between the metal interconnecting, and then can be applicable in the making of next small size chip from generation to generation.
The 3rd, first hard cover screen 38 and first hard cover screen 40 can be used as follow-up deep UV (ultraviolet light) (the deepuitra violet that carries out, the antireflecting coating of micro-photographing process DUV), therefore double-insert process of the present invention does not need to make in addition antireflecting coating, and processing procedure is simplified and the cost of manufacture reduction.
The 4th, in first embodiment of the invention, in ILD layer 36, do not make etching stopping layer, so ILD layer 36 be made as one step, can adopt spin coating processing procedure or CVD processing procedure, so can further simplify fabrication steps, reduce cost of manufacture.
Embodiment 2
In the double-insert process of present embodiment, be on the ILD of low-k layer, to make one deck hard cover screen, and this layer hard cover screen is metal material.
Consult Figure 16-shown in Figure 24, the double-insert process of second embodiment of the invention comprises the steps:
As shown in figure 16, the semiconductor-based end 30, include most plain conductors 32, dielectric separate layer 34, ILD layer 36 and metal hard cover screens 40.The material of metal hard cover screen 40 can be selected metal materials such as Ti, TiN, Ta, TaN, Al or AlCu for use.
As shown in figure 17, definition forms first photoresist layer 42 on hard cover screen 40, in order to the figure of the trench of definition dual damascene opening.
Then, as shown in figure 18, the hard cover screen 40 that is not covered by first photoresist layer 42 is removed,, again first photoresist layer 42 is removed to form most first openings 41.
Subsequently, shown in Figure 19 and 20, form second photoresist layer 44 on the surface of substrate 30, definition forms most second openings 43 on second photoresist layer 44 again, in order to the figure of the interlayer hole of definition dual damascene opening.Wherein, the bore of first opening 41 is opened 043 bore greater than second.
As shown in figure 21, carry out dry ecthing procedure, the ILD layer 36 that is covered by second photoresist layer 44 is removed, until a desired depth, to form most interlayer holes 45, wherein the degree of depth of interlayer hole 45 surpasses half of height of ILD layer 36.
Then, as shown in figure 22, after 44 removals of second photoresist layer, then can make the ILD layer 36 that is not covered expose to the open air out by hard cover screen 40.
Subsequently, as shown in figure 23, carry out dry ecthing procedure, the ILD layer 36 that is not covered by hard cover screen 40 is carried out dry ecthing procedure, until exposing dielectric separate layer 34, then originally the ILD layer 36 around the interlayer hole 45 can be etched into be a trench 47, and the ILD layer 36 of interlayer hole 45 belows can be etched into and is interlayer hole 45 originally.Thus, interlayer hole 45 above each plain conductor 32 and trench 47 constitute a dual damascene opening 46.
Follow-up, as shown in figure 24, the dielectric separate layer 34 of dual damascene opening 46 bottoms is removed, and hard cover screen 40 is removed, then can make the top area of plain conductor 32 expose bottom to the open air at dual damascene opening 46.
Next, can need carry out relevant manufacture of semiconductor with design, in dual damascene opening 46, to make the intraconnections of a dual-damascene structure according to processing procedure.The method shown in Figure 13-15 of embodiment 1 of consulting is made dual-damascene structure 50 '.So do not repeat.
Embodiment 3
In the double-insert process of third embodiment of the invention, be to make double-deck hard cover screen on the ILD of low-k layer, and this double-deck hard cover screen can be metal material, also wherein one deck hard cover screen is a metal material.In addition, be different from embodiment 1 part, be to make in addition in the ILD layer etching stopping layer.
Consult Figure 25-shown in Figure 34, the double-insert process of embodiments of the invention 3 comprises the steps:
As shown in figure 25, semiconductor substrate 30 includes most plain conductors 32, dielectric separate layer 34, one the one ILD layer 361, an etching stopping layer 35, one the 2nd ILD layer 362, first hard cover screen 38 and second hard cover screens 40.The one ILD the layer 361 or material of the 2nd ILD layer 362 can be macromolecular material, as: SOP, FLARE, SILK, Parylene, PAE-11 or the polyimides made via the spin coating processing procedure.The one ILD layer 361 or the material of the 2nd ILD layer 362 also can be and contain SiO
2Inorganic, as the SiO that makes via the spin coating processing procedure
2, FSG, FUG or blackdiamond, Coral, Aurora, GreenDot or other dielectric material made via CVD.The matter of etching stopping layer 35 can be SiO
2, SiC, SiN, SRO or SiON, can be made for the etching end point of trench 47, also can be used as the hard cover screen of making interlayer hole 45.The material of first hard cover screen 38 can be selected metal materials such as Ti, TiN, Ta, TaN, Al or AlCu for use, and the material of second hard cover screen 40 can be selected metal materials such as Ti, TiN, Ta, TaN, Al or AlCu for use, and the material of first hard cover screen 40 also can be selected SiO for use
2, dielectric material such as SiC, SiN, SRO or SiON.
As Figure 26-shown in Figure 29, according to embodiment 1 described method, utilize first photoresist layer 42 and second photoresist layer 44, in second hard cover screen 40, to form most first openings 41, and in first hard cover screen 38, form most second openings 43, wherein the bore of first opening 41 system is greater than the bore of second opening 43.
Then, as shown in figure 30, carry out dry ecthing procedure, earlier the exposed areas of the 2nd ILD layer 362 is removed, in regular turn an etching stopping layer 35 and an ILD layer 361 are removed again,, just can be formed an interlayer hole 45 in each plain conductor 32 top until exposing dielectric separate layer 34.
Then, as shown in figure 31, the exposed areas of first hard cover screen 38 is removed, so that the sidewall of second hard cover screen 40 and first hard cover screen 38 trims.
Follow-up, shown in figure 32, the exposed areas of the 2nd ILD layer 362 is removed, until exposing etching stopping layer 35, just can form most trench 47.Thus, interlayer hole 45 above each plain conductor 32 and trench 47 are to constitute a dual damascene opening 46.
At last, as shown in figure 33, the dielectric separate layer 34 of dual damascene mouth 46 bottoms is removed, and second hard cover screen 40 is removed, then the top area of plain conductor 32 exposes the bottom at dual damascene opening 46 to the open air.
Next, can need carry out relevant manufacture of semiconductor with design according to processing procedure, make dual-damascene structure according to the method for embodiment 1, to make a dual-damascene structure 50 ' in dual damascene opening 46, the result as shown in figure 34.
Though the present invention discloses as above with preferred embodiment, so it is not in order to limiting the present invention, anyly has the knack of this skill person, and without departing from the spirit and scope of the present invention, a little change and the retouching done all belongs within protection scope of the present invention.
Claims (27)
1, a kind of double-insert process that uses metal hard cover screen, it is characterized in that: it comprises the following steps:
(1) provide the semiconductor substrate, it includes, and a conductor structure, a dielectric separate layer are covered on this conductor structure, the dielectric layer of a low-k is formed on this dielectric separate layer;
(2) form one first hard cover screen on this dielectric layer surface, and this first hard cover screen is made of metal material;
(3) form one second hard cover screen on this first hard cover screen surface;
(4) form one first opening in this second hard cover screen, this first opening is positioned at this conductor structure top;
(5) form one second opening in this first hard cover screen, this second opening is positioned at this first opening below, and the bore of this second opening is less than the bore of this first opening;
(6) this dielectric layer that will do not covered by this first hard cover screen is removed, until exposing this dielectric separate layer to the open air, to form an interlayer hole;
(7) this first hard cover screen that will do not covered by this second hard cover screen is removed;
(8) this dielectric layer that will do not covered by this first hard cover screen is removed, and until arriving a desired depth, forms a trench in this interlayer hole top, and this interlayer hole and trench constitute a dual damascene opening.
2, the double-insert process of use metal hard cover screen according to claim 1 is characterized in that: the material of this first hard cover screen is selected one of them of following metal material: Ti, TiN, Ta, TaN, Al or AlCu for use.
3, the double-insert process of use metal hard cover screen according to claim 1 is characterized in that: the material of this second hard cover screen is selected from one of them of following metal material: Ti, TiN, Ta, TaN, Al or AlCu.
4, the double-insert process of use metal hard cover screen according to claim 1 is characterized in that: the material of this second hard cover screen is selected from one of them of following dielectric material: SiO
2, SiC, SiN, SRO or SiON.
5, the double-insert process of use metal hard cover screen according to claim 1 is characterized in that: the material of this dielectric layer is the organic polymer of spin coating processing procedure made.
6, the double-insert process of use metal hard cover screen according to claim 1 is characterized in that: the material of this dielectric layer is the material that contains SiO of chemical vapor deposition process made.
7, the double-insert process of use metal hard cover screen according to claim 1 is characterized in that: also comprise another step: the dielectric separate layer of this dual damascene opening bottom is removed, to expose the top of this conductor structure.
8, the double-insert process of use metal hard cover screen according to claim 7 is characterized in that: also comprise another step: form a conductive layer and fill up this dual damascene opening.
9, the double-insert process of use metal hard cover screen according to claim 8 is characterized in that: also comprise another step: before forming this conductive layer, form a barrier layer in the sidewall and the bottom of this dual damascene opening.
10, a kind of double-insert process that uses metal hard cover screen, it is characterized in that: it comprises the following steps:
(1) provide the semiconductor substrate, it includes, and a conductor structure, a dielectric separate layer are covered on this conductor structure, the dielectric layer of a low-k is formed on this dielectric separate layer;
(2) on this dielectric layer surface, form a hard cover screen, and this hard cover screen is made of metal material;
(3) in this hard cover screen, form one first opening, and this first opening is positioned at the top of this conductor structure;
(4) definition forms a photoresist layer on this hard cover screen, includes one second opening in this photoresist layer, and this second opening is positioned at this first opening, and the bore of this second opening is less than the bore of this first opening;
(5) this dielectric layer that will do not covered by this photoresist layer is removed, until a desired depth, to form an interlayer hole;
(6) this photoresist layer is removed;
(7) this dielectric layer of this interlayer hole below is removed, until exposing this dielectric separate layer, simultaneously the dielectric layer around this interlayer hole is removed, to form a trench, this interlayer hole and trench constitute a dual damascene opening.
11, the double-insert process of use metal hard cover screen according to claim 10 is characterized in that: following any metal material of the optional usefulness of the material of this hard cover screen: the material of this first hard cover screen is selected one of them of following metal material: Ti, TiN, Ta, TaN, Al or AlCu for use.
12, the double-insert process of use metal hard cover screen according to claim 10 is characterized in that: the material of this dielectric layer is the organic polymer of spin coating processing procedure made.
13, the double-insert process of use metal hard cover screen according to claim 10 is characterized in that: the material of this dielectric layer is the material that contains SiO of chemical vapor deposition process made.
14, the double-insert process of use metal hard cover screen according to claim 10 is characterized in that: also comprise another step: the dielectric separate layer of this dual damascene opening bottom is removed, to expose the top of this conductor structure.
15, the double-insert process of use metal hard cover screen according to claim 14 is characterized in that: also comprise another step: form a conductive layer and fill up this dual damascene opening.
16, the double-insert process of use metal hard cover screen according to claim 15 is characterized in that: also comprise another step: form before this conductive layer, form a barrier layer in the sidewall and the bottom of this dual damascene opening.
17, a kind of double-insert process that uses metal hard cover screen is characterized in that: also comprise another step:
(1) provide the semiconductor substrate, it includes, and a conductor structure, a dielectric separate layer are covered on this conductor structure, first dielectric layer of a low-k is formed on this dielectric separate layer, an etching stopping layer is formed on this first dielectric layer, second dielectric layer is formed on this etching stopping layer;
(2) on this second dielectric layer surface, form one first hard cover screen, and this first hard cover screen is made of metal material;
(3) on this first hard cover screen surface, form one second hard cover screen;
(4) in this second hard cover screen, form one first opening, and this first opening is positioned at this conductor structure top;
(5) form one second opening in this first hard cover screen, this second opening is positioned at this first opening below, and the bore of this second opening is less than the bore of this first opening;
(6) this second dielectric layer, this etching stopping layer and this first dielectric layer that will do not covered by this first hard cover screen removed, until exposing this dielectric separate layer to the open air, to form an interlayer hole;
(7) this first hard cover screen that will do not covered by this second hard cover screen is removed;
(8) exposed areas of this first dielectric layer is removed, until exposing this etching stopping layer, formed a trench in this second interlayer layer, this interlayer hole and trench constitute a dual damascene opening.
18, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: the material of this first hard cover screen is selected one of them of following metal material: Ti, TiN, Ta, TaN, Al or AlCu for use.
19, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: the material of this second hard cover screen is selected from one of them of following metal material: Ti, TiN, Ta, TaN, Al or AlCu.
20, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: the material of this second hard cover screen is selected from one of them of following dielectric material: SiO
2, SiC, SiN, SRO or SiON.
21, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: the material of this first dielectric layer is the organic polymer of spin coating processing procedure made.
22, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: the material of this first dielectric layer is the material that contains SiO of chemical vapor deposition process made.
23, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: the material of this second dielectric layer is the organic polymer of spin coating processing procedure made.
24, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: the material of this second dielectric layer is the material that contains SiO of chemical vapor deposition process made.
25, the double-insert process of use metal hard cover screen according to claim 17 is characterized in that: also comprise another step: the dielectric separate layer of this dual damascene opening bottom is removed, to expose the top of this conductor structure.
26, the double-insert process of use metal hard cover screen according to claim 25 is characterized in that: also comprise another step: form a conductive layer and fill up this dual damascene opening.
27, the double-insert process of use metal hard cover screen according to claim 26 is characterized in that: also comprise another step: before forming this conductive layer, form a barrier layer in the sidewall and the bottom of this dual damascene opening.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 01134239 CN1414622A (en) | 2001-10-26 | 2001-10-26 | Double-mosaic process using metal hard cover screen |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 01134239 CN1414622A (en) | 2001-10-26 | 2001-10-26 | Double-mosaic process using metal hard cover screen |
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| CN1414622A true CN1414622A (en) | 2003-04-30 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100403495C (en) * | 2004-08-30 | 2008-07-16 | 联华电子股份有限公司 | Semiconductor manufacturing method and its structure |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100403495C (en) * | 2004-08-30 | 2008-07-16 | 联华电子股份有限公司 | Semiconductor manufacturing method and its structure |
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