CN1382995A - Digital measuring method of frequency and phase - Google Patents

Abstract

The invention relates to the method for measuring frequencies and phases digitally belonging to the technique area for measuring the circuit parameters. Two signals with 90 degrees of the phase difference are obtained by sampling the AC input signal with the help of two sets of pre-processes. Based on the values of the signals, the locked phase data is calculated out. Further, based on the phase locking structure, the measure of the frequency and phase are realized. Taking full advantage of the phase information contained in the signal waveform, the locked phase data can be updated at the sampling speed. Moreover it provides the advantages of increasing the accuracy of discriminating phases, and the speed of tracking the locked phase and reducing the measuring time. When the phase locking is stabilized, the phase can approach the locked phase with zero mean deviation so as to prevent noise interference.

Description

The digital measuring method of a kind of frequency and phase place

Technical field

The present invention relates to the digital measuring method of a kind of frequency and phase place, this method is measured the frequency and the phase data of the ac input signal of a certain frequency based on phase-locked principle, belongs to the circuit parameter measurement technical field.

Background technology

In fields such as communication, household electrical appliances, instrument and meter and automatic control, usually need to measure the frequency of a certain AC signal and phase place at a time thereof.The method of a kind of traditional survey frequency and phase place is based on the phaselocked loop design.With reference to the international standard number be 0070050503 " phaselocked loop: principle, design and use " the digital lock-in technique introduced in a book to AC signal, can obtain as shown in Figure 1 the measuring-signal frequency and the method for phase place.The AC signal u of input handles by the shaping based on the zero passage comparison principle earlier, obtains the square-wave signal u ' of digit pulse form; Digital phase demodulation of signal u ' process and loop filtering are handled and are obtained divider ratio N; The controllable oscillatory signal generation branch that divider ratio N control realizes in the frequency division mode produces counting pulse signal; This count pulse passes through M times of frequency division again, obtains lockin signal; Lockin signal feeds back to digital phase demodulation part, has so just constituted the feedback control loop of phase-locked system.When stable, the divider ratio N that the frequency f of locked signal and loop filtering obtain is inversely proportional to when phase-locked.If this inverse ratio coefficient is G, so can obtain the frequency f of institute's test cross stream signal according to formula f=G/N.On the other hand, if oscillator signal is taken place the counting pulse signal of part generation counts, and the rising edge of basis signal u ' or negative edge, this counting process is carried out zero clearing then can obtain a count value, this count value is changed the phase data that just can obtain AC signal with phase compensation.

Above-mentioned comes with some shortcomings based on the frequency of phaselocked loop realization and the measuring method of phase place.At first, signal is merely able to carry out frequency and phase measurement according to the zero crossing of AC signal through phase-locked again method after the shaping, and the amplitude of not utilizing AC signal itself changes the phase angle information that is comprised, so phaselocked loop reaches locked signal cycle of several times often stable time, the measuring speed of frequency and phase place is slow.Second, asking for the preceding step-by-step counting of phase data needs the rising edge of signal u ' or negative edge to come zero clearing, the measurement of phase place just will rely on the detection to the zero crossing of input exchange signal u, but owing to the bias effect of noise to zero crossing, the precision that zero crossing detects will badly influence the measuring accuracy of phase data.The 3rd, phase-locked stable back oscillator signal take place counting pulse frequency that part produces be the locked signal frequency M doubly, and the change frequency of phase data also depends on the size of M in the one-period, M is big more, the span of phase change is more little, phase measurement is also meticulous more.But M is too big, also will make the bad stability of phase-locked system.The 4th, the number of significant digit of the controlled frequency division data N of input oscillator signal generation part will influence the measuring accuracy of the measured frequency data f of institute, and to increase N, certainly will to increase the frequency that the oscillator signal generating unit is divided required fixed frequency signal source, perhaps need to adopt complicated frequency splitting technology with decimal control bit.At last, the measuring method of said frequencies and phase place is difficult to realize in microprocessor, is unfavorable for designing and applying.

Summary of the invention

The objective of the invention is to propose the digital measuring method of a kind of frequency and phase place, this method also will be based on phase-locked principle design, but wish to overcome the deficiency of the phase-lock technique of above-mentioned traditional survey frequency and phase place, make measuring system can make full use of the information that AC signal wave form varies itself is comprised, the quick lock in measured signal, and rely on signal zero crossing no longer merely and calculate phase place, from improving phase measurement accuracy in essence.In addition, this method will design based on digital signal processing method, control thereby be improved on measuring accuracy and measuring speed and be easy to.At last, this method will help adopting easily the software based on little process chip to be realized.

The frequency that the present invention proposes and the digital measuring method of phase place may further comprise the steps:

1, the ac input signal u (t) that needs survey frequency and phase place is carried out first group of sampling pre-service and second group of sampling pre-service simultaneously, obtain discrete signal u respectively ₁(n) and u ₂(n).If the upper frequency limit of the tested AC signal u (t) of input is f _Max, lower-frequency limit is f _Min, aforesaid two groups of sampling preprocessing process should be selected identical sample frequency, if sample frequency is made as F _s, F then _sShould be greater than 3f _MaxIn addition, these two groups sampling preprocessing process also should satisfy following condition:

The tested AC signal of supposing input is u (t)=U _mSin (2 π ft+ θ), wherein f is the frequency of this AC signal, and satisfies f _Min＜f＜f _Max, θ is the initial phase of this AC signal, then u (t) through first group the sampling pre-service after, gained signal u ₁(n) should have following form: $u_1\left(n\right)=k_1\left(f\right)U_m\sin (2\mathrm{\π}\frac{f}{F_s}n+\mathrm{\θ}+{\mathrm{\θ}}_1\left(f\right))$ And signal u (t) through second group the sampling pre-service after, gained signal u ₂(n) should have following form: $u_2\left(n\right)=k_2\left(f\right)U_m\sin (2\mathrm{\π}\frac{f}{F_s}n+\mathrm{\θ}+{\mathrm{\θ}}_2\left(f\right))$ Gain function k wherein ₁(f), gain function k ₂(f), phase shift function # ₁(f), phase shift function # ₂(f) all be a function relevant, and satisfy following constraint with frequency input signal f:

Following formula is to f _Min＜f＜f _MaxSet up, and under the situation that satisfies the measuring accuracy requirement, can there be certain error in above-mentioned equation.

2, the discrete digital signal u that above-mentioned the 1st step is obtained ₁(n) and u ₂(n) be combined into the coordinate (u of the some A in the Cartesian coordinates that initial point is O ₂(n), u ₁(n)), then thus obtained vector With the angle of transverse axis positive dirction will be in order to as by phase-locked bit data α ₀(n).

3, with above-mentioned the 2nd the step obtain by phase-locked bit data α ₀(n) with feed back from output frequency f (n) and handle through integration and following the 7th step phase hit adjustment after pll phase data α ' (n) get poorly, obtain phase error Δ α (n).

4, the phase error Δ α (n) that above-mentioned the 3rd step is obtained handles through loop filtering, thereby obtains the frequency f (n) of measured signal; In the above-mentioned loop filtering processing procedure, its complex frequency domain transfer function H _LP(s) form is:

Make the transport function of measuring process simultaneously Stable, and make Has the low-pass filtering performance, H ' cut-off frequecy of passband f (s) _LFLower limit f less than the locked signal frequency _Min

5, the pll phase data α ' that the frequency f (n) of above-mentioned the 4th measured signal that obtains of step and following the 7th step are obtained (n) carries out integration according to following formula and adds up: ${\mathrm{\α}}_1\left(n\right)={\mathrm{\α}}^{\′}(n-1)+2\mathrm{\π}\·\frac{f\left(n\right)}{F_s}$ Obtain intermediate phase data α ₁(n).

6, to above-mentioned the 2nd the step obtain by phase-locked bit data α ₀(n) carry out the quadrant transition detection, obtain transition detection data J (n).The judgment threshold constant of this transition detection is made as J _TH, data J _THShould satisfy Constraint, so transition detection data J (n) with by phase-locked position α ₀(n) relation can be according to following formulate:

7, the intermediate phase data α that above-mentioned the 5th step is obtained ₁(n) and above-mentioned the 6th transition detection data J (n) addition that obtains of step, promptly α ' (n)=α ₁(n)+and J (n), thus obtain in order to be input to pll phase data α ' that above-mentioned the 3rd step handle to constitute phase-locked loop (n).

8, the intermediate phase data α that above-mentioned the 6th step is obtained ₁(n) carry out phase compensation and data adjustment and handle, be i.e. α (n)=α ₁(n)-θ ₁(f (n))+K2 π, wherein, function # ₁(f) be first group of phase shift function that the sampling pre-service produces input signal in above-mentioned the 1st step, K is an adjustment coefficient, and its value satisfies the integer of 0≤α (n)＜2 π for making α (n), and the data α that obtains at last (n) is exactly the signal phase of required measurement.

The frequency that the present invention proposes and the digital measuring method of phase place, on basic structure, still utilized principle of PLL, Phase Tracking characteristic by feedback control loop, the 4th pacing in the foregoing invention step measures the frequency of signal, measures the current phase place of signal in last the 8th step of foregoing invention step.But the inventive method no longer adopts the preprocess method of zero passage shaping to input signal, but directly AC signal is sampled, and obtains two signal u of 90 ° of phase phasic differences by two groups of pre-service ₁(n) and u ₂(n), calculate by phase-locked bit data α based on these two signal magnitude then ₀(n).Like this, can make full use of the phase information that signal waveform itself comprises, and can upgrade by phase-locked bit data, thereby improve the analysis precision that phase place is differentiated, also can improve the speed of phase locked track simultaneously, reduce Measuring Time according to sample rate.In addition, the phase place of the inventive method differentiates that link is by to by phase-locked position α ₀(n) and pll phase α ' (n) get that poor mode obtains.So when basicly stable, pll phase can approach by phase-locked position with the zero-mean deviation when phase-locked, this has just fundamentally overcome and has calculated phase place according to zero crossing merely, seriously is subjected to the deficiency of noise, makes phase measurement accuracy improve greatly.Should also be noted that the inventive method at last in the 1st step the treatment step to signal sampling, other processing links can adopt the software mode design to realize.Speed, precision and the stability of controlling whole measuring process by adjustment design parameter and data precision are to be relatively easy to, and can realize this measuring process based on various little process chip easily.

Description of drawings

Fig. 1 is the theory diagram of existing method based on phaselocked loop measuring-signal frequency and phase place.

Fig. 2 is the theory diagram of the digital measuring method of frequency of the present invention and phase place.

Fig. 3 is the input signal squiggle through obtaining after first group of sampling pre-service and second group sampling pre-service respectively in the first embodiment of the invention.

Fig. 4 is the realization block diagram of first embodiment of the invention intermediate ring road Filtering Processing.

Fig. 5 is the amplitude-versus-frequency curve of transfer function H in the first embodiment of the invention ' (s).

Fig. 6 is the phase locked track frequency curve of first embodiment of the invention measuring process.

Fig. 7 is that first embodiment of the invention was at 0～0.4 second interval Phase Tracking curve.

Fig. 8 is that first embodiment of the invention was at 1～1.4 second interval Phase Tracking curve.

Specific implementation method

First embodiment of the digital measuring method of frequency of the present invention and phase place is used for the ac voltage signal about 50Hz is carried out the measurement of frequency and phase place, and the theory diagram of its realization as shown in Figure 2.Concrete treatment step is as follows:

1, to need survey frequency and phase place, the AC signal u (t) of frequency in 45～65Hz scope, at first with sample frequency F _s=1000Hz carries out analog to digital conversion to signal u (t), and further discrete data is carried out first group of phase-shift filtering F1 and handle, and obtains signal u ₁(n), thus finish first group the sampling pre-service; With same sample frequency F _s=1000Hz carries out analog to digital conversion to signal u (t), and further discrete data is carried out second group of phase-shift filtering F2 and handle, and obtains signal u ₂(n), thus finish second group the sampling pre-service.

Above-mentioned first group of low-pass digital filter that phase-shift filtering F1 is an infinite-duration impulse response IIR type, its frequency domain transport property H _F1(e ^{J ω}) have a following form: $H_{F1}\left(e^{\mathrm{j\&omega;}}\right)=\frac{B1\left(1\right)+B1\left(2\right)e^{-\mathrm{j\&omega;}}+B1\left(3\right)e^{-\mathrm{<figure-callout\; id="2"\; label="j"\; filenames="A0211688500142.png,A0211688500152.png"\; state="\{\{state\}\}">j</figure-callout>}2\mathrm{\&omega;}}+B1\left(4\right)e^{-\mathrm{<figure-callout\; id="3"\; label="j"\; filenames="A0211688500152.png"\; state="\{\{state\}\}">j</figure-callout>}3\mathrm{\&omega;}}}{A1\left(1\right)+A1\left(2\right)e^{-\mathrm{j\&omega;}}+A1\left(3\right)e^{-\mathrm{<figure-callout\; id="2"\; label="j"\; filenames="A0211688500142.png,A0211688500152.png"\; state="\{\{state\}\}">j</figure-callout>}2\mathrm{\&omega;}}+B1\left(4\right)e^{-\mathrm{<figure-callout\; id="3"\; label="j"\; filenames="A0211688500152.png"\; state="\{\{state\}\}">j</figure-callout>}3\mathrm{\&omega;}}}$ Concrete coefficient is as follows:

B1＝[-0.081603248，-0.6662151，2.0287446，-1.3020016]

A1＝[1.3020016，-2.0287446，0.6662151，0.081603248]

According to the digital filtering design theory as can be known, digital filtering F1 is a cause and effect, promptly is attainable.And further analyze as can be known that this Filtering Processing is stable.

Above-mentioned second group of low-pass digital filter that phase-shift filtering F2 also is an infinite-duration impulse response IIR type, its frequency domain transport property H _F2(e ^{J ω}) have a following form: $H_{F2}\left(e^{\mathrm{j\&omega;}}\right)=\frac{B2\left(1\right)+B2\left(2\right)e^{-\mathrm{j\&omega;}}+B2\left(3\right)e^{-,2\mathrm{\&omega;}}}{A2\left(1\right)+A2\left(2\right)e^{-\mathrm{j\&omega;}}+A2\left(3\right)e^{-\mathrm{<figure-callout\; id="2"\; label="j"\; filenames="A0211688500142.png,A0211688500152.png"\; state="\{\{state\}\}">j</figure-callout>}2\mathrm{\&omega;}}}$ Concrete coefficient is as follows:

B2＝[-0.37078953，1.2327431，-0.94007795]

A2＝[0.94007795，-1.2327431，0.37078953]

According to the digital filtering design theory as can be known, digital filtering F2 also is a cause and effect, promptly is attainable.And further analyze as can be known that this Filtering Processing is stable.

These two groups of digital filterings amplitude gain in 45～65Hz scope all is 1, and its phase-shift characterisitc differs 90 °.If have sinusoidal ac signal u (t)=sin that an amplitude is 1, frequency is 50Hz (2 π * 50 * t) (volt), to u (t) according to sampling rate F _sThe signal that=1000Hz carries out after the analog to digital conversion is u (n), through obtaining output signal u after aforementioned first group of sampling pre-service ₁(n), simultaneously through obtaining output signal u after aforementioned second group of sampling pre-service ₂(n), u (n), the u in the 100th to 150 sampled point scope then ₁(n) and u ₂(n) actual waveform curve as shown in Figure 3, wherein u (n), u ₁(n) and u ₂(n) u, u1 and u2 in the curve difference corresponding diagram 3.As can be seen from the figure, u on phase relation ₂(n) the just in time leading u of signal ₁(n) signal is 90 °.

2, the discrete digital signal u that above-mentioned the 1st step is obtained ₁(n) and u ₂(n) be combined as the coordinate (u of the some A in the Cartesian coordinates that initial point is O ₂(n), u ₁(n)), then thus obtained vector

With the angle of transverse axis positive dirction will be in order to as by phase-locked bit data α ₀(n).Get among the embodiment-π≤α ₀(n)＜and π, then this processing procedure also can be calculated according to following formula:

3, with above-mentioned the 2nd the step obtain by phase-locked bit data α ₀(n) with feed back from output frequency f (n) and handle through integration and the phase hit adjustment in following the 7th step after the pll phase data α ' that obtains (n) get poorly, obtain phase error Δ α (n), computing formula is:

Δα(n)＝α ₀(n)-α′(n)

4, the Δ α (n) that above-mentioned the 3rd step is obtained handles through loop filtering, obtains the frequency f (n) of locked signal.Can realize this loop filtering processing with reference to the theory structure of Fig. 4.Detailed process is: phase error Δ α (n) obtains y through after the integral element ₁(n); Simultaneously, phase error Δ α (n) also obtains y through the proportional delay link ₂(n); To y ₁(n) and y ₂(n) sue for peace and obtain y (n), be i.e. y (n)=y ₁(n)+y ₂(n); Y (n) needing to obtain the signal frequency f (n) of measurement again through first order inertial loop.

Wherein, the computing formula of integral element is:

y ₁(n)=y ₁(n-1)+0.0362666 Δ α (n) thus, the complex frequency domain transport function form of integral element can approximate expression be: $H_1\left(s\right)=\frac{36.2666}{s}$ The computing formula of proportional delay link is:

y ₂(n)=0.804868y ₂(n-1)+0.708540 the complex frequency domain transport function of Δ α (n) proportional delay link is approximately: $H_2\left(s\right)=\frac{880.3179}{s+242.4401}$ The computing formula of inertial element is:

The complex frequency domain transport function formal approximation of f (n)=0.932642f (n-1)+0.067358y (n) inertial element is: $H_3\left(s\right)=\frac{f\left(s\right)}{y\left(s\right)}=\frac{1}{0.013846s+1}$

So, the complex frequency domain transfer function H of whole loop filtering processing section _LP(s) form is: $H_{\mathrm{LP}}\left(s\right)=(H_1\left(s\right)+H_2\left(s\right))\&CenterDot;H_3\left(s\right)=\frac{66198.5\&CenterDot;s+635019}{s({\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="A0211688500142.png,A0211688500152.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+314.668\&CenterDot;s+17509.8)}$ So, have: $H_0\left(s\right)=H_{\mathrm{LP}}\left(s\right)\&CenterDot;s=\frac{66198.5\&CenterDot;s+635019}{{\mathrm{<figure-callout\; id="2"\; label="s"\; filenames="A0211688500142.png,A0211688500152.png"\; state="\{\{state\}\}">s</figure-callout>}}^2+314.668\&CenterDot;s+17509.8}$

The transport property of the phase-locked system that calculates thus, is: $H\left(s\right)=\frac{s\&CenterDot;H_0\left(s\right)}{s^2+2\mathrm{\&pi;}{H}_0\left(s\right)}=\frac{{66198.5\&CenterDot;s}^2+635019\&CenterDot;s}{s^4+314.668\&CenterDot;s^3+17509.8\&CenterDot;s^2+415937\&CenterDot;s+3989940}$ Four limits of H (s) are successively :-251.334 ,-25.1324 and-19.1008 ± j16.3345.According to control theory as can be known, this phase-locked system H (s) is stable.So, transfer function H ' (s) be: $H^{\&prime;}\left(s\right)=\frac{H_0\left(s\right)}{s^2+2\mathrm{\&pi;}\&CenterDot;H_0\left(s\right)}=\frac{66198.5\&CenterDot;s+635019}{{\mathrm{<figure-callout\; id="4"\; label="s"\; filenames="A0211688500152.png"\; state="\{\{state\}\}">s</figure-callout>}}^4+314.668\&CenterDot;s^3+17509.8\&CenterDot;s^2+415937\&CenterDot;s+3989940}$ H ' amplitude-versus-frequency curve (s) as shown in Figure 5, its horizontal ordinate is a logarithmic coordinate system.By H ' amplitude versus frequency characte (s) as seen, H ' (s) has a low-frequency filter characteristics, greater than H ' amplitude versus frequency characte (s) after the 20Hz just drop to-below the 35dB.

5, the pll phase data α ' that the frequency f (n) of above-mentioned the 4th measured signal that obtains of step and following the 7th step are obtained (n) carries out integration according to following formula and adds up:

α ₁(n)=α ' (n-1)+0.002 π f (n) obtain intermediate phase data α ₁(n).

6, to above-mentioned the 2nd the step obtain by phase-locked bit data α ₀(n) carry out the quadrant transition detection, obtain transition detection data J (n).The judgment threshold constant of setting transition detection is J _TH=4, because f _MaxSo=65Hz is data J _THSatisfy

The computing formula of transition detection data J (n) is:

7, the intermediate phase data α that above-mentioned the 5th step is obtained ₁(n) and above-mentioned the 6th transition detection data J (n) addition that obtains of step, promptly α ' (n)=α ₁(n)+and J (n), thus obtain in order to be input to pll phase data α ' that above-mentioned the 3rd step constitutes phase-locked loop (n).

8, the intermediate phase data α that above-mentioned the 6th step is obtained ₁(n) carrying out phase compensation and data adjustment handles.In above-mentioned the 1st step, first group of sampling pre-service can be calculated (unit: radian) with following approximate formula to the phase shift function that input signal produces

θ ₁(f)＝0.822384-0.0574974·f+0.000256414·f ²

(45≤f≤65) so, the tested phase place of output (unit: radian) be:

α (n)=α ₁(n)-θ ₁(f (n))+K2 π wherein, K is one and adjusts coefficient that its value satisfies the integer of 0≤α (n)＜2 π for making α (n).

Adopt first embodiment of the invention one input signal to be carried out the measurement of frequency and phase place.Input signal was that a frequency is that 50Hz, fundamental voltage amplitude are 1 volt sinusoidal ac signal u (t) in 0～1 second, and after one second, the frequency hopping of this input signal is to 55Hz, and its fundamental voltage amplitude still is 1 volt.In addition, this signal includes 2～20 times harmonic wave and noise all the time in 0～2 second, and the amplitude of second harmonic reaches 0.2 volt.The embodiment of the invention to the frequency-tracking curve of input signal as shown in Figure 6, locked through 0.4 second temporal frequency in 0～2 second substantially.After the locking, the frequency data f (n) of output still has certain fluctuation, and this is because harmonic wave and caused by noise.But by the amplitude that fluctuates as seen: this measuring system has had stronger inhibiting effect to harmonic wave and noise.In addition, Fig. 7 has provided the Phase Tracking curve of embodiment in 0～0.4 second time period; Fig. 8 has provided the Phase Tracking curve of embodiment in 1～1.4 second time period.

Second embodiment of the digital measuring method of frequency of the present invention and phase place is used for measuring the frequency and the phase place of A phase voltage signal at three phase network.

The A phase voltage of supposing three phase network is:

u _A(t)=U _mSin (2 π ft+ ) wherein is the initial phase of A phase voltage.Then the voltage of B phase, C phase is respectively:

u _B(t)＝U _msin(2πft-120°+)

u _C(t)=U _mSin (2 π ft+120 °+) CB line voltage is:

u _CB(t)=u _C(t)-u _B(t) As seen, CB line voltage signal u _CB(t) leading A phase voltage signal u _A(t) phase place is 90 °.

Go on foot in the processing in the 1st of second embodiment of the invention, at first A phase voltage u importing _A(t) with frequency F _s=1000Hz samples, and directly obtains first group of sampling pre-service output: Second group of sampling pre-service then utilized the phase-shift characterisitc of electrical network to three-phase voltage itself.Concrete steps are: at first to C phase, the B line voltage between mutually according to frequency F _s=1000Hz samples, and obtains signal u _CB(n), calculate according to following formula then:

The 2nd～7 step subsequently is identical with first embodiment, repeats no more.In the 8th step of second embodiment, the phase shift function of being got is θ ₁(f)=0, then according to formula α (n)=α ₁(n)-θ ₁(f (n))+K2 π calculates the phase place of the A phase voltage signal of being surveyed.By frequency and the phase place of measuring the A phase voltage, also just can further obtain mains frequency and B, C phase place mutually.

Claims (1)

1, the digital measuring method of a kind of frequency and phase place is characterized in that this method comprises the steps:

(1) establishing the ac input signal that needs survey frequency and phase place is u (t)=U _mSin (2 π ft+ θ) carries out first group of sampling pre-service and second group of sampling pre-service simultaneously to this signal, obtains discrete signal respectively $u_1\left(n\right)=k_1\left(f\right)U_m\sin (2\mathrm{\&pi;}\frac{f}{F_s}n+\mathrm{\&theta;}+{\mathrm{\&theta;}}_1\left(f\right))u_2\left(n\right)=k_2\left(f\right)U_m\sin (2\mathrm{\&pi;}\frac{f}{F_s}n+\mathrm{\&theta;}+{\mathrm{\&theta;}}_2\left(f\right));$

Wherein f is the frequency of this AC signal, and satisfies f _Min＜f＜f _Max, θ is the initial phase of this AC signal, gain function k ₁(f), gain function k ₂(f), phase shift function # ₁(f), phase shift function # ₂(f) be the arbitrary function that satisfy following relational expression relevant with frequency input signal f:

(2) the discrete digital signal u that above-mentioned (1) step is obtained ₁(n) and u ₂(n) be combined into the coordinate (u that initial point is the Cartesian coordinates mid point A of O ₂(n), u ₁(n)), thus obtained vector With the angle of transverse axis positive dirction as by phase-locked bit data α ₀(n);

(3) with above-mentioned (2) step obtain by phase-locked bit data α ₀(n) with feed back from output frequency f (n) and pll phase data α ' after integration and the phase hit adjustment in following (7) step are handled (n) gets poorly, obtain phase error Δ α (n);

(4) the phase error Δ α (n) that above-mentioned (3) step is obtained handles through loop filtering, thereby obtains the frequency f (n) of measured signal; In the above-mentioned loop filtering processing procedure, its complex frequency domain transfer function H _LP(s) form is:

Make the transport function of measuring process simultaneously

Stable, and make Has the low-pass filtering performance, H ' cut-off frequecy of passband f (s) _LFLower limit f less than the locked signal frequency _Min

(5) the pll phase data α ' that the frequency f (n) of above-mentioned (4) measured signal that obtains of step and following (7) step are obtained (n) carries out integration according to following formula and adds up, and obtains intermediate phase data α ₁(n): ${\mathrm{\&alpha;}}_1\left(n\right)={\mathrm{\&alpha;}}^{\&prime;}(n-1)+2\mathrm{\&pi;}\&CenterDot;\frac{f\left(n\right)}{F_s}$

(6) to above-mentioned (2) step obtain by phase-locked bit data α ₀(n) carry out the quadrant transition detection, obtain transition detection data J (n), the judgment threshold constant of this transition detection is made as J _TH, constant J _THSatisfy

So transition detection data J (n) with by phase-locked position α ₀(n) relation table is shown:

(7) the intermediate phase data α that above-mentioned (5) step is obtained ₁(n) with above-mentioned (6) transition detection data J (n) addition that obtains of step, promptly α ' (n)=α ₁(n)+and J (n), be entered into above-mentioned (3) step to handle (n) with the pll phase data α ' that constitutes phase-locked loop;

(8) the intermediate phase data α that above-mentioned (6) step is obtained ₁(n) carry out phase compensation and data adjustment and handle, obtain signal phase α (the n)=α of required measurement ₁(n)-θ ₁(f (n))+K2 π, wherein, function # ₁(f) in above-mentioned (1) step input signal being carried out the phase shift function that first group of sampling produces after the pre-service, K is for adjusting coefficient, and its value satisfies the integer of 0≤α (n)＜2 π for making α (n).

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