Background technology:
Synchronous rectification is the key technology of low-voltage, high-current DC/DC converter, secondary (secondary) at the DC/DC converter, adopt synchronous rectification MOS transistor (MOSFET) to replace Schottky (Schottky) diode to carry out rectification, can effectively reduce on-state loss.But for the rectifying tube SR1 and the continued flow tube SR2 of synchronous rectification MOS transistor, its gate pole needs corresponding drive circuit to encourage, and driving pulse must satisfy: SR1 conducting during (1) rectification, and SR2 turn-offs; SR2 conducting during afterflow, SR1 turn-offs; (2) SR1 and SR2 can not be in conducting state simultaneously; Can in time turn-off continued flow tube SR2 when (3) converter is out-of-work, avoid reverse-conducting.
Existing drive circuit or can not satisfy above three requirements fully perhaps only can meet the demands substantially but controls complicatedly, and cost is higher.
Existing a kind of synchronous rectification driving circuit as shown in Figure 1a at present, its main signal waveform is shown in Fig. 1 b, synchronous rectification driving circuit is made up of PWM drive signal GT, isolated drive circuit, delay driving circuit and diode Da, resistance R a, low-power transistor Sa, and SR2 drives to continued flow tube.Its principle is: at t1 constantly, GT is a high level, makes the Sa conducting by isolated drive circuit, and with the gate charge release of SR2, SR2 turn-offs; Through delay driving circuit, at t2 constantly, power MOS pipe (abbreviation power tube) S conducting, rectifying tube SR1 conducting; At t3 constantly, power tube S turn-offs, SR1 turn-offs, and the parasitic diode conducting afterflow of SR2 is because the polarity of voltage of transformer T1 secondary winding Ns is negative for just going up down at this moment, positive voltage is added on the SR2 gate pole by Da, Ra, make the SR2 conducting, because the gate pole of SR2 does not have other discharge loop except that being connected with Sa, SR2 will continue conducting, become high level up to GT; Therefore above process can satisfy: SR1 conducting during (1) rectification, and SR2 turn-offs; SR2 conducting during afterflow, SR1 turn-offs; (2) SR1 and SR2 can not be in conducting state simultaneously.Therefore owing to the effect of synchronous rectification, the efficient of converter is higher.
But simultaneous problem is: at the out-of-work t4 of converter constantly, GT is a low level, power tube S turn-offs, SR1 turn-offs, the parasitic diode conducting afterflow of SR2, this moment, the polarity of voltage of transformer T1 secondary winding Ns was negative for just going up down, positive voltage passes through Da, Ra is added on the SR2 gate pole, make the SR2 conducting, back GT is low level always because converter quits work, Sa can't conducting discharges the gate charge of SR2, SR2 is with conducting always, the electric charge that afterflow finishes on the output capacitor C of back will pass through inductance L, SR2 releases, electric current flows through source electrode by the drain electrode of SR2, opposite with normal freewheel current direction, because inductance L, impedance on the SR2 loop is often less, vent discharge fails to be convened for lack of a quorum very big, SR2 is caused very big current stress, simultaneously inductance L also can form vibration with capacitor C, at output formation negative voltage, the have polar capacitor and the load of output is caused damage, when output zero load or underloading, because load impedance is relatively large, flows through inductance L, the electric current of SR2 is also relatively large, and this problem can be more serious.By the same token, adopt the DC/DC converter of this synchronous rectification driving circuit also can't be applied in the occasion that requires output directly in parallel.Therefore above process can't satisfy the 3rd requirement, will in time turn-off SR2 when converter is out-of-work that is:, avoids reverse-conducting.
Summary of the invention:
Purpose of the present invention is exactly in order to overcome the above problems, and a kind of DC/DC transducer synchronous rectification drive circuit and driving method are provided, and effectively avoids the continued flow tube reverse-conducting simply, efficiently, at low cost.
For achieving the above object, the present invention proposes a kind of DC/DC transducer synchronous rectification drive circuit and driving method, be used for the DC/DC converter that adopts the synchronous rectification MOS transistor to carry out rectification at secondary, to the driving of the gate pole of the rectifying tube of its synchronous rectification MOS transistor and continued flow tube.
Described DC/DC transducer synchronous rectification drive circuit comprises that PWM drive signal (GT) produces circuit and pulse synchronous signal (SYNC) produces circuit, described PWM drive signal (GT) is used to trigger turning on and off of rectifying tube (SR1), described pulse synchronous signal (SYNC) is used to trigger the shutoff of continued flow tube (SR2), and its forward position is ahead of the forward position of PWM drive signal (GT).
The feature of described DC/DC transducer synchronous rectification driving method is: during the converter operate as normal, in each switch periods, in PWM drive signal (GT) before, at first send a pulse synchronous signal (SYNC); Described PWM drive signal (GT) is used to trigger turning on and off of rectifying tube (SR1), described pulse synchronous signal (SYNC) is used to trigger the shutoff of continued flow tube (SR2), and the forward position of described pulse synchronous signal (SYNC) is ahead of the forward position of PWM drive signal (GT); After converter quits work, described pulse synchronous signal (SYNC) still can continue to send at least one pulse, and the pulse that continues to send has at least one to be to send in the time less than a switch periods, so that the continued flow tube (SR2) of synchronous rectification MOS transistor is turn-offed.
Since adopted above scheme, edge after the PWM drive signal, rectifying tube turn-offs, and continued flow tube begins conducting; Arrive prior to the forward position of PWM drive signal in the forward position of pulse synchronous signal, this moment, continued flow tube began to turn-off; Continued flow tube closes has no progeny, and arrive in the forward position of PWM drive signal, the rectifying tube conducting.Can satisfy like this: rectifying tube conducting during (1) rectification, continued flow tube turn-offs; Continued flow tube conducting during afterflow, rectifying tube turn-offs; (2) rectifying tube and continued flow tube can not be in conducting state simultaneously.And in the out-of-work moment of converter, the PWM drive signal is a low level, and rectifying tube turn-offs, the continued flow tube conducting, but not conducting always of continued flow tube when pulse synchronous signal arrives, can turn-off continued flow tube, up to shutoff fully.Be carved into the moment that continued flow tube turn-offs fully when out-of-work from converter, the time interval is less than a switch periods, the time that electric charge on the output capacitor is released by inductance, continued flow tube is very short, leakage current is very little, more can not form negative voltage at output, therefore above process can satisfy: (3) can in time turn-off continued flow tube when converter is out-of-work, avoid reverse-conducting.This circuit and method increase circuit cost hardly, and be simple, efficient.
Embodiment:
Also the present invention is described in further detail in conjunction with the accompanying drawings below by specific embodiment.
Fig. 2-the 7th, several exemplary embodiments of the present invention, in each example, the rectifying part of converter comprises rectifying tube SR1 and continued flow tube SR2, wherein, described synchronous rectification driving circuit is formed with the synchronous pulse synchronous signal SYNC of PWM drive signal GT, isolated drive circuit and diode Da, resistance R a, resistance R b, low-power transistor Sa by one.The output of described pulse synchronous signal SYNC is connected with the input of described isolated drive circuit, the output of described isolated drive circuit is connected with the gate pole of described Sa, the negative electrode of described diode Da is connected with the gate pole of described continued flow tube SR2 by resistance R a, and the drain electrode of small-power MOS transistor Sa is connected with the gate pole of continued flow tube SR2 by resistance R b.
Wherein, described isolated drive circuit can adopt multiple isolated drive circuit commonly used, and two examples wherein are respectively shown in Fig. 3 a, Fig. 3 b.
A kind of isolated drive circuit that Fig. 3 a represents is by small-power MOS transistor Sb, pulse transformer Tb, resistance R 1, resistance R 2, resistance R 3 is formed, the gate pole of small-power MOS transistor Sb is connected with described pulse synchronous signal SYNC by resistance R 1, resistance R 2 is connected in parallel between the gate pole and source electrode of small-power MOS transistor Sb, the negative pole end of the former limit winding Npb of pulse transformer Tb is connected with the drain electrode of small-power MOS transistor Sb, the positive terminal of Npb is connected with accessory power supply VCC, resistance R 3 is in parallel with secondary winding Nsb, the positive terminal of secondary winding Nsb is connected with the gate pole of described small-power MOS transistor Sa, and the negative pole end of Nsb is connected with the source electrode of described small-power MOS transistor Sa.
A kind of isolated drive circuit that Fig. 3 b represents is made up of pulse transformer Td, resistance R d, capacitor C d, the end of capacitor C d is connected with described pulse synchronous signal SYNC, the other end is connected with the positive terminal of the former limit winding Npd of pulse transformer Td, the negative pole end of Npd and former limit are altogether, resistance R d is in parallel with secondary winding Nsb, the positive terminal of secondary winding Nsd is connected with the gate pole of described small-power MOS transistor Sa, and the negative pole end of Nsd is connected with the source electrode of described small-power MOS transistor Sa.
According to the difference on the former limit of converter, the present invention can use in the multiple different circuit topology, lists several examples below respectively:
Among Fig. 2, described DC/DC converter is three winding degaussing forward converters (it has three winding Nc, Np, Ns), the negative pole end of winding Np links to each other with the drain electrode of power MOS pipe S, the output of described pulse synchronous signal SYNC is connected with the input of described isolated drive circuit, and the output of described isolated drive circuit is connected with the gate pole of described small-power MOS transistor Sa.The anode of described diode Da is connected with the negative terminal of winding Ns and the drain electrode of rectifying tube SR1, and its negative electrode is connected with the gate pole of described continued flow tube SR2 by resistance R a, and the drain electrode of small-power MOS transistor Sa is connected with the gate pole of continued flow tube SR2 by resistance R b.
Among Fig. 4, described DC/DC converter is a resonance clamp forward converter, link to each other with the drain electrode of power MOS pipe S after winding Np and the capacitor C c parallel connection, the output of described pulse synchronous signal SYNC is connected with the input of described isolated drive circuit, and the output of described isolated drive circuit is connected with the gate pole of described small-power MOS transistor Sa.Wherein, link to each other with the drain electrode of power MOS pipe S after winding Np and the capacitor C c parallel connection.
Among Fig. 5, described DC/DC converter is the two forward converters of diode clamp, the positive terminal of winding Np links to each other with the source electrode of power MOS pipe S1, the negative pole end of winding Np links to each other with the drain electrode of power MOS pipe S2, the anode of diode D1 is connected with the negative pole end of winding Np, negative electrode is connected with the drain electrode of power MOS pipe S1, the negative electrode of diode D2 is connected with the positive terminal of winding Np, anode is connected with the source electrode of power MOS pipe S2, the output of described pulse synchronous signal SYNC is connected with the input of described isolated drive circuit, and the output of described isolated drive circuit is connected with the gate pole of described small-power MOS transistor Sa.Wherein, the positive terminal of winding Np links to each other with the source electrode of power MOS pipe S1, the negative pole end of winding Np links to each other with the drain electrode of power MOS pipe S2, the anode of diode D1 is connected with the negative pole end of winding Np, negative electrode is connected with the drain electrode of power MOS pipe S1, the negative electrode of diode D2 is connected with the positive terminal of winding Np, and anode is connected with the source electrode of power MOS pipe S2.
Among Fig. 6, described DC/DC converter is the two forward converters of resonance clamp, the positive terminal of winding Np links to each other with the source electrode of power MOS pipe S1, the negative pole end of winding Np links to each other with the drain electrode of power MOS pipe S2, capacitor C c is in parallel with winding Np, the output of described pulse synchronous signal SYNC is connected with the input of described isolated drive circuit, and the output of described isolated drive circuit is connected with the gate pole of described small-power MOS transistor Sa.Wherein, the positive terminal of winding Np links to each other with the source electrode of power MOS pipe S1, and the negative pole end of winding Np links to each other with the drain electrode of power MOS pipe S2, and capacitor C c is in parallel with winding Np.
According to the difference of converter secondary, the present invention provides two examples below also applicable to multiple situation:
Among Fig. 2, the secondary synchronous rectification circuit of described DC/DC converter is direct self-driven circuit, the gate pole of rectifying tube SR1 is connected with the drain electrode of the positive terminal of Ns and continued flow tube SR2, the source electrode of rectifying tube SR1 is connected with the source electrode of continued flow tube SR2, the anode of described diode Da is connected with the negative terminal of winding Ns and the drain electrode of rectifying tube SR1, and its negative electrode is connected with the gate pole of described continued flow tube SR2 by resistance R a.
Among Fig. 7, the secondary synchronous rectification circuit of described DC/DC converter is a winding drive circuit, the source electrode of rectifying tube SR1 is connected with the positive terminal of winding Ns and the negative pole end of driving winding N1, the gate pole of rectifying tube SR1 is connected with the positive terminal that drives winding N1, the source electrode of continued flow tube SR2 is connected with the negative pole end of winding Ns and the positive terminal of driving winding N2, the drain electrode of rectifying tube SR1 is connected with the drain electrode of continued flow tube SR2, the anode of described diode Da is connected with the negative pole end that drives winding N2, and its negative electrode is connected with the gate pole of described continued flow tube SR2 by resistance R a.Wherein, the source electrode of rectifying tube SR1 is connected with the positive terminal of winding Ns and the negative pole end of driving winding N1, the gate pole of rectifying tube SR1 is connected with the positive terminal that drives winding N1 by resistance R 11, the source electrode of continued flow tube SR2 is connected with the negative pole end of winding Ns and the positive terminal of driving winding N2, the drain electrode of rectifying tube SR1 is connected with the drain electrode of continued flow tube SR2, the anode of described diode Da is connected with the negative pole end that drives winding N2, and its negative electrode is connected with the gate pole of described continued flow tube SR2 by resistance R a.
(other situations are slightly different for the exemplary operation oscillogram of converter when Fig. 8 represents employing shown in Figure 7 synchronous rectification driving circuit of the present invention, no longer describe in detail), at t1 constantly, the PWM drive signal GT of power MOS pipe S is low by hypermutation, the secondary winding Ns reversing of transformer, synchronous rectification MOS transistor SR1 turn-offs, and SR2 begins conducting, to the t2 complete conducting of SR2 constantly; At t3 constantly, pulse synchronous signal SYNC arrives, and synchronous rectification MOS transistor SR2 begins to turn-off, and turn-offs fully to t4 moment SR2, and at t4 constantly, the PWM drive signal GT of power MOS pipe S is by the low height, synchronous rectification MOS transistor SR1 conducting of becoming; Therefore above process can satisfy:
(1) synchronous rectification MOS transistor SR1 conducting during rectification, SR2 turn-offs; SR2 conducting during afterflow, SR1 turn-offs;
(2) synchronous rectification MOS transistor SR1 and SR2 can not be in conducting state simultaneously;
Therefore owing to the effect of synchronous rectification, the efficient of converter is higher.
At the out-of-work t5 of converter constantly, the PWM drive signal GT of power MOS pipe S is low, synchronous rectification MOS transistor SR1 turn-offs, the SR2 conducting, to t6 constantly, pulse synchronous signal SYNC arrives, synchronous rectification MOS transistor SR2 begins to turn-off, and turn-offs fully to t7 moment SR2, is carved into the t7 moment that SR2 turn-offs fully during from the out-of-work t5 of converter, the time interval is less than a switch periods, electric charge on the output capacitor C passes through inductance L, the time that SR2 releases is very short, and leakage current is very little, more can not form negative voltage at output, therefore above process can satisfy the 3rd requirement, that is:
Can in time turn-off synchronous rectification MOS transistor SR2 when converter is out-of-work, avoid reverse-conducting.
In order to simplify circuit, described pulse synchronous signal SYNC generally can be by integrated pwm chip output, pulse synchronous signal SYNC is a burst pulse, come from the timing vibration RAMP ripple of PWM controller, and sequential relationship (seeing SYNC signal and GT signal among Fig. 8) is accurately arranged with the PWM drive signal GT of power MOS pipe S.Concrete sequential is: the forward position of SYNC is ahead of the forward position of GT.Specific to Fig. 8, be exactly the rising edge t3 rising edge t4 constantly that must be ahead of the GT signal constantly of SYNC signal, when guaranteeing rectification before synchronous rectification MOS transistor SR1 conducting, SR2 is reliable turn-off, but the cycle of SYNC and pulsewidth might not want strictness as shown in Figure 8, cycle such as it is the integral multiple of GT, or its pulsewidth and Fig. 8 signal is slightly variant etc., does not influence effect of the present invention.The time interval of regulating t3~t4 can influence the efficient of converter.T3~t4 time interval, SR2 turn-offed too early when excessive, and converter is by the parasitic diode afterflow of SR2, and on-state loss increases; T3~t4 time interval, SR2 turn-offed evening when too small, formed circulation by SR1, SR2, and turn-on consumption increases.For switching frequency is the converter of 250kHz, and the recommendation of t3~t4 is: about 80nS.
The synchronous rectification driving circuit of patent disclosure of the present invention is confirmed by experiment, described circuit is used in the input of 36~75V direct current, 3.3V/35A in the DC/DC power supply of direct current output, (adopting resonance clamp forward converter), power stage efficient reaches more than 90%, can avoid reverse-conducting when converter is out-of-work, and the output of converter can be directly in parallel.
More than describe the present invention by embodiment, but the present invention is not limited thereto, and is all in improvement or the replacement done without prejudice to spirit of the present invention and content, should be regarded as belonging to protection scope of the present invention.