CN1377088A - ESD Protection Circuits for Integrated Circuits - Google Patents
ESD Protection Circuits for Integrated Circuits Download PDFInfo
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- CN1377088A CN1377088A CN 01110177 CN01110177A CN1377088A CN 1377088 A CN1377088 A CN 1377088A CN 01110177 CN01110177 CN 01110177 CN 01110177 A CN01110177 A CN 01110177A CN 1377088 A CN1377088 A CN 1377088A
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- weld pad
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- 230000001681 protective effect Effects 0.000 claims description 52
- 230000003068 static effect Effects 0.000 claims description 23
- 238000005516 engineering process Methods 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 3
- 238000005421 electrostatic potential Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 239000002784 hot electron Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
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Abstract
本发明提供一种集成电路的静电保护电路,用以防止内部电路受到静电袭击。其内部电路经过一焊垫接收或输出信号,此电路包括第一、第二晶体管及一分压电路。第一晶体管的漏极连接焊垫。第二晶体管的漏极连接第一晶体管的源极,而源极则与栅极相连并同时连接至供应电压端。分压电路连接于焊垫与供应电压端之间,并与第一晶体管栅极连接,在焊垫受静电袭击时,提供一偏压至第一晶体管栅极,使第一晶体管导通。
The present invention provides an electrostatic protection circuit for an integrated circuit, which is used to prevent an internal circuit from being attacked by electrostatics. The internal circuit receives or outputs a signal through a pad, and the circuit includes a first transistor, a second transistor and a voltage divider circuit. The drain of the first transistor is connected to the pad. The drain of the second transistor is connected to the source of the first transistor, and the source is connected to the gate and connected to the supply voltage terminal at the same time. The voltage divider circuit is connected between the pad and the supply voltage terminal, and is connected to the gate of the first transistor. When the pad is attacked by electrostatics, a bias voltage is provided to the gate of the first transistor to turn on the first transistor.
Description
The present invention relates to a kind of electrostatic discharge protective circuit of integrated circuit, particularly about a kind of when weld pad (pad) is subjected to static and attacks, the electrostatic discharge protective circuit with higher electrostatic discharge capacity.
Along with the volume of ultra-large integrated VLSI circuit constantly dwindles, the manufacturer of VLSI circuit is for the compression principle of the long-pending body of coincident circuit and increase properties of product, also constantly produces the semiconductor device with thinner grid oxic horizon.Therefore, make the thickness of grid oxide layer in the semiconductor device constantly dwindle.In half micron of the degree of depth (half micrometer) technology, thickness of grid oxide layer can be accomplished about 60 at present.With this understanding, if add the electric field of a 7MV/cm size, wear (Tunneling) just produce electric current and can occur because of FN at grid oxic horizon.So this kind semiconductor device can't tolerate and continue to occur being higher than 7MV/cm size electric field for a long time on grid oxic horizon.Therefore, for the problem that this kind semiconductor device grid oxic horizon produce to be damaged, institute's biasing maximum can not surpass 4.2V (60 * 7MV/cm) on grid oxic horizon.If take into account producing blemishes in the manufacture process, the maximum bias value that can use also will reduce again again.
The use thin grid oxide layer also can cause other problem, especially to I/O unit and electrostatic discharge protective circuit.To some core circuit, as microprocessor, its volume is constantly reducing, and its speed is also come soon than peripheral unit.Required supply voltage is also more and more little in little processing procedure.And the I/O unit uses the supply magnitude of voltage all big than the employed supply magnitude of voltage of microprocessor.Therefore, under all identical situation of the thickness of grid oxide layer in the semiconductor device, but in some circuit, must operate in and be higher than under the supply voltage magnitude of voltage, can cause the problem of grid oxic horizon on reliability.
Therefore, take place, constantly have new electrostatic discharge protective circuit to occur successively for fear of the problems referred to above.As in No. 5532178, the United States Patent (USP) electrostatic discharge protective circuit is proposed; it has used a undoped polycrystalline silicon grid as the static discharge transistor; and it can be tolerated than supplying also high-voltage value of voltage; but on technology, need extra light shield; and wayward because of the undoped polycrystalline silicon grid, cause the Vt value unstable.In No. 5696397, United States Patent (USP), also proposed the parasitic MOS (metal-oxide-semiconductor) transistor of a kind of use (parasitic MOS transistor) electrostatic discharge protective circuit in addition, but double amplitude (full swing) can't have been arranged.Moreover, in United States Patent (USP) 5495185, propose a kind of use depletion MOS electrostatic discharge protective circuit, but on technology, also needed extra light shield and step just can finish.
In addition, the circuit diagram of the electrostatic discharge protective circuit 10 in the known technology as shown in Figure 1.Comprising a weld pad (pad) 11 and two transistor 13,15.This electrostatic discharge protective circuit is to be connected to an internal circuit 17 to suffer static damage to prevent it.The drain electrode of transistor 13 is connected to weld pad 11 and its grid is connected to voltage end Vdd.The drain electrode of transistor 15 is connected to the source electrode of transistor 13, and its grid links to each other with source electrode and is connected to voltage end Vss simultaneously.
But above-mentioned electrostatic discharge protective circuit has following shortcoming.When static attacks and voltage end Vdd when being in floating, transistor 13 is in closed condition, and the source electrode of transistor 13 can cause the beta gain of side npn poorer to the long distance between the drain electrode of transistor 15, and has reduced the ability of static discharge.In addition, under identical situation, promptly attack and voltage end Vdd when being in floating when static, the drain electrode of transistor 15 also is in floating, cause draining of transistor 15 and do not flow through to not having net current between source electrode, make transistor 15 that hot electron can't take place and quicken collapse (hot electron accelerate avalanche breakdown) phenomenon, cause it to have a high breakdown voltage, reduce its electrostatic discharge capacity.
In order to overcome the deficiencies in the prior art; purpose provided by the invention is to provide a kind of electrostatic discharge protective circuit; it is the improvement of foregoing circuit; when attacking, static can on the grid of transistor 13, keep a bias voltage; make transistor 13 conductings, and eliminate the phenomenon that electrostatic discharge capacity that above-mentioned reason causes reduces.
The invention provides a kind of integrated circuit electrostatic discharge protective circuit, in order to prevent that an internal circuit is subjected to static and attacks.Wherein, internal circuit receives or output signal through a weld pad, and this electrostatic discharge protective circuit comprises first, second transistor and a bleeder circuit.The drain electrode of the first transistor is connected to weld pad.The drain electrode of transistor seconds is connected to the source electrode of the first transistor, and source electrode then links to each other with grid and is connected to a supply voltage end simultaneously.Bleeder circuit is connected between weld pad and the supply voltage end, and is connected with the grid of the first transistor and when weld pad is subjected to the static attack, and a grid that is biased into the first transistor is provided, and makes the first transistor conducting.
The present invention also provides a kind of integrated circuit electrostatic discharge protective circuit, in order to prevent that an internal circuit is subjected to static and attacks.Wherein, internal circuit receives or output signal through a weld pad, and this electrostatic discharge protective circuit comprises first, second transistor and a bleeder circuit.The drain electrode of the first transistor is connected to weld pad.The drain electrode of transistor seconds is connected to the first transistor source electrode, source electrode then with grid link to each other and be connected to simultaneously one the supply voltage end.Bleeder circuit is connected between weld pad and the supply voltage end, comprises load and and last load polyphone load down on one.Bleeder circuit is connected with weld pad via last load and is connected with the supply voltage end via following load, and it is the junction that is connected to load and following load that the first transistor reaches grid, when weld pad is attacked by static, bleeder circuit provides a grid that is biased into the first transistor, makes the first transistor conducting.
Wherein, last load can be made up of the polyphone diode with following load, also can be made up of resistance.In addition, last load also can be made up of electric capacity with following load simultaneously, or one of them is made up of a current source.
By above-mentioned feature, make that electrostatic discharge protective circuit can keep a bias voltage to make its conducting at the first transistor grid by bleeder circuit, and eliminated the problem that is produced in the electrostatic discharge protective circuit of known technology in the present invention when attacked by static.
For the present invention's above-mentioned purpose, feature and advantage can be become apparent, preferred embodiment cited below particularly, and in conjunction with the accompanying drawings, be described in detail below:
Fig. 1 knows integrated circuit electrostatic discharge protective circuit in the technology;
Integrated circuit electrostatic discharge protective circuit in Fig. 2 first embodiment of the invention;
Integrated circuit electrostatic discharge protective circuit in Fig. 3 second embodiment of the invention;
Integrated circuit electrostatic discharge protective circuit in Fig. 4 third embodiment of the invention;
Integrated circuit electrostatic discharge protective circuit in Fig. 5 fourth embodiment of the invention;
Integrated circuit electrostatic discharge protective circuit in Fig. 6 fifth embodiment of the invention.
The figure number explanation
11 ~ weld pad;
13,15,61 ~ transistor;
17 ~ internal circuit;
23 ~ upward load; 25 ~ following load;
31 ~ diode;
41,43 ~ by impedance,motional;
51 ~ current source.
Embodiment one
As shown in Figure 2, integrated circuit electrostatic discharge protective circuit 20 in the first embodiment of the invention, wherein identical with the known technology integrated circuit electrostatic discharge protective circuit 10 of Fig. 1 assembly is to use identical numeral to represent.Electrostatic discharge protective circuit 20 comprises a transistor 13,15 and a bleeder circuit 21.Electrostatic discharge protective circuit 20 is connected to a weld pad 11, also is connected with an internal circuit 17.Bleeder circuit 21 comprises load 23 and load once 25 on one again.Its connected mode is different with known technology integrated circuit electrostatic discharge protective circuit 10 maximums among Fig. 1; how be a bleeder circuit 21 that is connected between weld pad and the supply voltage end Vss; and the grid of transistor 13 is not to be connected in voltage end Vdd; reach load 25 connecting places down but be connected in load 23, and accept the dividing potential drop Vg that bleeder circuit 21 is provided.
It is operating as: when weld pad 11 acceptance one static attacks, owing to bleeder circuit 21 is connected with weld pad 11, and make bleeder circuit 21 receive the voltage that a static is produced, and then reach 25 generations of load down, one dividing potential drop Vg via last load 23.The utmost point of transistor 13 is the connecting places that are connected to load 23 and following load 25 again, so this moment, the grid of transistor 13 can be accepted dividing potential drop Vg and conducting, and via transistor 13 and 15 electrostatic charge is derived, prevent that static from flowing into internal circuit 17 and causing internal circuit 17 to damage via weld pad 11.
In addition; because transistor 13 conductings when static attacks; the beta gain variation and the high breakdown voltage problem that can produce side npn originally in known electrostatic discharge protective circuit 10 can not taken place, and increased the electrostatic discharge capacity of this electrostatic discharge protective circuit, better electrostatic defending power also is provided.
Embodiment two
Fig. 3 has shown integrated circuit electrostatic discharge protective circuit 30 in the second embodiment of the invention.Wherein identical with the known integrated circuit electrostatic discharge protective circuit 10 of Fig. 1 assembly is to use same numbers to represent.Being connected with operation of electrostatic discharge protective circuit 20 among electrostatic discharge protective circuit 30 and Fig. 2 is all similar, but mainly realizes load 23 and load 25 down on the electrostatic discharge protective circuit 20 among Fig. 2 with a polyphone diode 31.Wherein, in last load, the sum total of polyphone diode 31 conducting voltage is greater than internal circuit 17 operating voltage on the weld pad 11 under normal operation, also greater than the conducting voltage of transistor 13.When static attacks,,, make transistor 13 conductings so have the bias voltage Vg that an electrostatic potential deducts total conducting voltage of all diodes 31 at the grid of transistor 13 because all diodes 31 are in conducting state in last load.
Yet though realize load with four diodes 31 among Fig. 3, only usefulness as an example is not limited to only use four diodes.Its main purpose is to be to make the sum total of conducting voltage of the diode 31 of contacting in the load greater than internal circuit 17 operating voltage on the weld pad 11 under normal operation, and is not limited to use the number of diode.
Embodiment three
Fig. 4 has shown integrated circuit electrostatic discharge protective circuit 40 in the third embodiment of the invention.Wherein identical with the integrated circuit electrostatic discharge protective circuit 10 of the known technology of Fig. 1 assembly is to use identical numeral to represent.Among electrostatic discharge protective circuit 40 and Fig. 2 electrostatic discharge protective circuit 20 be connected with operation all similar, but, be mainly to be realized going up load 23 and 25 among Fig. 2 by impedance,motional 41,43.Can be comprised resistance or electric capacity by impedance,motional 41,43.
Embodiment four
Fig. 5 has shown integrated circuit electrostatic discharge protective circuit 50 in the fourth embodiment of the invention.Wherein identical with the known technology integrated circuit electrostatic discharge protective circuit 10 of Fig. 1 assembly is to use identical numeral to represent.Being connected with operation of electrostatic discharge protective circuit 20 among electrostatic discharge protective circuit 50 and Fig. 2 is all similar, but, be mainly with the diode 31 of a plurality of polyphones and a current source 51 realize respectively among Fig. 2 last load 23 and under load 25.When static attacks, the diode 31 that current source 51 can provide certain electric current to make and contact in the load produces a conducting voltage, and then on the grid of transistor 13, produce the bias voltage Vg that an electrostatic potential deducts total conducting voltage of those polyphone diodes 31, make transistor 13 conductings.
Similarly, though realize load with four diodes 31 among Fig. 5, only usefulness as an example is not limited to only use four diodes.Its main purpose is to be to make the sum total of conducting voltage of the diode 31 of contacting in the load greater than internal circuit 17 operating voltage on the weld pad 11 under normal operation, and is not limited to use number of diodes.
Embodiment five
Fig. 6 has shown integrated circuit electrostatic discharge protective circuit 60 in the fifth embodiment of the invention.Wherein identical with the known technology integrated circuit electrostatic discharge protective circuit 10 of Fig. 1 assembly is to use identical numeral to represent.Being connected with operation of electrostatic discharge protective circuit 50 among electrostatic discharge protective circuit 60 and Fig. 5 is all similar, and it mainly realizes a current source with a transistor 61 that is in half conducting (subthreshold) state.When static attacks, can produce a bias voltage Bias on transistor 61 makes transistor 61 be in half conducting state, and make transistor 61 similar current sources, the diode 31 that provides certain electric current to make to contact in the load produces a conducting voltage, and then on the grid of transistor 13, produce the bias voltage Vg of total conducting voltage that an electrostatic potential deducts the diode 31 of those polyphones, make transistor 13 conductings.
Similarly, though realize load with four diodes 31 among Fig. 6, only usefulness as an example is not limited to only use four diodes.Its main purpose is to be to make the sum total of conducting voltage of the diode 31 of contacting in the load greater than internal circuit 17, under normal operation, and the operating voltage on the weld pad 11, and be not limited to use the number of diode.
Though the present invention discloses as above with preferred embodiment, it is not in order to restriction the present invention.Anyly know art technology person, do not breaking away from the spirit and scope of the invention, when doing a little change and retouching.Therefore, protection scope of the present invention is when looking claim and being as the criterion in conjunction with specification and the accompanying drawing person of defining
Claims (9)
1. the electrostatic discharge protective circuit of an integrated circuit, in order to preventing that an internal circuit is subjected to static and attacks, and this internal circuit receives or output signal through a weld pad (pad), and this electrostatic discharge protective circuit comprises:
One the first transistor, its drain electrode is connected to this weld pad;
One transistor seconds, drain electrode is connected to the source electrode of this first transistor, and source electrode links to each other with grid and is connected to one simultaneously and supplies voltage end;
One bleeder circuit is connected between this weld pad and this supply voltage end, and is connected with the grid of this first transistor and when this weld pad is attacked by static, and a grid that is biased into this first transistor is provided, and makes this first transistor conducting.
2. integrated circuit electrostatic discharge protective circuit, in order to preventing that an internal circuit is subjected to static and attacks, and this internal circuit receives or output signal through a weld pad (pad), and this electrostatic discharge protective circuit comprises:
One the first transistor, its drain electrode is connected to this weld pad;
One transistor seconds, drain electrode is connected to this first transistor source electrode, and source electrode links to each other with grid and is connected to one simultaneously and supplies voltage end;
One bleeder circuit, be connected between this weld pad and this supply voltage end, comprise on one load and with should go up load under the load polyphone, this bleeder circuit is connected with this weld pad via load on this and is connected with this supply voltage end via this time load, and this first transistor grid is to be connected to load and following load junction on this, when this weld pad was attacked by static, this bleeder circuit provided a grid that is biased into this first transistor, makes this first transistor conducting.
3. circuit as claimed in claim 2 wherein should be gone up load and was made of a plurality of polyphone diodes.
4. circuit as claimed in claim 2, wherein this time load is made of a plurality of polyphone diodes.
5. as circuit as described in the claim 2, wherein should go up load and be constituted by resistance.
6. circuit as claimed in claim 2, wherein this time load is made of resistance.
7. circuit as claimed in claim 2, wherein this time load is made of a current source.
8. circuit as claimed in claim 2, wherein this current source is one to be in the transistor of half conducting (subthreshold) state.
9. circuit as claimed in claim 2, load constituted by electric capacity under wherein upward load reached.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011101776A CN1153291C (en) | 2001-03-28 | 2001-03-28 | Electrostatic protection circuit for integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011101776A CN1153291C (en) | 2001-03-28 | 2001-03-28 | Electrostatic protection circuit for integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1377088A true CN1377088A (en) | 2002-10-30 |
| CN1153291C CN1153291C (en) | 2004-06-09 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011101776A Expired - Fee Related CN1153291C (en) | 2001-03-28 | 2001-03-28 | Electrostatic protection circuit for integrated circuit |
Country Status (1)
| Country | Link |
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| CN (1) | CN1153291C (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100382308C (en) * | 2003-09-23 | 2008-04-16 | 旺宏电子股份有限公司 | Electrostatic Discharge Protection Device |
| CN100541807C (en) * | 2007-01-16 | 2009-09-16 | 中华映管股份有限公司 | Active element array substrate |
| CN101859764A (en) * | 2010-06-03 | 2010-10-13 | 友达光电股份有限公司 | Electrostatic protection circuit and display device using the same |
| CN102693978A (en) * | 2011-03-25 | 2012-09-26 | 瑞昱半导体股份有限公司 | Electrostatic discharge protection circuit |
| CN103681650A (en) * | 2012-09-06 | 2014-03-26 | 瑞昱半导体股份有限公司 | integrated circuit |
| CN109842103A (en) * | 2017-11-24 | 2019-06-04 | 力旺电子股份有限公司 | ESD protection circuit |
| CN110120660A (en) * | 2018-02-07 | 2019-08-13 | 联发科技股份有限公司 | Overvoltage/Energy Protection Device |
-
2001
- 2001-03-28 CN CNB011101776A patent/CN1153291C/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100382308C (en) * | 2003-09-23 | 2008-04-16 | 旺宏电子股份有限公司 | Electrostatic Discharge Protection Device |
| CN100541807C (en) * | 2007-01-16 | 2009-09-16 | 中华映管股份有限公司 | Active element array substrate |
| CN101859764A (en) * | 2010-06-03 | 2010-10-13 | 友达光电股份有限公司 | Electrostatic protection circuit and display device using the same |
| CN102693978A (en) * | 2011-03-25 | 2012-09-26 | 瑞昱半导体股份有限公司 | Electrostatic discharge protection circuit |
| CN102693978B (en) * | 2011-03-25 | 2015-05-20 | 瑞昱半导体股份有限公司 | Electrostatic discharge protection circuit |
| CN103681650A (en) * | 2012-09-06 | 2014-03-26 | 瑞昱半导体股份有限公司 | integrated circuit |
| CN103681650B (en) * | 2012-09-06 | 2016-08-10 | 瑞昱半导体股份有限公司 | integrated circuit |
| CN109842103A (en) * | 2017-11-24 | 2019-06-04 | 力旺电子股份有限公司 | ESD protection circuit |
| CN110120660A (en) * | 2018-02-07 | 2019-08-13 | 联发科技股份有限公司 | Overvoltage/Energy Protection Device |
| US10965118B2 (en) | 2018-02-07 | 2021-03-30 | Mediatek Inc. | Over voltage/energy protection apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1153291C (en) | 2004-06-09 |
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Granted publication date: 20040609 Termination date: 20200328 |
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