CN1374695A - Semiconductor package with built-in heat dissipating block - Google Patents
Semiconductor package with built-in heat dissipating block Download PDFInfo
- Publication number
- CN1374695A CN1374695A CN 01111254 CN01111254A CN1374695A CN 1374695 A CN1374695 A CN 1374695A CN 01111254 CN01111254 CN 01111254 CN 01111254 A CN01111254 A CN 01111254A CN 1374695 A CN1374695 A CN 1374695A
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- CN
- China
- Prior art keywords
- lead frame
- semiconductor package
- lead
- semiconductor chip
- radiating block
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The semiconductor package with built-in heat dissipating block has a pin frame including one outer lead part, one inner lead part and one stepped soldering finger part. During assembly, the chip is first installed below the inner lead part and adhered to the soldering finger part; the chip is then soldered to the soldering finger part and one heat dissipating block is adhered to the forward side of the inner lead part with electrically insulating heat-conducting glue; and one glued package is finally formed to coat the chip, the inner lead part, the soldering leads and the heat dissipating block. The present invention has excellent heat dissipating effect and relatively smaller size.
Description
The present invention relates to a kind of semiconductor packaging, particularly have the semiconductor package part of built-in heat dissipating block.
(Lead-On-Chip LOC) is a kind of semiconductor packaging that semiconductor chip is installed in the below (that is leading part is positioned at the chip top) of the leading part (leads) of lead frame (leadframe) to leaded packaging part on the chip.Do not put brilliant pad (die pad) because the lead frame that this kind encapsulation technology is adopted does not have, therefore can make its packaged chip have more performance and heat dispersion, and can make whole package dimension do more compactly.(Dynamic Random Access Memory, DRAM) chip promptly adopts this kind encapsulation technology to encapsulate to the dynamic randon access device mostly.
Because the rapid progress of semiconductor technology, the dynamic randon access device has had access speed and memory capacity faster at present.Early stage dynamic random access memory only has the capacity of 1MB (megabyte), but present technology can reach the capacity of 256MB.Can relatively produce how unnecessary heat yet this reaches jumbo memory chip fast also when operation, therefore how increasing its heat dissipation just becomes a problem to be solved.
A kind of method that solves above-mentioned heat dissipation problem is that the mounting structure lotus root is bonded to an external heat abstractor, in order to the heat that chip produced is distributed to surrounding environment by this external connection radiating device.Yet a shortcoming of this kind solution is that it will increase whole package dimension and manufacturing cost.
Relevant patented technology for example includes United States Patent (USP) the 4th, 862, is entitled as the semiconductor chip " PACKAGE SEMICONDUCTOR CHIP " of encapsulation No. 245; United States Patent (USP) the 4th, 916 is entitled as semiconductor packages " SEMICONDUCTOR PACKAGE " No. 519; And United States Patent (USP) is entitled as planar substrates semiconductor packages " SEMICONDUCTOR PACKAGE WITHGROUND PLANE " for the 4th, 965, No. 654; Or the like.
In order to overcome above-mentioned the deficiencies in the prior art, the object of the present invention is to provide a kind of semiconductor package part with built-in heat dissipating block, it can make wherein packaged semiconductor chip have excellent heat dispersion performance.
Another purpose of the present invention is to provide a kind of semiconductor package part with built-in heat dissipating block, and it can make whole package dimension do comparatively compactly.
In order to overcome above-mentioned the deficiencies in the prior art part, the invention provides a kind of semiconductor package part with built-in heat dissipating block.
Semiconductor package part of the present invention comprises following composition member: (a) lead frame, and it comprises an outer lead part, an inner lead part and a stepped soldering finger part; Wherein inner lead part has a positive and back side; (b) semiconductor chip, it has a circuit face and an inverter circuit face, and weld pad is gone in the output that is formed with a plurality of central array on its circuit face; This semiconductor chip is installed in the back side of the inner lead part of this lead frame, and its circuit face is pasted the soldering finger part to this lead frame; (c) an assembly welding line, its be welded on this semiconductor chip each export between the soldering finger part of weld pad and this lead frame, in order to this semiconductor chip is electrically connected to this lead frame; (d) radiating block, it is pasted to the front of the inner lead part of this lead frame by an electrical insulating property heat conduction viscose; And (e) packing colloid, its inner lead part, those bonding wires and this radiating block in order to coat this semiconductor chip, this lead frame, but expose the outer lead part of this lead frame.
Under above-mentioned basic framework, this specification discloses five kinds of different embodiment altogether.
The beneficial effect of semiconductor package part of the present invention is owing to can make the heat that packaged semiconductor chip is produced when practical operation, conducts to surrounding environment through built-in heat dissipating block thus.Because this radiating block is embedded but not circumscribed, therefore can make whole package dimension do comparatively compactly.
The present invention is described in detail below in conjunction with accompanying drawing:
Fig. 1 is the cross-sectional view embodiment one of the embodiment of the invention one;
Fig. 2 is the cross-sectional view embodiment two of the embodiment of the invention two;
Fig. 3 is the cross-sectional view embodiment three of the embodiment of the invention three;
Fig. 4 is the cross-sectional view embodiment four of the embodiment of the invention four;
Fig. 5 is the cross-sectional view embodiment five of the embodiment of the invention five.
：100 101102 102a 102102b 102 103110 110a 110110b 110 111/112 ( ) 120 130140 150200 201202 202a 202202b 202 203210 210a 210210b 210 211212 ( ) 220 230240 250300 301302 302a 302302b 302 303310 310a 310310b 310 311/312 ( ) 320 330340 350400 401402 402a 402402b 402 403410 410a 410410b 410 411412 ( ) 420 430440 450500 501502 502a 502502b 502 503510 510a 510510b 510 511512 ( ) 520 530540 550560 561562
Below be conjunction with figs. 1,2,3,4, reach 5, describe each different embodiment of semiconductor package part of the present invention respectively in detail.
Embodiment one:
Below be conjunction with figs. 1, describe the embodiment one of semiconductor package part of the present invention in detail.
As shown in Figure 1, the semiconductor package part of present embodiment is mounted on the lead frame (leadframe) 100, and this lead frame 100 comprises the soldering finger part (bond fingers) 103 that an outer lead part (outerleads) 101, an inner lead part (inner leads) 102 and are stepped.Inner lead part 102 has a positive 102a and a back side 102b.In addition, the soldering finger part 103 of lead frame 100 is positioned at than inner lead part 102 and is a low lower position, and it for example can use end points with inner lead part 102 to be bent downwardly to the method for lower position and make.
Lead frame 100 is used to install semiconductor chip 110; This semiconductor chip 110 has a circuit face 110a and an inverter circuit face 110b, and weld pad 111 is gone in the output that its circuit face 110a is provided with a plurality of central array.
In assembling process, semiconductor chip 110 is installed in inner lead part 102 belows of lead frame 100, and with its circuit face 110a by an electrical insulating property mucigel, for example polyimide adhesive tape (polyimide tapes) 112 is pasted to soldering finger part 103.
After semiconductor chip 110 is installed in the place, location, then carry out a bonding wire operation (wire-bonding process), in order to an assembly welding line 120, gold thread for example, each that is welded on semiconductor chip 110 exported between the soldering finger part 103 of weld pad 111 and lead frame 100, by this semiconductor chip 110 is electrically connected to the inner lead part 102 of lead frame 100.
Then a radiating block 130 is pasted to the positive 102a of the inner lead part 102 of lead frame 100 by an electrical insulating property heat conduction viscose 140.The material of this radiating block 130 is a high conductivity material, for example copper or aluminium.In the present embodiment, electrical insulating property heat conduction viscose 140 is only coated on the positive 101a of inner lead part 102 of lead frame 100.
Carry out a packing colloid operation at last, form a packing colloid 150 by this, in order to coating semiconductor chip 110, the inner lead part 102 of lead frame 100, all bonding wire 120 and radiating blocks 130, but expose the outer lead part 101 of lead frame 100 and the upper surface of radiating block 130.So just finished the making of semiconductor package part of the present invention.
The heat that the present invention can make its packaged semiconductor chip 110 be produced when operation conducts to surrounding environment via radiating block 130.Because this radiating block 130 is embedded but not circumscribed, therefore can make whole package dimension do comparatively compactly.
Embodiment two:
Below promptly join accompanying drawing 2, the embodiment two of semiconductor package part of the present invention is elaborated
As shown in Figure 2, the semiconductor package part of present embodiment comprises: (a) lead frame 200, and it has an outer lead part 201, an inner lead part 202 and a stepped soldering finger part 203; (b) the semiconductor chip 210, and it has a circuit face 210a and an inverter circuit face 210b, and weld pad 211 is gone in the output that is formed with a plurality of central array on its circuit face 210a; (c) an assembly welding line 220, its be welded on semiconductor chip 210 each export between the soldering finger part 203 of weld pad 211 and lead frame 200, in order to semiconductor chip 210 is electrically connected to lead frame 200; (d) radiating block 230, it sticks in by an electrical insulating property heat conduction viscose 240 on the positive 202a of interior lead foot portion 202 of lead frame 200; And (e) packing colloid 250, it is in order to coating semiconductor chip 210, the inner lead part 202 of lead frame 200, all bonding wire 220 and radiating blocks 230, but exposes the outer lead part 201 of lead frame 200 and the upper surface of radiating block 230.
Shown in Figure 2, the structural form of embodiment two is most of identical with embodiment one shown in Figure 1; Its difference only is that electrical insulating property heat conduction viscose 240 used herein is spaces of filling up between semiconductor chip 210 and the radiating block 230, make the circuit face 210a of semiconductor chip 210 directly heat to be conducted to radiating block 230 by this, dissipate to surrounding environment via radiating block 230 again via electrical insulating property heat conduction viscose 240.This design can make the semiconductor package part of present embodiment have higher heat dispersion.
Embodiment three:
Below be conjunction with figs. 3, the embodiment three of semiconductor package part of the present invention is elaborated.
As shown in Figure 3, the semiconductor package part of present embodiment comprises: (a) lead frame 300, and it has an outer lead part 301, an inner lead part 302 and a stepped soldering finger part 303; (b) the semiconductor chip 310, and it has a circuit face 310a and an inverter circuit face 310b, and weld pad 311 is gone in the output that is formed with a plurality of central array on its circuit face 310a; (c) an assembly welding line 320, its be welded on semiconductor chip 310 each export between the soldering finger part 303 of weld pad 311 and lead frame 300, in order to semiconductor chip 310 is electrically connected to lead frame 300; (d) radiating block 330, it sticks in by an electrical insulating property heat conduction viscose 340 on the positive 302a of interior lead foot portion 302 of lead frame 300; And (e) packing colloid 350, it is in order to coating semiconductor chip 310, the inner lead part 302 of lead frame 300, all bonding wire 320 and radiating blocks 330, but exposes the outer lead part 301 of lead frame 300 and the upper surface of radiating block 330.
The structural form of embodiment three shown in Figure 3 is most of identical with embodiment two shown in Figure 2; Its difference only is, the formation method of stepped soldering finger part 303 herein is that end points with the inner lead part 302 of lead frame 300 is by imprint process (stamping) or etch partially technology (half-etching) and make required step structure.
Embodiment four:
Below be conjunction with figs. 4, the example four of executing of semiconductor package part of the present invention is elaborated.
As shown in Figure 4, the semiconductor package part of present embodiment comprises: (a) lead frame 400, and it has an outer lead part 401, an inner lead part 402 and a stepped soldering finger part 403; (b) the semiconductor chip 410, and it has a circuit face 410a and an inverter circuit face 410b, and weld pad 411 is gone in the output that is formed with a plurality of central array on its circuit face 410a; (c) an assembly welding line 420, its be welded on semiconductor chip 410 each export between the soldering finger part 403 of weld pad 411 and lead frame 400, in order to semiconductor chip 410 is electrically connected to lead frame 400; (d) radiating block 430, it is to stick on the positive 402a of interior lead foot portion 402 of lead frame 400 by an electrical insulating property heat conduction viscose 440; And (e) packing colloid 450, it is in order to coating semiconductor chip 410, the inner lead part 402 of lead frame 400, all bonding wire 420 and radiating blocks 430, but exposes the outer lead part 401 of lead frame 400.
Embodiment illustrated in fig. 4 four structural form is most of identical with embodiment two shown in Figure 2; Its difference only is, radiating block 430 used herein is to be coated on fully among the packing colloid 450 and not expose to outside the packing colloid 450.This design also can make heat that semiconductor chip 410 produced in regular turn via electrical insulating property heat conduction viscose 440, radiating block 430, and packing colloid 450 dissipate to surrounding environment.
Embodiment five:
Below be conjunction with figs. 5, the embodiment five of semiconductor package part of the present invention is elaborated.
As shown in Figure 5, the semiconductor package part of present embodiment comprises: (a) lead frame 500, and it has an outer lead part 501, an inner lead part 502 and a stepped soldering finger part 503; (b) the semiconductor chip 510, and it has a circuit face 510a and an inverter circuit face 510b, and weld pad 511 is gone in the output that is formed with a plurality of central array on its circuit face 510a; (c) an assembly welding line 520, its be welded on semiconductor chip 510 each export between the soldering finger part 503 of weld pad 511 and lead frame 500, in order to semiconductor chip 510 is electrically connected to lead frame 500; (d) radiating block 530, it is to stick on the positive 502a of interior lead foot portion 502 of lead frame 500 by an electrical insulating property heat conduction viscose 540; And (e) packing colloid 550, it is in order to coating semiconductor chip 510, the inner lead part 502 of lead frame 500, all bonding wire 520 and radiating blocks 530, but exposes the outer lead part 501 of lead frame 500 and the upper surface of radiating block 530.
The structural form of embodiment five shown in Figure 5 is most of identical with embodiment two shown in Figure 2; Its difference only is that outer lead part 501 herein is that it is crooked to become in the other direction, uses that radiating block 530 is inverted in the bottom of mounting structure.This design can make when the encapsulation unit lotus root of finishing at last is connected to the printed circuit board (PCB) 560 of an outside, the radiating block 530 that it can be exposed is electrically connected to the ground plane (groundplane) 561 of this printed circuit board (PCB) 560 by scolding tin 562, makes the semiconductor package of present embodiment can have higher heat dispersion by this.
The above is preferred embodiment of the present invention only, is not in order to limit the scope of essence technology contents of the present invention.Protection content of the present invention is as the criterion with claims and in conjunction with the content of specification and accompanying drawing.If any technical products that other people are finished or method identical or be a kind of equivalence change with the content in claims, all will be regarded as being encompassed among this scope of patent protection.
Claims (11)
1, a kind of semiconductor package part with built-in heat dissipating block, it comprises:
(a) lead frame, it comprises an outer lead part, an inner lead part and a stepped soldering finger part; Wherein inner lead part has a positive and back side;
(b) semiconductor chip, it has a circuit face and an inverter circuit face, and weld pad is gone in the output that is formed with a plurality of central array on its circuit face; This semiconductor chip is installed in the back side of the inner lead part of this lead frame, and its circuit face is pasted the soldering finger part to this lead frame;
(c) an assembly welding line, its be welded on this semiconductor chip each export between the soldering finger part of weld pad and this lead frame, in order to this semiconductor chip is electrically connected to this lead frame;
(d) radiating block, it is pasted to the front of the inner lead part of this lead frame by an electrical insulating property heat conduction viscose; And
(e) packing colloid, its inner lead part, those bonding wires and this radiating block in order to coat this semiconductor chip, this lead frame, but expose the outer lead part of this lead frame.
2, semiconductor package part according to claim 1 is characterized in that: the soldering finger part of this lead frame is that the end points by the inner lead part of this lead frame is bent to a lower position downwards and forms.
3, semiconductor package part according to claim 1 is characterized in that: the soldering finger part of this lead frame is by etching partially technology the end points of the inner lead part of this lead frame to be etched into required step structure.
4, semiconductor package part according to claim 1 is characterized in that: the soldering finger part of this lead frame is by imprint process the end points of the inner lead part of this lead frame to be pressed into required step structure.
5, semiconductor package part according to claim 1 is characterized in that: this semiconductor chip is to paste soldering finger part to this lead frame by the polyimide adhesive tape.
6, semiconductor package part according to claim 1 is characterized in that: this electrical insulating property heat conduction viscose is only coated on the front of inner lead part of this lead frame.
7, semiconductor package part according to claim 1 is characterized in that: this electrical insulating property heat conduction viscose fill up this semiconductor chip and this radiating block the two between the space.
8, semiconductor package part according to claim 1 is characterized in that: this radiating block be coated on fully this packing colloid in and do not expose to the outside of this packing colloid.
9, semiconductor package part according to claim 1 is characterized in that: this radiating block one surface exposed in the outside of this packing colloid.
10, semiconductor package part according to claim 9 is characterized in that: it is crooked that the outer lead part of this lead frame becomes in the other direction, so that this radiating block is inverted in the bottom; And be placed in one when having the printed circuit board (PCB) of ground plane when this semiconductor package part, can allow the exposed surface lotus root of this radiating block be connected to the ground plane of this printed circuit board (PCB).
11, semiconductor package part according to claim 1 is characterized in that: this radiating block material therefor is copper or aluminium.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011112549A CN1153287C (en) | 2001-03-09 | 2001-03-09 | Semiconductor package with built-in heat dissipating block |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011112549A CN1153287C (en) | 2001-03-09 | 2001-03-09 | Semiconductor package with built-in heat dissipating block |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1374695A true CN1374695A (en) | 2002-10-16 |
| CN1153287C CN1153287C (en) | 2004-06-09 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011112549A Expired - Fee Related CN1153287C (en) | 2001-03-09 | 2001-03-09 | Semiconductor package with built-in heat dissipating block |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1153287C (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101231989B (en) * | 2007-01-25 | 2010-06-23 | 南茂科技股份有限公司 | Semiconductor packaging supported films and packaging construction for increasing heat sinking efficiency |
| CN1992362B (en) * | 2005-12-27 | 2010-12-08 | 株式会社东芝 | Luminescent semiconductor device |
| CN102661496A (en) * | 2012-04-09 | 2012-09-12 | 深圳市华星光电技术有限公司 | LED (light-emitting diode) light source and corresponding backlight module |
| CN103154607A (en) * | 2010-09-13 | 2013-06-12 | Bk科技株式会社 | LED light source structure with high illuminating power and improved heat dissipating characteristics |
| CN103594429A (en) * | 2012-08-17 | 2014-02-19 | 矽品精密工业股份有限公司 | Semiconductor packaging structure and heat radiating piece thereof |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100511588C (en) * | 2006-04-14 | 2009-07-08 | 泰特科技股份有限公司 | Lead frame chip-level encapsulation method |
-
2001
- 2001-03-09 CN CNB011112549A patent/CN1153287C/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1992362B (en) * | 2005-12-27 | 2010-12-08 | 株式会社东芝 | Luminescent semiconductor device |
| CN101231989B (en) * | 2007-01-25 | 2010-06-23 | 南茂科技股份有限公司 | Semiconductor packaging supported films and packaging construction for increasing heat sinking efficiency |
| CN103154607A (en) * | 2010-09-13 | 2013-06-12 | Bk科技株式会社 | LED light source structure with high illuminating power and improved heat dissipating characteristics |
| CN102661496A (en) * | 2012-04-09 | 2012-09-12 | 深圳市华星光电技术有限公司 | LED (light-emitting diode) light source and corresponding backlight module |
| CN102661496B (en) * | 2012-04-09 | 2015-06-17 | 深圳市华星光电技术有限公司 | LED (light-emitting diode) light source and corresponding backlight module |
| CN103594429A (en) * | 2012-08-17 | 2014-02-19 | 矽品精密工业股份有限公司 | Semiconductor packaging structure and heat radiating piece thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1153287C (en) | 2004-06-09 |
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Granted publication date: 20040609 |