CN1361570A - Intelligent battery charger - Google Patents

Intelligent battery charger Download PDF

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Publication number
CN1361570A
CN1361570A CN 00136919 CN00136919A CN1361570A CN 1361570 A CN1361570 A CN 1361570A CN 00136919 CN00136919 CN 00136919 CN 00136919 A CN00136919 A CN 00136919A CN 1361570 A CN1361570 A CN 1361570A
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battery
signal
telecommunication
current
buck converter
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CN1252892C (en
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亚历山德鲁·哈图拉
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O2Micro International Ltd
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O2Micro International Ltd
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Abstract

The battery charging IC includes serial switch and resistor for detecting charge current of battery; pulse width regulating switch driving circuit, which provides electric signal to compensation converter so as to turn on and off the serial switch alternately during battery charging period; and charge current detecting amplifier, which receives electric signal expressing the charge current from the detection resistor and amplifies it, and includes one bridge circuit to match the electric signal of the charge current detecting amplifier.

Description

Intelligent battery charger
The present invention requires the rights and interests of the 60/79th, No. 509 U.S. Provisional Application of submission on March 26th, 1998.
The present invention relates generally to a kind of battery-powered device, relate more specifically to a kind of improved battery charge integrated circuit (" IC "), it is suitable for inserting in the portable electron device.
A kind of system that is used for battery-powered mancarried device is called as System Management Bus (" SMBus ").SMBus has stipulated data protocol, unit address and transferring command and the required additional electric requirement of information in the subsystem of various battery powdered devices.SMBus standard imagination be interconnected at least one system's master computer, an intelligent battery charger and intelligent battery of SMBus, they are included in the mancarried device.Under the SMBus agreement, intelligent battery provides data by SMBus to the master computer of mancarried device.By the electric energy management program that master computer is carried out this intelligent battery data are handled, to manage the operation of intelligent battery and intelligent battery charger at least.
According to SMBus standard and agreement, intelligent battery is accurately reported its performance by SMBus to master computer.If mancarried device comprises a plurality of batteries, each battery is reported its performance by SMBus to master computer independently.Provide the situation that just can show battery about the state of each battery charge levels to the electric energy management program of carrying out by master computer, and accurately estimate the remaining operation time of mancarried device.But except the quantity of electric charge state information about battery was provided, the information that obtains by SMBus was enough to satisfy the requirement of managing portable formula device electric energy, and can irrespectively control battery charge with the chemical characteristic that battery has.
In order to realize aforementioned purpose, SMBus stipulates that intelligent battery charger must be inquired about the charge characteristic of the intelligent battery that is being recharged termly, and irrelevant with the procedure operation of master computer electric energy management.Receiving that from after the replying of intelligent battery intelligent battery charger is adjusted its output to match with the requirement of intelligent battery.Damage for fear of battery, intelligent battery also to the battery charger report such as overcharge, overtension, temperature is too high and situation such as temperature rising excessive velocities.In this manner, intelligent battery is controlled its recharging period effectively.In addition, in order to prolong the life-span of intelligent battery, if can use external power source, intelligent battery charger can stop the intelligent battery that has charged electricity that mancarried device is powered.
Similarly, the electric energy management program of being carried out by master computer can be to the intelligent battery inquiry of the operation power of the master computer information about intelligent battery.The electric energy management program can be asked the various information about battery, as the chemical characteristic of battery, the working temperature of battery, the voltage or the charge or discharge electric current of battery.The electric energy management program can directly show this information and/or show the estimation of battery operated capacity, perhaps also can handle this category information to be used for the electric energy management scheme of computer system.Similar with intelligent charger, if intelligent battery detects a problem, then the electric energy management program receives the information about critical event.And, the electric energy management program also receive about discharge finish, electric weight remains on below the predetermined threshold value and last intelligent batteries such as time estimation till be discharged to below the predetermined threshold value.
As the part of master computer electric energy management scheme, the electric energy management program can provide information about battery condition to other program.Therefore, the electric energy management program can be inquired a device driver program, whether will damage the power supply uniformity of master computer to determine desired operation.For example, before attempting to begin a hard drive, the electric energy management program can determine whether at first that specific operation meeting drops to the output voltage of intelligent battery to be made below the malfunctioning threshold value of master computer.In this case, the response of hard disk unit driver may be to increase available electric energy by backlight grade that makes some non-key power consumptions of electric energy management stop such as LCD (" LCD "), to start hard disk drive.
Except intelligent battery and intelligent charger, adopt the mancarried device of SMBus generally also will comprise the intelligent battery selector.SMBus standard and agreement comprise the intelligent battery selector, because mancarried device can comprise two or more intelligent batteries, whenever may have only one of them to be used for operation power to mancarried device.In this many cell apparatus, the intelligent battery selector must be chosen between a plurality of batteries.In addition, the intelligent battery selector must be fast when getting next battery suddenly ground power supply to mancarried device is provided again.This situation will take place so that a floppy disk to be installed for example a battery being taken off from kneetop computer or notebook computer.
In addition, about SMBus standard and agreement and about the how detailed data of intelligent battery introduction is arranged below in some documents:
System Management Bus Specification, Revision 1.0, (System Management Bus standard, revised edition 1.0) Intel Company, February 15 nineteen ninety-five;
System Management Bus BIOS Interface Specification, Revision 1.0, (System Management Bus BIOS interface specification, revised edition 1.0) Intel Company, February 15 nineteen ninety-five;
Smart Battery Charger Specification, Revision 1.0, (intelligent battery charger standard, revised edition 1.0) Duracell company and Intel Company, on June 27th, 1996;
Smart Battery Data Specification, Revision 1.0, (intelligent battery data standard, revised edition 1.0) Duracell company and Intel Company, February 15 nineteen ninety-five; With
Smart Battery Selector Specification, Revision 1.0, (intelligent battery selector standard, revised edition 1.0) Duracell company and Intel Company, on September 5th, 1996.
Above-mentioned listed publication quotes in full a part as this paper at this.
No. 08/850335 U.S. Patent application that is entitled as " intelligent battery selector " that on May 2nd, 1997 submitted to described the controller IC that is suitable for being contained in the mancarried device.This mancarried device also comprises at least two batteries, and it can provide the battery status data by the master computer that bus comprises in mancarried device.The operation of the control electronic circuit indicator cock driver that is provided with at controller is used for selecting the operation power to mancarried device at a plurality of batteries.The bus check circuit makes the battery condition warning message on the monitoring control devices bus.This monitoring is irrelevant with master computer.Controller can may have been ended for the purpose that reduces power consumption to come the message on the bus is responded by selecting a different battery independently under the situation of operation at master computer.Disclosed controller also can select single battery to charge independently in this patent, and also can stop charging after receiving the message of battery overcharge.This disclosed content of " intelligent battery selector " patent application is incorporated herein by the part of this paper.
Although the SMBus standard has solved many major issues relevant with the powered operation of mancarried device with agreement, it has been ignored for solving the related necessary detailed problem of important performance constraint in the battery charge.For example, to the correct charging requirement continuous monitoring charging current of battery, and if necessary, adjust the operation of battery charger, so that the charging current of regulation to be provided to battery all the time.Be entitled as " adaptation power supply battery charging equipment " the 5th, 698, No. 964 United States Patent (USP)s (" the ' No. 964 patents ") disclose a kind of battery charger, and it comprises that one has " compensation (buck) converter circuit " battery charger of the feedback circuit that is used for the regulating cell charging.For the regulating cell charging current, disclosed circuit comprises current sense resistor (describing) in Fig. 3 in this patent, and it is connected between the circuit ground of the earth terminal that is recharged battery and battery charger.When battery charge, the electric current of the current sense resistor of flowing through produces and the proportional signal of telecommunication of charging current.But this " downside " difficulty that current detecting ran into is as described in the ' No. 964 patents, earthed circuits that it requires two electricity to isolate, and a normal running that is used for battery powdered device, another is used for battery charge.
The 5th, 723, No. 970 United States Patent (USP)s (" the ' No. 970 patents ") that are entitled as " battery charger of scalable supply current " disclose a kind of battery charger, and it comprises the feedback circuit of regulating cell charging.But, disclosed battery charger difference is in disclosed battery charger and the ' No. 964 patents in the ' No. 970 patents, the current sense resistor that the former has is not between battery ground and charger ground, but at the power supply of battery charger and be recharged between the battery.As a result, disclosed circuit is than disclosed simple in the ' No. 964 patents in the ' No. 970 patents, and promptly it has only adopted individually, and battery-powered device and charger are shared.But, in the ' No. 970 patents, in the battery charging process of disclosed circuit, on " high side " current sense resistor, can bear a voltage, this voltage may surpass 16.8 volts (" V "), perhaps, if battery by over-discharge can, this voltage can be low to moderate 2.5 volts.The technology that can maybe can adapt to this quite wide common-mode voltage range when circuit with the semiconductor device of high voltage is constructed, and is difficult to imagination and can stably works in this large-scale common-mode voltage with the battery charger IC of 5.0V complementary metal oxide semiconductors (CMOS) (" the CMOS ") technical construction of routine.
Therefore, an object of the present invention is to provide a kind of improved, high efficiency battery charger IC that detects charging current.
Another object of the present invention provides a kind of battery charger IC, and it is made by low-voltage IC technology, can detect charging current in the common-mode voltage of whole wide region.
Another purpose of the present invention provides a kind of battery charger IC, and it has an amplifier that is used to detect charging current, the automatically drift in the compensated amplifier.
A further object of the present invention provides a kind of battery charger IC, and it has an amplifier that is used to detect charging current, is used for the mismatch in the automatic compensated amplifier.
In brief, one aspect of the present invention is a kind of battery charger IC, and it is suitable for the operation of control compensation converter circuit, and this converter circuit can be arranged in the battery-powered device.This buck converter circuit receives electric energy from external power source, and provides electric energy with to battery charge.This buck converter circuit comprises a series connection switch, and it is from the external power source received current, and provides battery charge to battery.According to the present invention, the buck converter circuit also comprises a current sense resistor, and it is connected in series between external power source and the battery.Be provided for the electric current of battery charge this current sense resistor of flowing through.
Battery charger IC comprises the pulse-width regulated switch driving circuit, in battery charging process, provides a signal of telecommunication to the buck converter circuit, and this signal of telecommunication is the turn-on and turn-off tandem tap repeatedly.Battery charger IC also comprises the charging current detecting amplifier, and it receives and amplify the signal of telecommunication of an expression battery charge from current sense resistor.Charging current detecting amplifier according to the present invention comprises bridge circuit, and it is connected with the signal of telecommunication that is received from current sense resistor by the charging current detecting amplifier.The charging current detecting amplifier also comprises one from zeroing circuit, long term drift or mismatch in its autocompensation charging current sense amplifier.
Another aspect of the present invention is a kind of battery-powered device, and it comprises a battery, is used for its operation power, and as mentioned above a buck converter circuit comprises current sense resistor.This battery-powered device also comprises according to battery charger IC of the present invention, is used for the operation of control compensation converter circuit.Battery charger IC comprises the charging current detecting amplifier, and it receives the signal of telecommunication of the battery charge that expression provides to battery and with its amplification from current sense resistor.The charging current detecting amplifier comprises bridge circuit and from zeroing circuit, although it makes battery charger IC according to the present invention be made by the CMOS technology of conventional 5.0V, also can adapt to the large-scale common-mode voltage that on " high side " current sense resistor, occurs.
The above and other objects and advantages of the present invention will be by following explanation to each preferred embodiment shown in the drawings, and obtains those skilled in the art's understanding.
Figure 1A and 1B are the block diagrams of describing battery-powered device, its omit respectively and comprised be used for battery between the controller selected, these two figure have illustrated according to battery charger IC of the present invention;
Fig. 2 is the block diagram that illustrates in greater detail battery charger IC illustrated among Figure 1A and the 1B, and it comprises Sub-miniature B and charge controller, an error synthesis circuit, a charging current detecting amplifier and a sampling and a holding circuit;
Fig. 3 is that explanation is included in the Sub-miniature B shown in Figure 2 and the register schematic diagram of the block of registers in the charge controller;
Fig. 4 is the block diagram of explanation error synthesis circuit shown in Figure 2;
Fig. 5 is the circuit diagram of explanation charging current detecting amplifier shown in Figure 2, and it is included in the self-regulated null part of operating fully in battery charger IC;
Fig. 6 is the explanation sampling shown in Figure 2 and the circuit diagram of holding circuit;
Fig. 7 is the partial circuit diagram of explanation charging current detecting amplifier shown in Figure 5, and a kind of example of alternative scheme has been described, wherein the self-regulated null part is in battery charger IC peripheral operation.
The shown in block diagrams of Figure 1A a kind of device, it is by unified reference character 20 expression, the operation of this device can be powered by chargeable intelligent battery 22.When the operation of device 20 was powered by intelligent battery 22, to 24 power supplies of DC-DC transducer, this point specified for the former of teaching method thereby in Figure 1A intelligent battery 22 usually.DC-DC transducer 24 is converted to this electric energy that voltage brought that is provided by intelligent battery 22 needed other voltage of proper operation of the various electronic circuits (such as IC microprocessor master computer 26) that are included in the device 20.Correspondingly, the DC-DC transducer 24 of Figure 1A description is connected with master computer 26 by power bus 28.
Be that general master computer 26 can be included in device switching telecommunication number in the device 20 with other for what those skilled in the art had known.According to device 20 details, those that all know as those skilled in the art can not comprise at the device shown in Figure 1A: random access memory (" RAM "), floppy disk, hard disk drive, compact disc read-only memory (" CD-ROM "), display controller, PC card controller or the like.But, the explanation of Figure 1A with master computer 26 specifically describe can with intelligent battery 22 by System Management Bus SMBus 32 switching telecommunications number.More particularly, SMBus 32 makes the information, particularly its charged state that can exchange between intelligent battery 22 and the computer program by master computer 26 execution about intelligent battery 22 states.
The block diagram depicting of Figure 1A install the 20 concrete formations that are used for intelligent battery 22 charging.Therefore, shown in Figure 1ly comprised an AC adapter 42, its all unshowned external power source from each figure receives alternating current so that be device 20 power supplies and intelligent battery 22 charged.In the formation of the device shown in Figure 1A 20, AC adapter 42 is powered to DC-DC transducer 24 by external power cord 44.DC-DC transducer 24 is powered to master computer 26 again, and to battery charger IC 50 power supplies according to the present invention.AC adapter 42 is also powered to 5 volts of voltage regulators 52 by external power cord 44.5 volts of voltage regulators 52 directly provide the electric energy of 5 volts of current potentials so that its work to battery charger IC 50 by one 5 volts of supply lines 54.Because the outside electric energy that provides makes battery charger IC 50 work, when AC adapter 42 disconnected with external power source, battery charger IC 50 quit work immediately.For the purpose that will be explained in more detail below, 5 volts of voltage regulators 52 are also powered to the maximum charging voltage voltage divider 56 that is made of resistance 56a that is connected in series and 56b and by the maximum charging current voltage divider 58 that resistance 58a that is connected in series and 58b constitute with 5.0 volts current potential.
When to intelligent battery 22 charging, AC adapter 42 also by external power cord 44 to high charge current, pulse-width regulated (" PWM ") buck converter circuit (in Figure 1A by 60 expressions of unified reference character) power supply.Therefore, the source end 62s of the tandem tap 62 in the PWM buck converter circuit 60 directly receives electric energy from AC adapter 42.Shown in Figure 1A, tandem tap 62 is preferably P type MOSFET.External power cord 44 also is connected with power supply ground by the voltage divider 64 that is made of resistance 64a that is connected in series and 64b.The crossing tie point of resistance 64a and 64b provides a reference voltage to battery charger IC 50, and this reference voltage is proportional with the voltage on the external power cord 44 that is provided by AC adapter 42.
In the charging process of intelligent battery 22, make tandem tap 62 turn-on and turn-off repeatedly by the signal of telecommunication that inverting amplifier 66 offers the grid end 62g of tandem tap 62 from battery charger IC 50.The drain terminal 62d of tandem tap 62 is connected with inductance 68.In intelligent battery 22 charging processes, when tandem tap 62 conductings, drain terminal 62d provides electric current to inductance 68.In each follow-up interval of tandem tap 62 conductings, the electric current of the inductance 68 of flowing through increases, till tandem tap 62 ends.In each follow-up interval that tandem tap 62 ends, the electric current of the inductance 68 of flowing through reduces, till electric current stops to flow through inductance 68, or up to tandem tap 62 once more till the conducting.
When tandem tap 62 conductings, the electric current of some inductance 68 of flowing through enters filtering capacitor 72.And when tandem tap 62 ended, electric current flowed out filtering capacitor 72.Tandem tap 62 by and in each follow-up interval that the electric current of the inductance 68 of flowing through reduces, electric current flows into inductance 68 from unidirectional Zener diode 74.Therefore, the negative terminal 74c of unidirectional Zener diode 74 is connected with the tie point place of the drain terminal 62d of tandem tap 62 and inductance 68, and the positive terminal 74a of unidirectional Zener diode 74 is connected with circuit ground.
Because the electric energy loss that the electric current of the unidirectional Zener diode 74 of flowing through causes, PWM buck converter circuit 60 also comprises synchronous rectification switch 76 in order to reduce PWM buck converter circuit 60, and it is preferably N type MOSFET, and is in parallel with unidirectional Zener diode 74.The source end 76s of synchronous rectification switch 76 is connected with circuit ground.And the tie point between the negative terminal 74c of the drain terminal 76d of synchronous rectification switch 76 and drain terminal 62d, inductance 68 and the unidirectional Zener diode 74 of tandem tap 62 is connected.When intelligent battery 22 chargings, the signal of telecommunication that offers the grid end 76g of synchronous rectification switch 76 from battery charger IC 50 repeatedly ends the back conducting with synchronous rectification switch 76 at tandem tap 62, before making tandem tap 62 conductings synchronous rectification switch 76 is ended then.For the drain terminal 76d that protects synchronous rectification switch 76 can unexpectedly not be subjected to, the drain terminal 62d of tandem tap 62, the terminal of inductance 68 and the too high voltage in tie point place between the circuit ground at synchronous rectification switch 76; and can guarantee the normal running of PWM buck converter circuit 60 to make the Zener breakdown voltage of unidirectional Zener diode 74 be approximately 40V to 50V usually.
Tie point place between inductance 68 and filtering capacitor 72, a current sense resistor 82 is connected in series with inductance 68.In the process of intelligent battery 22 charging, will be added to battery charger IC50 at the voltage at the relative two ends of current sense resistor 82 by isolation resistance 84p and 84m.Isolation resistance 84p and 84m preferably have the resistance value of 1 megohm (" M Ω "), and mate in 0.1% scope.
Current sense resistor 82 is connected apart from the drain terminal 86d of inductance 68 end farthest with reverse-current protection switch 86 (being preferably P type MOSFET).The source end 86s of reverse-current protection switch 86 powers to intelligent battery 22 by battery charge line 88.In intelligent battery 22 charging processes; if battery charge surpasses preset threshold value; then provide a signal of telecommunication to the grid end 86g of reverse-current protection switch 86 by battery charger IC 50; with 86 conductings of reverse-current protection switch, between PWM buck converter circuit 60 and intelligent battery 22, to set up a low resistance path.When battery charge is decreased to when being lower than preset threshold value; the signal of telecommunication that is provided by battery charger IC 50 ends reverse-current protection switch 86, and then charging current flows to intelligent battery 22 from PWM buck converter circuit 60 through the leakage body diode 86db of reverse-current protection switch 86.As a result, for less than will be by the charging current of the threshold value of reverse-current protection switch 86, drain terminal 86d stops any possible reverse current that flow to PWM buck converter circuit 60 from intelligent battery 22.
The feedback voltage divider 92 that is made of series resistance 92a and 92b is connected between battery charge line 88 and the circuit ground.The tie point of series resistance 92a and 92b provides feedback voltage signal to battery charger IC 50, in this feedback voltage signal and the charging process on battery charge line 88 and to be added in the voltage feedback signal (" VFB ") of 22 of intelligent batteries proportional.
The connection via SMBus 32 between intelligent battery 22 and battery charger IC 50, thermistor signal line 96 also provides the signal of telecommunication that produces according to the thermistor in the intelligent battery 22 of SMBus standard by being included in to battery charger IC 50.One bias current adjustable resistance 98 also is connected the terminal of battery charger IC 50 with circuit ground.
The block diagram depicting of Figure 1B with devices 20 different shown in Figure 1A, it specifically constitutes and comprises an intelligent battery selector 102, as introducing in " intelligent battery selector " patent application.Shown in Figure 1B, intelligent battery selector 102 provides terminal point for battery charge line 88 and thermistor signal line 96.Shown in Figure 1B, intelligent battery selector 102 also is further divided into SMBus 32 battery charger section 32bc and master computer section 32hc.SMBus section 32a is connected intelligent battery selector 102 respectively with 32b with intelligent battery 22.Therefore, intelligent battery selector 102 transmits the intelligent battery 22 that is recharged and communicates by letter with SMBus between the battery charger IC 50 via battery charger section 32bc and a SMBus section 32a or another SMBus section 32b.Correspondingly, intelligent battery selector 102 transmits uncharged intelligent battery 22 via master computer section 32hc and a SMBus section 32a or another SMBus section 32b and communicates by letter with SMBus between the master computer 26.Similarly, intelligent battery selector 102 provides battery charge via battery charge line segment 88a or 88b to one or another intelligent battery 22.At last, intelligent battery selector 102 is also selected temperature signal by thermistor signal line segment 96a or 96b in the thermistor from the intelligent battery 22 that is recharged, and this temperature signal is provided to battery charger IC 50 through thermistor signal line 96.
Shown in the block diagram of Fig. 2, battery charger IC 50 comprises Sub-miniature B and charge controller 122.According to the SMB agreement, Sub-miniature B can send ALRT signal, i.e. an interrupt signal to other device that is connected with SMBus 32 by the SMBALRT line 124 in SMBus32 with charge controller 122.Sub-miniature B receives a clock signal by the SMB clock among the SMBus 32 (" SMBC ") line 126 from the main device (as master computer 26 or intelligent battery 22) that is connected with SMBus 32 with charge controller 122.Corresponding with the clock signal on the SMBC line 126, Sub-miniature B and charge controller 122 pass through SMBD line 128 swap datas with other device (as master computer 26 or intelligent battery 22) that is connected on the SMBus 32.Communication between this device can make data be written into selectively and/or read one group nine (9) registers in the interface register piece 132 that is arranged on Sub-miniature B and charge controller 122.Fig. 3 has illustrated the register 132a-132i in interface register piece 132:
1. read-only chargerspecinfo (charger specific information) register 132a;
2. only write charger mode register 132b;
3. read-only charger status register 132c;
4. read/writable charging current register 132d;
5. read/writable charging voltage register 132e;
6. only write warning register 132f;
7. read-only battery temperature register 132g;
8. read-only cell voltage register 132h;
9. read-only chipinfo (chip information) register 132i.Chargerspecinfo register 132a
Read-only chargerspecinfo register 132a stores the mode bit of the expansion of regulation battery charger IC 50 service behaviours.Store the data of the available model of the standard that is used to indicate battery charger IC 50 at the position of the low nibble group 132aa of chargerspecinfo register 132a 132aa3.Position 132aa4 stores the data whether pilot cell charger IC 50 supports to be used for the order of available intelligent battery selector 102.Charger mode register 132b
The data of only writing charger mode register 132b storage have been stipulated the various operator schemes of battery charger IC 50.When resetting battery charger IC 50, give everybody value of charger mode register 132b battery charger IC 50 and intelligent battery 22 are worked harmoniously, and can not disturb master computer 26.The 132ba0 position stores and is used to allow or forbid the data of battery charge, and does not change the battery charge and the magnitude of voltage of previous regulation.Battery charge can be by recovering resetting of 132ba0 position.If electric energy is added to battery charger IC 50 again, if perhaps intelligent battery 22 inserts in the devices 20,132ba0 position automatic clear then.
The data that the 132ba1 position stores have stipulated that battery charge is to be controlled, or controlled by the data that battery charger IC 50 receives from master computer 26 performed computer programs by the data that battery charger IC 50 receives from intelligent battery 22.The 132ba2 position is set in charger mode register 132b will make battery charger IC 50 be reset to its "on" position.The data that the 132ba3 position of low nibble group 132ba among the charger mode register 132b then will be stored among charging current register 132d and the charging voltage register 132e reset to zero.The data separate provision of these two registers battery charge and charging voltage.The data that the 132ba4 position stores have stipulated whether battery charge will continue the unlimited time interval, and perhaps battery charge will for example stop after 3 minutes at interval at preset time.Charger status register 132c
The data that read-only charger status register 132c stores have been stipulated the state of battery charger IC 50.Whether the data indication charger that the 132ca0 position stores allows according to the regulation of 132ba0 position or forbids.Whether the data indication charging that the 132ca1 position stores is controlled from the data that intelligent battery 22 receives by battery charger IC 50.If battery charger IC 50 operates according to the data that receive from intelligent battery 22, then the 132ca1 position is set to zero.Whether the data pilot cell charger IC that the 132ca2 position stores detects the charging voltage that is loaded with regulation on intelligent battery 22.Whether the data pilot cell charger IC that the 132ca3 position stores detects on intelligent battery 22 by the charging current of regulation is arranged.The data indication that 132ca4 and 132ca5 position store is the operation of what device control battery charger IC 50.These two (2) data bit are set to " 01 " when battery charger IC 50 works in response to the data that receive from intelligent battery 22.If this two data (2) position was set to " 11 " when battery charger IC 50 worked in response to the data that receive from master computer 26.The data that the 132ca6 position stores indicate whether to have surpassed the maximum current that can offer intelligent battery 22 chargings by the charging current value of charging current register 132d regulation.The data that the 132ca7 position stores indicate whether to have surpassed the maximum voltage that can offer intelligent battery 22 chargings by the charging voltage value of charging voltage register 132e regulation.132cb0 to 132cb3 position has stored the data of receiving from thermistor comparator 152 shown in Figure 2, the scope of the thermistor resistance value of its indication in intelligent battery 22.Specifically, the temperature of 132cb0 to the 132cb2 indication thermistor in intelligent battery 22 be below the default temperature value, between or above.The data that 132cb4 in the high nibble group of charger status register 132c 132cb stores indicate whether to make battery charger IC 50 forbid battery charge from effective warning message that intelligent battery 22 is received.If if if charging voltage and charging current have been stipulated that new value electric energy is removed or intelligent battery 22 when taking off 20 from installing from battery charger IC 50, this position is reset.The data pilot cell voltage that the 132cb5 position stores has surpassed maximum hardware predetermined voltage value.This refers generally to take place in the showing device 20 the serious fault of consequence.Whether the data indication that the 132cb6 position stores has intelligent battery 22 in device 20.The data that the 132cb7 position stores indicate the voltage on the power line 44 externally whether to surpass 7.0V.Charging current register 132d
The data that 132da4 to the 132db3 position of read/writable charging current register 132d stores have been stipulated battery charge.Battery charger IC 50 is received in data on 132da4 to the 132db3 position from master computer 26 or from other main device that is connected with SMBus 32.The data that are stored in 132da4 to the 132db3 position of read/writable charging current register 132d are sent to electric current (" I ") digital to analog converter (" DAC ") from Sub-miniature B and charge controller 122 through DAC data/address bus 142 (as shown in Figure 2), be I DAC 144, offer the maximum charging current of intelligent battery 22 with restriction.Battery charger IC 50 is lower than at current value under the peaked situation that battery charger IC 50 is preset to be provided predetermined electric current or provide default maximum current to intelligent battery 22 when the current value by 132da4 to 132db3 defined surpasses maximum permissible current to intelligent battery 22, satisfies the standard of maximum charging current in this way.Charging voltage register 132e
132d is similar to the charging current register, and the data that 132ea5 to the 132eb6 position of read/writable charging voltage register 132e stores have been stipulated the maximum charging voltage of battery.Battery charger IC 50 is received in data on 132ea5 to the 132eb6 position from master computer 26 or from other main device that is connected with SMBus 32.The data that are stored in 132ea5 to the 132eb6 position of read/writable charging voltage register 132e are sent to V DAC 146 from Sub-miniature B and charge controller 122 through DAC data/address bus 142, with the maximum voltage of restriction to applying between intelligent battery 22 charge period.Intelligent battery 22 can be closed battery charger IC 50 effectively by zero (0) value being deposited in 132ea5 to the 132eb6 position of read/writable charging voltage register 132e.Battery charger IC 50 is lower than at magnitude of voltage under the peaked situation that battery charger IC 50 is preset to be provided the voltage of being stipulated by 132ea5 to 132eb6 or provide default maximum voltage to intelligent battery 22 when the magnitude of voltage by 132ea5 to 132eb6 defined surpasses maximum permissible voltage to intelligent battery 22, comes in this way satisfying the standard of maximum charging voltage.Warning register 132f
If intelligent battery 22 is reported to the police, then the data conduct about alert if independently is stored in the status register of intelligent battery 22 position.When one or more alert if occurring, intelligent battery 22 sends a warning message that comprises above-mentioned data as the master on the SMBus 32 to battery charger IC 50 or to master computer 26.Intelligent battery 22 sends the All Alerts condition to master computer 26, but to having only and the relevant warning of charging that battery charger IC 50 sends.Intelligent battery 22 can be used by the program that master computer 26 is carried out to the alert if message that master computer 26 sends, to send the prompting about the alert if that exists in intelligent battery 22 to the user.In this case, the electric energy management computer program of being carried out by master computer 26 and battery charger IC 50 is responsible for handling warning and is taked suitable counter-measure.If intelligent battery 22 sends the alert if data to battery charger IC 50, battery charger IC 50 stores the data to and only writes warning register 132f.Although warning register 132f duplicates all 15 of status register in the intelligent battery 22, battery charger IC50 by from the warning message of intelligent battery 22 with among the high nibble group 132fb of warning register 132f appoint one or more combination set the time stop charging immediately, thereby only 132fb4 to 132fb7 position is responded.
132fa0 to 132fa3 position stores the alarm code that is sent by intelligent battery 22.The data indication intelligent battery 22 that the 132fa4 position stores has discharged.The data indication intelligent battery 22 that the 132fa5 position stores has been full of.The data indication intelligent battery 22 that the 132fa6 position stores is discharging.The data indication intelligent battery 22 that the 132fa7 position stores is just in initialization.The data indication intelligent battery 22 that the 132fb0 position stores has taken place to report to the police remaining time.Residual capacity has taken place and has reported to the police in data indication intelligent battery 22 that the 132fb1 position stores.Discharge has taken place to stop and has reported to the police in data indication intelligent battery 22 that the 132fb3 position stores.The data indication intelligent battery 22 too high warning of occurrence temperature that the 132fb4 position stores.Charging has taken place to stop and has reported to the police in data indication intelligent battery 22 that the 132fb6 position stores.The data indication intelligent battery 22 that the 132fb7 position the stores warning that overcharged.Battery temperature register 132g
The detected battery temperature of thermistor in the data indication intelligent battery 22 that read-only battery temperature register 132g stores.By reading in the data among the battery temperature register 132g, can confirm the temperature of intelligent battery 22 by master computer 26 performed computer programs.Whether the data value of the thermistor voltage that the indication of 132ga0 position stores in battery temperature register 132g is effective.The value of 132ga1 position indication thermistor voltage is measured by the analog-digital converter among the battery charger IC 50 shown in Figure 2 156.The thermistor voltage that the data indication that the high nibble group 132gb of battery temperature register 132g stores is measured by analog-digital converter 156.Cell voltage register 132h
132g is similar to the battery temperature register, by reading the data that read-only cell voltage register 132h stores, can confirm the voltage on intelligent battery 22 by the performed computer program of master computer 26.The 132ha0 position analog-digital converter 156 of indication in battery charger IC 50 finished the voltage measurement in the intelligent battery 22.Whether 132ha1 position indication analog-digital converter 156 is measuring the voltage of intelligent battery 22.The 132ha2 position indicates whether to surpass above-mentioned in conjunction with the illustrated default battery charge time interval of 132ba2 position.The data indication that the high nibble group 132hb of cell voltage register 132h stores is by the voltage of the intelligent battery 22 of analog-digital converter 156 measurements.Chip information register 132i
The low nibble group 132ia storage data of read-only chip information register 132i, it provides ID for battery charger IC 50.The high nibble group 132ib storage data of read-only chip information register 132i, it provides the correction level for battery charger IC 50.
Once more referring to Fig. 2, battery charger IC50 comprises the multiplexer 154 with an output, and it one of provides in the two optional signals analog-digital converter 156, to be used for digitlization.Two inputs of multiplexer 154 receive respectively from thermistor signal (it is sent to battery charger IC50 by thermistor signal line 96) and from the feedback voltage signal (it is sent to battery charger IC50 by feedback voltage signal line 158) of feedback voltage divider 92.According to the method, battery temperature register 132g and cell voltage register 132h (being contained in Sub-miniature B and the charge controller 122) receive numerical data (its representative is contained in the voltage that thermistor produced in the intelligent battery 22) from analog-digital converter 156 and intelligent battery 22 used voltage in charging process respectively.
Battery charger IC50 also comprises a switch driver 162, and it provides the operation of signal with control PWMbuck change-over circuit 60.Correspondingly, switch driver 162 provides signal by the input of 164 pairs of sign-changing amplifiers 66 of HDR holding wire, so that tandem tap 62 is connected earlier, and then disconnects.Similarly, switch driver 162 provides signal by LDR holding wire 166, synchronous rectifier switch 76 is disconnected earlier, and then connect.
For guaranteeing that synchronous rectifier switch 76 can not connected earlier or opposite before tandem tap 62 disconnects, switch driver 162 receives one by BBM holding wire 172 and disconnects the back connection signal earlier.BBM holding wire 172 is connected to the anodal 174a of the series diode shown in Figure 1A and the 1B to first diode of 174.Series diode is connected to circuit ground to the negative pole 174c of second diode of 174.One end of resistance 176 is connected to the tie point place of BBM holding wire 172 and anodal 174a, and second end is connected to the tie point place of the drain electrode 76d end of the negative pole 74c end of an end, unidirectional Zener diode 74 of drain electrode 62d, the inductance 68 of tandem tap 62 and synchronous rectifier switch 76.Correspondingly, when tandem tap 62 was disconnection for connection synchronous rectifier switch 76, the back of the disconnection earlier connection signal that switch driver 162 is received by BBM holding wire 172 had the current potential of approximate+1.0V.And when tandem tap 62 was connection for disconnection synchronous rectifier switch 76, switch driver 162 had the current potential that is no more than pact-0.5V by the back connection signal that disconnects earlier that BBM holding wire 172 is received.The potential value of alternate makes switch driver 162 guarantee that the signal that provided by LDR holding wire 166 can not connect synchronous rectifier switch 76 before tandem tap 62 actual disconnections between above-mentioned two current potentials that presented on the BBM holding wire 172, and the signal that is provided by HDR holding wire 164 can be with tandem tap 62 connections before synchronous rectifier switch 76 actual disconnections.
Switch driver 162 receives from the charger control signal that is contained in pulse-width regulated (PWM) circuit 182 among the battery charger IC 50, is used to set up a time interval.In this time interval, if synchronous rectifier switch 76 for disconnecting, is then connected tandem tap 62; If tandem tap 62 for disconnecting, is then connected synchronous rectifier switch 76.Oscillator 184 provides the clock signal of its operation of control of a 220KHz for pwm circuit 182.Pwm circuit 182 also receives a digital signal from charging disable circuit 186.Pwm circuit 182 is to be in enabled state (thereby being allowed to charging control signal is provided and activates the operation of PWM buck converter circuit 60 to switch driver 162) from the state of charging disable circuit 186 received signals decision pwm circuit 182, still be in illegal state (thereby pwm circuit 182 can not provide the charger control signal to switch driver 162, thereby no longer activate the operation of PWM buck converter circuit 60).
Charging disable circuit 186 receives a digital signal of being controlled by the state of 132ba0 position among the charger mode register 132b of interface register piece 132, thereby allows or forbid carrying out the battery charge computer program of master computer 26.If the 132ba0 position is reset, then the signal that received from Sub-miniature B and charge controller 122 of charging disable circuit 186 then makes 186 pairs of pwm circuits of charging disable circuit 182 send a signal, thereby activates the operation of PWM buck converter circuit 60 and charge to intelligent battery 22.On the contrary, if the 132ba0 position is reset, then the signal of 186 pairs of pwm circuits of charging disable circuit, 182 transmissions makes pwm circuit 182 forbid the operation of PWM buck converter circuit 60.Yet; even charging disable circuit 186 makes PWM buck converter circuit 60 can carry out the charging operations to intelligent battery 22 from the signal that Sub-miniature B and charge controller 122 are received; the digital signal that 188 pairs of charging disable circuits 186 of low-voltage/excess voltage protection are provided also can be forbidden the operation of pwm circuit 182, and makes that PWM buck converter circuit 60 can not be to intelligent battery 22 chargings.
188 pairs of charging disable circuits 186 of low-voltage/excess voltage protection are provided enables or forbids that the signal of self-contained three the comparator 192-196 in battery charger IC 50 of digital signal origin of PWM buck converter circuit 60 operations forms.The signal that comparator 192 and 194 input receive from voltage divider 64 by Vin holding wire 198, this signal be presented in external power cord 44 ratio of being pressed into that powers on.The preset reference voltage that offers other input respectively makes comparator 192 and 194 pairs of low-voltage/excess voltage protections 188 send output signal; thereby when the voltage on the external power cord 44 7.0 between 25.0V the time, make the charging operations that PWM buck converter circuit 60 is carried out intelligent battery 22.If be presented in that voltage on the external power cord 44 is lower than 7.0V or during greater than 25.0V, then the output signal that sends of the comparator 192 and the 194 pairs of low-voltage/excess voltage protections 188 is forbidden the charging operations that PWM buck converter circuit 60 is carried out intelligent battery 22.Charging disable circuit 186 also sends a signal to the interface register piece 132 that is contained in Sub-miniature B and the charge controller 122, detects in the voltage whether this signal indicating low-voltage/excess voltage protection 188 has occurred on voltage feedback signal line 158 or Vin holding wire 198 to cause charging disable circuit 186 to enable or forbid the condition of battery charge.
Similarly, the input of comparator 196 receives feedback voltage signal by voltage feedback signal line 158 from feedback voltage divider 92.Make 196 pairs of low-voltage/excess voltage protections of comparator 188 send a signal to the predeterminated voltage that another input applied, forbid the charging operations that PWM buck converter circuit 60 is carried out intelligent battery 22 when feasible VFB voltage on being presented in battery charge line 88 shows cell voltage less than 1.5V.
Also be used as the input signal of another comparator 202 from the feedback voltage signal of feedback voltage divider 92.The predeterminated voltage that another input is provided makes 202 pairs of Sub-miniature B of comparator and charge controller 122 send a signal, when if the VFB voltage of appearance is less than 10.0V on the battery charge line 88, " waking up " operator scheme of this signal activation battery charger IC 50.When intelligent battery 22 over-discharge can, or when having short circuit between battery charge line 88 and the circuit ground, can produce low like this VFB voltage.In order when the intelligent battery 22 that allows 60 pairs of over-discharge can of PWM buck converter circuit charges, to prevent that PWM buck converter circuit 60 from damaging because of short circuit, come from comparator 202 in reception, should reset to battery charger IC 50 immediately when showing that cell voltage is lower than 10.0 signal, make that the wake operation pattern of battery charger IC 50 is 256 milliamperes (ma) and 32.0V to the charging current register 132d that is stored in interface register piece 132 respectively and the charging current among the charging voltage register 132e and voltage range data value programmed settings.Electric current and voltage that 60 pairs of battery charge lines 88 of PWM buck converter circuit are provided are set up such limited field, can in intelligent battery 22 chargings, prevent that PWM buck converter circuit 60 from damaging because of short circuit over-discharge can.
The charging of 60 pairs of intelligent batteries 22 of PWM buck converter circuit can be forbidden or enable to the digital signal that is provided except 186 pairs of pwm circuits 182 of charging disable circuit, and the digital signal that 212 pairs of pwm circuits 182 of a Schmidt trigger circuit are provided also can be forbidden the operation of PWM buck converter circuit 60.When the charging current feedback signal to (" IFBZ " and " IFBS ") when showing charging current less than predetermined threshold value, the operation of the signal-inhibiting PWM buck converter circuit 60 that 212 pairs of pwm circuits 182 of Schmidt trigger circuit are provided.Schmidt trigger circuit 212 provides a safety to block (backup) characteristic, by forbidding that pwm circuit 182 carries out charging operations in charging current during less than Schmidt trigger circuit 212 default threshold values, thus the 86d end that prevents to drain may occur flow to the anti-filling electric current of PWM buck converter circuit 60 by intelligent battery 22.Correspondingly, the reverse input end of Schmidt trigger circuit 212 receives the IFBS signal by IFBS holding wire 216a from sample/hold circuit 214.The input in the same way of Schmidt trigger circuit 212 receives the IFBZ signal by IFBZ holding wire 216z, and in Schmidt trigger circuit 212 inside automatically with this IFBZ signal and predeterminated voltage addition.This IFBZ signal and predeterminated voltage addition and be used as in the inside of Schmidt trigger circuit 212 and forbid that PWM buck converter circuit 60 carries out the threshold value of charging operations to intelligent battery 22.
In order to provide IFBZ and IFBS signal, battery charger IC 50 to comprise that one has the charging-current sense amplifier 218 of an output to Schmitt trigger circuit 212, its output and sample/hold circuit 214 are complementary.The input of charging-current sense amplifier 218 receives ICHP signal and the ICHM signal that comes from electric current-detection resistance 82 backward ends respectively successively by ICHP holding wire 222 and ICHM holding wire 224.Voltage difference between ICHP and ICHM signal is with proportional to the charging current of intelligent battery 22.As the following detailed description of, in the different time, it is zero current that the signal voltage that 218 pairs of sample/hold circuits 214 of charging-current sense amplifier are provided is represented the electric current by current detector resistance 82 respectively, or represents actual battery charge by current detector resistance 82.Sample/hold circuit 214 is stored zero charging current and battery charge signal, and by IFBS and IFBZ holding wire 216s and 216z they is sent to Schmidt trigger circuit 212 respectively.Therefore, the signal difference that is presented between IFBS and IFBZ holding wire 216s and 216z is proportional with the battery charge that flows through electric current-detection resistance 82.
Except Schmidt trigger circuit 212 being provided IFBS and IFBZ signal, sample/hold circuit 214 also offers these two signals the input of the comparator 226 that is contained among the battery charger IC 50.Similar to Schmidt trigger circuit 212, the reverse input end of comparator 226 receives the IFBZ signal, and automatically predeterminated voltage is added on acquisition one voltage in the IFBZ signal, so that compare with the IFBS voltage of signals that the input in the same way of comparator 226 receives.Subsequently; if the charging current that IFBS that sample/hold circuit 214 is sent and IFBZ signal indicating flow through current sense resistor 82 surpasses preset threshold value; then comparator 226 sends the CHGST signal by CHGST holding wire 28 to the grid 86g of reverse-current protection switch 86; thereby, set up a low resistance path at PWM buck converter circuit 60 and 22 of intelligent batteries with 86 conductings of reverse-current protection switch.
As Fig. 4 institute represents in detail, except from Sub-miniature B and charge controller 122, receive various digital signals so that the operation of PWM buck converter circuit 60 is enabled or forbid that pwm circuit 182 also receives analog signals by charging control signal line 233 from error synthesis circuit 232 from charging disable circuit 182 with from Schmidt trigger circuit 212.When 60 pairs of intelligent batteries 22 of PWM buck converter circuit charge, the HDR that this analog signal control switch driver 162 is produced and the turn-on time of LDR signal at interval and opening time the interval.As shown in Figure 4, error synthesis circuit 232 comprises a pair of battery charging current error amplifier 234a and 234b, and a pair of charging voltage error amplifier 236a and 236b.
The input of battery charging current error amplifier 234a and 234b receives IFBS signal from sample/hold circuit 214 respectively by IFBS holding wire 216s.Another input of battery charging current error amplifier 234a receives the output signal from I DAC 144, and I DAC 144 also receives the IFBZ signal by IFBZ holding wire 216z from sample/hold circuit 214.The signal that IDAC144 provides battery charging current error amplifier 234a is voltage and the IFBZ signal sum that is stored in the data representative of the 132da4-db3 position among the charging current register 132d of interface register piece 132.If the difference of IFBS and IFBZ signal surpasses the voltage of the data representative that is stored in the 132da4-db3 position, then the output signal of battery charging current error amplifier 234a has a preset value.On the contrary, if the difference of IFBS and IFBZ signal is less than the voltage of the data representative that is stored in the 132da4-db3 position, then the output signal of battery charging current error amplifier 234a has a different preset value.
Battery charging current error amplifier 234b does not receive the input of IFBS signal by the Imax signal of Imax holding wire 242 receptions from maximum charging current voltage divider 58.Battery charging current error amplifier 234b also receives the IFBZ signal by IFBZ holding wire 216z from sample/hold circuit 214.In battery charging current error amplifier 234b inside, the voltage on the Imax holding wire 242 automatically with IFBZ holding wire 216z on the voltage addition, thereby the threshold value that foundation is compared with the IFBS signal.If the difference between IFBS and IFBZ signal surpasses the Imax signal voltage, then the output signal of battery charging current error amplifier 234b has a preset value.On the contrary, less than the Imax signal voltage, then the output signal of battery charging current error amplifier 234b has a different preset value as if the difference between IFBS and IFBZ signal.
The input of each charging voltage error amplifier 236a and 236b receives VFB signal from feedback voltage divider 92 respectively by voltage feedback signal line 158.Another input of charging voltage error amplifier 236a receives the output signal from V DAC 146, and its value is determined by the data of the 132ea5-ea6 position that is stored in the charging voltage register 132e in the interface register piece 132.If the VFB signal voltage surpasses the voltage that V DAC 146 is provided to charging voltage error amplifier 236a, then the output signal of charging voltage error amplifier 236a has a preset value.On the contrary, if the voltage that the VFB signal voltage is provided to charging voltage error amplifier 236a less than V DAC 146, then the output signal of charging voltage error amplifier 236a has a different preset value.The Vmax signal voltage that another input of charging voltage error amplifier 236b receives from maximum charging voltage voltage divider 56 by Vmax holding wire 244.If the VFB signal voltage surpasses the Vmax signal voltage, then the output signal of charging voltage error amplifier 236b has a preset value.On the contrary, less than the Vmax signal voltage, then the output signal of charging voltage error amplifier 236b has a different preset value as if the VFB signal voltage.
Error synthesis circuit 232 comprises a pair of charging current adjustable resistance 254a and 254b.The end of charging current adjustable resistance 254a is connected to the output of battery charging current error amplifier 234a, and the termination of charging current adjustable resistance 254b is received the supply voltage VDD that 5V power line 54 is provided.The other end of charging current adjustable resistance 254b is connected to the source electrode of P-MOS transistor 261.Error synthesis circuit 232 also comprises a pair of charging voltage adjustable resistance 256a and 256b.The end of charging voltage adjustable resistance 256a is connected to the output of charging voltage error amplifier 236a, and the termination of charging voltage adjustable resistance 256b is received the supply voltage VDD that 5V power line 54 is provided.The other end of charging voltage adjustable resistance 256b is connected to the source electrode of P-MOS transistor 262.P-MOS transistor 261 and 262 grid are connected respectively to the output of charging current adjustable resistance 254b and charging voltage adjustable resistance 256b.P-MOS transistor 261 and 262 drain electrode are connected to charging control signal line 233 by the comprehensive tie point 258 of error circuit.Also be contained between second end and the comprehensive tie point 258 of error circuit of second end that switch 264a in the error synthesis circuit 232 and 264b be series at charging current adjustable resistance 254a respectively and charging voltage adjustable resistance 256a.The output of the output of charging current adjustable resistance 234a and charging voltage adjustable resistance 236a also is connected to adjusting pattern circuits for triggering 268.
Shown in dotted line among Fig. 4 269, when 60 pairs of intelligent batteries of PWM buck converter circuit 22 charging, from one of two switches among the signal at stop 264a of normal mode circuits for triggering 268 and the 264b.Like this, when battery charge and voltage during respectively less than the maximum set up by maximum charging voltage voltage divider 56 and maximum charging current voltage divider 58, battery charger IC 50 forces PWM buck converter circuit 60 or works in the Current Regulation pattern, perhaps works in the voltage-regulation pattern.In the charging process of intelligent battery 22, battery charger IC50 makes PWM buck converter circuit 60 virgin works in the Current Regulation pattern, at this moment, and switch 264a closure, and switch 266a disconnects.In charging process, initial, the voltage at intelligent battery 22 two ends will be lower, and along with intelligent battery is recharged, voltage will raise gradually.When VFB signal indicating intelligent battery 22 two ends, voltage on battery charge line 88 surpassed the voltage that signal that charging voltage error amplifier 236a receives by V DAC 146 sets up, the output signal of charging voltage error amplifier 236a made adjusting pattern circuits for triggering 268 change states.The state that adjusting pattern circuits for triggering 268 change disconnects switch 264a, and with switch 266a closure, thereby change PWM buck converter circuit 60 into the voltage-regulation pattern.Subsequently, if during the electric current that the signal that IFBS and IFBZ signal indicating battery charge are received by I DAC 144 above battery charging current error amplifier 234a is set up, the output signal that battery charging current error amplifier 234a changes makes adjusting pattern circuits for triggering 268 change state once more.Therefore, PWM buck converter circuit 60 reverts to the Current Regulation mode of operation.Since the performed computer program of intelligent battery 22 or master computer 26 with storage in charging current register 132d and charging voltage register 132e, be used to set up specified battery charge and the voltage of signal that sends to error synthesis circuit 232 from I DAC 144 and V DAC 146, therefore, or intelligent battery 22, or the performed computer program of master computer has been controlled above two battery charge parameters.
If battery charge or voltage surpass the value that maximum charging current voltage divider 58 and maximum charging voltage voltage divider 56 are set up at any time, then or the output of the output of battery charging current error amplifier 234b or charging voltage error amplifier 236b, or above both with P-MOS transistor 261 or P-MOS transistor 262 or both equal conductings.The current value that the conducting of P-MOS transistor 261 makes PWM buck converter circuit 60 will offer intelligent battery 22 is limited in the scope that maximum charging current voltage divider 58 set up.The magnitude of voltage that the conducting of P-MOS transistor 262 makes PWM buck converter circuit 60 will offer intelligent battery 22 is limited in the scope that maximum charging voltage voltage divider 56 set up.Following table is listed the setting of resistance 254a, 254b, 256a and 256b.
Resistance Resistance
254a and 256a ???? 200KΩ
254b and 256b ????100KΩ
Be the magnitude of current that control battery charger IC 50 is absorbed, battery charger IC 50 comprises a bias current circuit 272.Bias current circuit 272 is realized the amounts of bias current that bias current adjustable resistance 98 is absorbed is regulated with the resistance value of bias current adjustable resistance 98.
There is variety of way to be used in the battery charger IC 50 shown in the block diagram of realizing Fig. 2 among the IC, yet, if construct this IC with conventional 5.0V compensation metal oxide silicium (" CMOS "), then there is serious technical problem in the operability in a battery powdered device 20.For example, if during the intelligent battery over-discharge can, in intelligent battery 22 charging processes, the voltage that be presented in the voltage of battery charge line 88, promptly is added on the intelligent battery 22 may be up to 16.8V, or is lower than 2.5V.Because current sense resistor 82 is connected with intelligent battery 22 by reverse-current protection switch 86, in intelligent battery 22 charging processes, will always surpass the voltage of intelligent battery 22 to the measured voltage in circuit ground respectively in two opposite ends of current sense resistor 82.If battery charger IC 50 will be used to use routine " high side " current detection circuit of bypass resistance and simple voltage divider network, then the common-mode voltage in a big way of ICHP and ICHM signal will be added in the input of charging current detecting amplifier 218.Battery charger IC 50 preferred embodiments of the present invention are used the charging current detecting amplifier 218 of a uniqueness, and it has avoided the problems referred to above with sample/hold circuit 214.Charging current detecting amplifier 218
For reducing " high side " bigger common mode voltage that current detecting produced, in the preferred embodiments of the present invention, the charging current detecting amplifier 218 of battery charger IC 50 comprises a resistance-type bridge circuit 302, as shown in Figure 5.ICHP holding wire 222 and ICHM holding wire 224 mate (this also is contained in the charging current detecting amplifier 218 switch) by the resistance 84p of isolation and the switch 306 of 84m and pair of series respectively, and link to each other with 304m with the diagonal angle line end 304p of bridge circuit 302.Another diagonal angle line end 308v of bridge circuit 302 links to each other with circuit ground with supply voltage VDD (being present on the power line 54 of 5V) respectively with 308g.
Shown in dotted line among Fig. 5 312, switch 306 and switch 314 simultaneous operations that are contained in self-regulated null part 318 in the charging current detecting amplifier 218.As shown in Figure 5, switch 306 disconnects with isolation resistance 84p and 84m in whole self-regulated zero-times intervals continuously of bridge circuit 302.Such self-regulated zero-time at interval in, the closure of switch 314 is consistent with the disconnection of switch 306, the output signal that sends to sample/hold circuit 214 for charging current detecting amplifier 218 is set up the zero charging current value of a benchmark.Then, in compact continuous charging current interval detection time that in the continuous zeroing at interval certainly of the every pair of compactness, takes place, when switch 314 is closure for disconnection switch 306, make current sense resistor 82 be connected to bridge circuit 302 by isolation resistance 84p and 84m.Therefore, in each charging current assay intervals, the output signal that charging current detecting amplifier 218 is sent to sample/hold circuit 214 is proportional with the battery charge of the current sense resistor 82 of flowing through.
Be the flow through charging current of current sense resistor 82 of detection, end in the same way and backward end that the diagonal angle line end 304p of bridge circuit 302 and 304m are connected respectively to differential amplifier 322.The output of differential amplifier 322 is connected to the grid of P-MOS transistor 324.The source electrode of P-MOS transistor 324 is connected to the drain electrode and bridge circuit 302 1 ends of P- MOS transistor 326, and 326 pairs of P-MOS transistors 324 of transistor provide fixing, a default electric current.For guaranteeing that 326 pairs of P-MOS transistors 324 of P-MOS transistor provide a default electric current, the source electrode of P-MOS transistor 326 receives the supply voltage VDD that 5V power line 54 is provided, and the grid of P-MOS transistor 326 receives a fixing VBias voltage.
The source electrode of P-MOS transistor 324 is connected to the 304m end and forms the closed-loop path that comprises differential amplifier 322 and P-MOS transistor 324.Differential amplifier 322 in this loop and P-MOS transistor 324 are used as independently voltage gain amplifier, keep same voltage at the diagonal angle of bridge circuit 302 line end 304p and 304m.Because charging current detecting amplifier 218 is configured to have fabulous symmetry, the equivalent resistance of all branch roads of bridge circuit 302 will extremely mate with the voltage of diagonal angle line end 304p and 304m, this means that the electric current that flows through diagonal angle line end 304p and 304m will equate.
The fixed current and the source current amplifier 332 that flow through P-MOS transistor 326 are complementary, and source current amplifier 332 preferably provides 12 times the aforementioned fixation magnitude of current to the output node 334 of charging current detecting amplifier 218.Similarly, the drain current that flows out P-MOS transistor 324 is provided for absorbed current amplifier 336, and it preferably absorbs 10 times the aforementioned fixation magnitude of current from output node 334.Output resistance 338 (output signal of charging current detecting amplifier 218 appears on this resistance) links to each other output node 334 with circuit ground.
The output node 334 of charging current detecting amplifier 218 also links to each other with the grid of P-MOS transistor 342a.The source electrode of P-MOS transistor 342a is in parallel with the source electrode of the P-MOS transistor 342b of coupling, and is connected to the drain electrode of P-MOS transistor 343.P-MOS transistor 343 pairs of P- MOS transistors 342a and 342b provide fixing, a default electric current.For this default electric current is provided, the source electrode of P-MOS transistor 343 receives the supply voltage VDD that 5V power line 54 is provided, and the grid of P-MOS transistor 343 receives a fixing VBias voltage.The grid of P-MOS transistor 342b receives the VRef current potential of a 1.5V.The drain electrode of P- MOS transistor 342a and 342b is connected respectively to the current absorption N-MOS transistor 344a of a pair of coupling and the drain electrode of 344b.The grid of N- MOS transistor 344a and 344b is connected respectively to its source electrode, and the source electrode of N- MOS transistor 344a and 344b is parallel to circuit ground.
In each interval of continuous self-regulated zero-time, when the switch 314 of self-regulated null part 318 keeps cutting out, all be connected to circuit ground at the transistor 342a of series connection and the added voltage of drain electrode of 342b, and be connected to the end in the same way of differential amplifier 354 by self-regulated no-voltage storage capacitance 352.The output of differential amplifier 354 is connected to the reverse input end of differential amplifier 354, and is connected to the grid of N-MOS transistor 356.The result is that because the voltage of the storage capacitance 352 that returns to zero certainly, differential amplifier 354 works in high input impedance and single times of voltage gain state.The source electrode of N-MOS transistor 356 is connected to the output node 334 of charging current detecting amplifier 218.
Each continuous self-regulated zero-time at interval in, shown in the continuous horizontal line segment 362 in the contained voltage oscillogram of Fig. 5, the closure of switch 314 makes P-MOS transistor 342a, differential amplifier 354 and N-MOS transistor 356 form a closed-loop path.Therefore, each so the self-regulated zero-time at interval in, when switch 306 disconnects, thereby when producing first-class overcurrent and detecting zero charging current of transistor 82, the signal (it is determined by the voltage that self-regulated no-voltage storage capacitance 352 produces) that is added to the grid of N-MOS transistor 356 makes N-MOS transistor 356 from output node 334 absorption self-regulated zero currents.It is also noted that at first N-MOS transistor 356 makes the voltage of output node 334 to be complementary with the VRef voltage that is added to P-MOS transistor 342b grid from the self-regulated zero current that output node 334 absorbs.Therefore, the 362 representative voltage value VRef of the horizontal line section in the voltage oscillogram.Also must be noted that in whole charging current interval detection time, the self-regulated zero current that N-MOS transistor 356 absorbs from output node 334 will compensate long-term drift or in charging current detecting amplifier 218 not the matching of other generation, as not matching of generation in source current amplifier 332 and in absorbed current amplifier 336.
Subsequently, in each continuous charging current interval detection time, shown in horizontal line section continuous in the voltage oscillogram 366, switch 314 disconnects and switch 306 closures, thereby makes the voltage at current sense resistor 82 two ends be added to the diagonal angle line end 304p and the 304m of bridge circuit 302 by isolation resistance 84p and 84m.In such charging current interval detection time, the voltage at self-regulated no-voltage storage capacitance 352 two ends is kept the self-regulated zero current substantially constant that N-MOS transistor 356 is absorbed.On the contrary, in such charging current interval detection time, electric current that absorbed current amplifier 336 is absorbed from output node 334 and the proportional variation of voltage that is added to the diagonal angle line end 304p and the 304m of bridge circuit 302, that is, with the proportional variation of voltage at current sense resistor 82 two ends.In each continuous charging current interval detection time, because source current amplifier 332 provides and kept substantially constant by the electric current that N-MOS transistor 356 is absorbed from output node 334, absorbed current amplifier 336 will only change the electric current that flows through output resistance 338 from the variation of 334 absorption current of output node.The electric current that flows through output resistance 338 changes the voltage that is increased in output node 334 places, and proportional with the electric current that flows through current sense resistor 82.Therefore, the self-regulated zero-time shown in horizontal line section 362 at interval in continuous charging current detection time shown in horizontal line section 366 the charging current detecting amplifier 218 at interval the voltage difference voltage difference of output node 334 places (promptly) of output proportional with the electric current that flows through current sense resistor 82.Sample/hold circuit 214
Fig. 6 and described sample/hold circuit 214 from the voltage oscillogram that charging current detecting amplifier 218 sends to the output signal of sample/hold circuit 214.Sample/hold circuit 214 comprises zero reference sampling switch 372 and charging current sampling switch 374.Switch 372 and 374 is connected in series to the input of sample/hold circuit 214 respectively and an end and the charging current of zero reference maintenance electric capacity 376 keeps between the electric capacity 378.The electric capacity 376 and 378 the other end all are connected to circuit ground.Except linking to each other with 374 with switch 372, electric capacity 376 and 378 also is connected respectively to the input in the same way of single times of voltage gain amplifier 382 and 384.Amplifier 382 and 384 output provide IFBZ and IFBS signal to IFBS and IFBZ holding wire 216s and 216z respectively.
Shown in the vertical line 392 of pair of parallel among Fig. 6, near each self-regulated zero-time interval (therebetween, the voltage that horizontal segment 362 is indicated in the voltage oscillogram of 218 pairs of sampling hold circuits of charging current detecting amplifier, 214 transmission Fig. 5 and Fig. 6) end, zero reference sampling switch 372 instantaneous closing, keep electric capacity 376 to connect zero reference, and store the zero reference signals sampling therein, and be input to the input of sample/hold circuit 214.The voltage that amplifier 382 will be stored in zero reference sampling switch 372 sends to IFBZ holding wire 216z upward as the IFBZ signal.Similarly, near each the charging current detection time of end at interval, the voltage at horizontal line section 366 places that the vertical line 394 of the pair of parallel that the input reception of sample/hold circuit 214 is shown in Figure 6 is indicated, charging current sampling switch 374 instantaneous closing, keep electric capacity 378 to connect charging current, and store the charging current signals sampling therein, and be input to the input of sample/hold circuit 214.The voltage that amplifier 384 will be stored in charging current sampling switch 374 sends to IFBS holding wire 216s upward as the IFBS signal.Like this, the same with battery charger IC of the present invention 50, although still constitute, and may adapt at the bigger common-mode voltage range that " high side " current sense resistor 82 takes place with conventional 5.0V CMOS.
One optional embodiment of Fig. 7 display unit 20, wherein, charging current detecting amplifier 218 is not inner automatically with the operation of the operation of switch 314 and switch 306 limit mutually at battery charger IC 50, but by means of oneself switch 402 that returns to zero of outside that is positioned at outside the battery charger IC 50.In the embodiment and battery charger IC 50 of device shown in Figure 7 20, switch 306 total maintenances are closed, and resistance 404p and 404m are between the two ends of current sense resistor 82 and isolation resistance 84p and 84m.Resistance 404p and 404m all have lower resistance value such as 1.0K Ω, and they may flow through closed outside and limit within the specific limits from the electric current of the switch 402 that returns to zero.
For embodiment shown in Figure 7, in self-regulated zero-time interval, when switch 314 cut out, the outside switch 402 that returns to zero certainly also cut out thereupon, thereby together will be placed in the isolation resistance 84p on bridge circuit 302 both sides and the terminal shortcircuit of 84m.Be similar to the disconnection of switch 306 among the detecting amplifier of charging current shown in Fig. 5 218 embodiment, close outside can the generation charging current detecting amplifier 218 and encourage, make PWM buck converter circuit 60 not provide any charging current intelligent battery from the switch 402 that returns to zero.Yet, in each self-regulated zero-time interval,, will in the voltage that is stored in self-regulated no-voltage storage capacitance 352, add the electrical characteristic of isolation resistance 84p and 84m with a terminal shortcircuit rather than the cut-off switch 306 of isolation resistance 84p and 84m.The electrical characteristic that comprises isolation resistance 84p and 84m in the voltage that is stored in self-regulated no-voltage storage capacitance 352, this will make isolation resistance 84p that the formation charging current detecting amplifier 218 described in Fig. 5 is strict with and the matching condition of 84m relax.
Although according to shown in preferred embodiment invention has been described, it must be understood that so open only be in order to demonstrate, and should not be deduced to not using its limited field.For example, the charging current detecting amplifier 218 that is included among the battery charger IC 50 preferably includes the bridge circuit 302 that resistance constitutes, although than technology is more complicated from the principle with resistance, also available electric capacity constitutes bridge circuit 302.So, without doubt, to one skilled in the art, after understanding above-mentioned disclosed content, can under the situation that does not deviate from spirit and scope of the invention, make various changes, modification to the present invention, and/or the application that changes.Correspondingly, following claim is intended to comprise all changes, the modification in true spirit of the present invention and the scope, and/or the application that changes.

Claims (42)

1. an integrated circuit of battery charger (" IC "), it is suitable for the operation of control compensation converter circuit, this buck converter circuit can be suitable for receiving electric energy from external power source, and provide electric energy with to battery charge, this buck converter circuit comprises a series connection switch, it is from the external power source received current, and in battery charging process, provide electric current, and the buck converter circuit also comprises a current sense resistor, it is connected in series between external power source and the battery, the electric current that in battery charging process, offers battery this current sense resistor of flowing through, this battery charger IC comprises:
The pulse-width regulated switch driving circuit is used at battery charging process, provides a signal of telecommunication to tandem tap, and this signal of telecommunication is suitable for conducting repeatedly and turn-offs tandem tap in the buck converter circuit then; With
The charging current detecting amplifier, it receives and amplifies the signal of telecommunication of charging current the expression battery charging process from current sense resistor, described charging current detecting amplifier comprises bridge circuit, and it inserts the signal of telecommunication that is received from current sense resistor by the charging current detecting amplifier.
2. battery charger IC according to claim 1, wherein bridge circuit comprises at least one resistance.
3. battery charger IC according to claim 1, wherein bridge circuit is the resistance bridge circuit.
4. battery charger IC according to claim 1, wherein said charging current detecting amplifier also comprises one from zeroing circuit, it compensates long term drift or mismatch in the described charging current detecting amplifier automatically.
5. battery charger IC according to claim 4, wherein in self-regulated zero-time interval, the charging current detecting amplifier stores one with reference to the zeroing charging current value, and wherein in follow-up charging current interval detection time, the charging current detecting amplifier is in response to the signal of telecommunication of receiving from current sense resistor, and generation one is illustrated in the signal of telecommunication of the electric current that offers battery in the charging process.
6. battery charger IC according to claim 1, wherein the described signal of telecommunication that is illustrated in the electric current that offers battery in the battery charging process that is amplified by the charging current detecting amplifier is used among the battery charger IC, be used to control the signal of telecommunication that is provided by switch driving circuit, this signal of telecommunication turn-offs the tandem tap conducting repeatedly in the buck converter circuit then.
7. battery charger IC according to claim 1, wherein switch driving circuit also provides the signal of telecommunication, its be suitable for repeatedly tandem tap by the time, make the synchronous rectifier switch conducting in the buck converter circuit, when the tandem tap conducting, synchronous rectifier switch is ended then.
8. battery charger IC according to claim 7, wherein the signal of telecommunication from switch driving circuit only makes the synchronous rectifier switch conducting after tandem tap ends, and only before the tandem tap conducting, synchronous rectifier switch is ended.
9. battery charger IC according to claim 1, wherein said battery is an intelligent battery, described battery charger IC also comprises a Sub-miniature B and charge controller, it makes battery charger IC be adapted to pass through the interconnection of SMBus and intelligent battery, and is suitable for the device swap data that contains intelligent battery that is connected with charge controller with other and Sub-miniature B.
10. battery-powered device, it comprises:
Battery is used for the operation power to this device,
The buck converter circuit, it is suitable for receiving electric energy from external power source, and provide electric energy with to described battery charge, this buck converter circuit comprises a series connection switch, it is from the external power source received current, and provides electric current in described battery charging process, and described buck converter circuit also comprises a current sense resistor, it is connected in series between external power source and the described battery, the electric current that offers described battery in battery charging process this current sense resistor of flowing through; With
Battery charger IC, it is suitable for controlling the operation of described buck converter circuit, and described battery charger IC comprises:
The pulse-width regulated switch driving circuit is used for providing a signal of telecommunication at described battery charging process to tandem tap, and this signal of telecommunication is suitable for conducting repeatedly and turn-offs tandem tap in the described buck converter circuit then; With
The charging current detecting amplifier, it receives the signal of telecommunication of the battery charge that expression provides to described battery and with its amplification from current sense resistor, described charging current detecting amplifier comprises bridge circuit, and it is coupled with the signal of telecommunication that receives from current sense resistor.
11. device according to claim 10, wherein bridge circuit comprises at least one resistance.
12. device according to claim 10, wherein bridge circuit is the resistance bridge circuit.
13. device according to claim 12 also comprises at least one resistance that is arranged between current sense resistor and the bridge circuit, passes through this resistance by described bridge circuit from the part of the signal of telecommunication of current sense resistor reception at least.
14. device according to claim 10, wherein said charging current detecting amplifier also comprise from zeroing circuit, long term drift or mismatch in its autocompensation charging current sense amplifier.
15. device according to claim 14, wherein in self-regulated zero-time interval, the charging current detecting amplifier sends a signal, the switch that comprises in the device and be positioned at described battery charger IC outside cuts out, and the described switch of the described buck converter circuit of simulation cuts out, do not provide charging current to described battery.
16. device according to claim 14, wherein in self-regulated zero-time interval, the charging current detecting amplifier stores one with reference to the zeroing charging current value, and wherein in follow-up charging current interval detection time, the charging current detecting amplifier is in response to the signal of telecommunication of receiving from current sense resistor, and generation one is illustrated in the signal of telecommunication of the electric current that offers described battery in the charging process.
17. device according to claim 10, wherein the described signal of telecommunication that is illustrated in the electric current that offers described battery in the described battery charging process that is amplified by the charging current detecting amplifier is used among the described battery charger IC, be used to control the signal of telecommunication that is provided by switch driving circuit, this signal of telecommunication turn-offs the tandem tap conducting repeatedly in the buck converter circuit then.
18. device according to claim 10, wherein:
Described buck converter circuit also comprises a synchronous rectifier switch; With
Switch driving circuit also provides the signal of telecommunication, its be suitable for repeatedly tandem tap by the time, make the synchronous rectifier switch conducting in the buck converter circuit, when the tandem tap conducting, synchronous rectifier switch is ended then.
19. device according to claim 18, wherein the signal of telecommunication from switch driving circuit only makes the synchronous rectifier switch conducting after tandem tap ends, and only before the tandem tap conducting, synchronous rectifier switch is ended.
20. device according to claim 10, wherein:
Described battery is an intelligent battery;
Described device also comprises a SMBus, and it is with described intelligent battery and described battery charger IC interconnection; With
Described battery charger IC also comprises a Sub-miniature B and a charge controller that is connected with described SMBus, and it makes battery charger IC be suitable for the device swap data that contains described intelligent battery that is connected with SMBus with other.
21. battery charger IC according to claim 1, wherein said battery charger IC also provides a signal of telecommunication, and this signal of telecommunication is suitable for:
When battery charge surpasses first predetermined threshold value, with the reverse-current protection switch conduction, between buck converter circuit and battery, to set up a low resistance path by the reverse-current protection switch; With
When battery charge is lower than second predetermined threshold value, the reverse-current protection switch is ended, stop reverse current to flow to the buck converter circuit through the reverse-current protection switch thus from battery.
22. device according to claim 10, also comprise a reverse-current protection switch, it is connected in series between described buck converter circuit and the described battery, and can operate between described buck converter circuit and described battery, to set up a low resistance path and to stop reverse current to flow to described buck converter circuit through described reverse-current protection switch from described battery; With
Described battery charger IC provides a signal of telecommunication to described reverse-current protection switch, this signal:
Be used for when battery charge surpasses first predetermined threshold value, described reverse-current protection switch conduction; With
When described battery charge is lower than second predetermined threshold value, described reverse-current protection switch is ended.
A 23. integrated circuit of battery charger (" IC "), it is suitable for the operation of control compensation converter circuit, this buck converter circuit can be suitable for receiving electric energy from external power source, and provide electric energy with to battery charge, this buck converter circuit comprises a series connection switch, it is from the external power source received current, and in battery charging process, provide electric current to this battery, and the buck converter circuit also comprises a current sense resistor, it is connected in series between external power source and the battery, the electric current that in battery charging process, offers battery this current sense resistor of flowing through, this battery charger IC comprises:
The pulse-width regulated switch driving circuit is used at battery charging process, provides a signal of telecommunication to tandem tap, and this signal of telecommunication is suitable for conducting repeatedly and turn-offs tandem tap in the buck converter circuit then; With
The charging current detecting amplifier, it receives and amplifies the signal of telecommunication of charging current the expression battery charging process from current sense resistor, described charging current detecting amplifier comprises a self-regulated null part, long term drift or mismatch in its autocompensation charging current sense amplifier.
24. battery charger IC according to claim 23, wherein said charging current detecting amplifier comprises bridge circuit, and it receives the signal of telecommunication that receives from current sense resistor, and comprises at least one resistance.
25. battery charger IC according to claim 23, wherein said charging current detecting amplifier comprises the resistance bridge circuit, and it receives the signal of telecommunication that receives from current sense resistor.
26. battery charger IC according to claim 23, wherein in self-regulated zero-time interval, the charging current detecting amplifier stores one with reference to the zeroing charging current value, and wherein in follow-up charging current interval detection time, the charging current detecting amplifier is in response to the signal of telecommunication of receiving from current sense resistor, and generation one is illustrated in the signal of telecommunication of the electric current that offers battery in the charging process.
27. battery charger IC according to claim 23, wherein the described signal of telecommunication that is illustrated in the electric current that offers battery in the battery charging process that is amplified by the charging current detecting amplifier is used among the battery charger IC, be used to control the signal of telecommunication that is provided by switch driving circuit, this signal of telecommunication turn-offs the tandem tap conducting repeatedly in the buck converter circuit then.
28. battery charger IC according to claim 23, wherein switch driving circuit also provides the signal of telecommunication, its be suitable for repeatedly tandem tap by the time, make the synchronous rectifier switch conducting in the buck converter circuit, when the tandem tap conducting, synchronous rectifier switch is ended then.
29. battery charger IC according to claim 28, wherein the signal of telecommunication from switch driving circuit only makes the synchronous rectifier switch conducting after tandem tap ends, and only before the tandem tap conducting, synchronous rectifier switch is ended.
30. battery charger IC according to claim 23, wherein said battery charger IC also provides a signal of telecommunication, and this signal of telecommunication is suitable for:
When battery charge surpasses first predetermined threshold value, with the reverse-current protection switch conduction, between buck converter circuit and battery, to set up a low resistance path by the reverse-current protection switch; With
When battery charge is lower than second predetermined threshold value, the reverse-current protection switch is ended, stop reverse current to flow to the buck converter circuit through the reverse-current protection switch thus from battery.
31. battery charger IC according to claim 23, wherein said battery is an intelligent battery, described battery charger IC also comprises a Sub-miniature B and charge controller, it makes battery charger IC be adapted to pass through the interconnection of SMBus and intelligent battery, and is suitable for the device swap data that contains intelligent battery that is connected with charge controller with other and Sub-miniature B.
32. a battery-powered device, it comprises:
Battery is used for the operation power to this device,
The buck converter circuit, it is suitable for receiving electric energy from external power source, and provide electric energy with to described battery charge, this buck converter circuit comprises a series connection switch, it is from the external power source received current, and provides electric current in described battery charging process, and described buck converter circuit also comprises a current sense resistor, it is connected in series between external power source and the described battery, the electric current that offers described battery in battery charging process this current sense resistor of flowing through;
Battery charger IC, it is suitable for controlling the operation of described buck converter circuit, and described battery charger IC comprises:
The pulse-width regulated switch driving circuit is used for providing a signal of telecommunication at described battery charging process to tandem tap, and this signal of telecommunication is suitable for conducting repeatedly and turn-offs tandem tap in the described buck converter circuit then; With
The charging current detecting amplifier, it receives the signal of telecommunication of the battery charge that expression provides to described battery and with its amplification from current sense resistor, described charging current detecting amplifier comprises a self-regulated null part, and it compensates long term drift or mismatch in the described charging current detecting amplifier automatically.
33. device according to claim 32, wherein said charging current detecting amplifier comprises bridge circuit, and it receives the signal of telecommunication that receives from current sense resistor, and comprises at least one resistance.
34. device according to claim 32, wherein said charging current detecting amplifier comprises the resistance bridge circuit, and it receives the signal of telecommunication that receives from current sense resistor.
35. device according to claim 34 also comprises at least one resistance that is arranged between current sense resistor and the bridge circuit, passes through this resistance by described bridge circuit from the part of the signal of telecommunication of current sense resistor reception at least.
36. device according to claim 32, wherein in self-regulated zero-time interval, the charging current detecting amplifier sends a signal, the switch that comprises in the device and be positioned at described battery charger IC outside cuts out, and the described switch of the described buck converter circuit of simulation cuts out, do not provide charging current to described battery.
37. device according to claim 32, wherein in self-regulated zero-time interval, the charging current detecting amplifier stores one with reference to the zeroing charging current value, and wherein in follow-up charging current interval detection time, the charging current detecting amplifier is in response to the signal of telecommunication of receiving from current sense resistor, and generation one is illustrated in the signal of telecommunication of the electric current that offers described battery in the charging process.
38. device according to claim 32, wherein the described signal of telecommunication that is illustrated in the electric current that offers battery in the battery charging process that is amplified by the charging current detecting amplifier is used among the described battery charger IC, be used to control the signal of telecommunication that is provided by switch driving circuit, this signal of telecommunication turn-offs the tandem tap conducting repeatedly in the described buck converter circuit then.
39. device according to claim 32, wherein said buck converter circuit also comprise a synchronous rectifier switch; With
Switch driving circuit also provides the signal of telecommunication, its be suitable for repeatedly tandem tap by the time, make the synchronous rectifier switch conducting in the buck converter circuit, when the tandem tap conducting, synchronous rectifier switch is ended then.
40. according to the described device of claim 39, wherein the signal of telecommunication that provides from switch driving circuit only makes the synchronous rectifier switch conducting after tandem tap ends, and only before the tandem tap conducting, synchronous rectifier switch is ended.
41. device according to claim 32, also comprise a reverse-current protection switch, it is connected in series between described buck converter circuit and the described battery, and can operate between described buck converter circuit and described battery, to set up a low resistance path and to stop reverse current to flow to described buck converter circuit through described reverse-current protection switch from described battery; With
Described battery charger IC provides a signal of telecommunication to described reverse-current protection switch, this signal:
Be used for when battery charge surpasses first predetermined threshold value, described reverse-current protection switch conduction; With
When battery charge is lower than second predetermined threshold value, described reverse-current protection switch is ended.
42. device according to claim 32, wherein:
Described battery is an intelligent battery;
Described device also comprises a SMBus, and it is with described intelligent battery and described battery charger IC interconnection; With
Described battery charger IC also comprises a Sub-miniature B and a charge controller that is connected with described SMBus, and it makes battery charger IC be suitable for the device swap data that contains described intelligent battery that is connected with SMBus with other.
CN 00136919 2000-12-28 2000-12-28 Intelligent battery charger Expired - Fee Related CN1252892C (en)

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CN100405714C (en) * 2003-12-16 2008-07-23 英特赛尔美国股份有限公司 System and method of detecting phase body diode using a comparator in a synchronous rectified fet driver
CN103064494A (en) * 2005-02-01 2013-04-24 惠普开发有限公司 System and method for controlling use of power in computer system
CN104734265A (en) * 2013-12-24 2015-06-24 华硕电脑股份有限公司 Battery charging circuit and battery charging method
CN104993564A (en) * 2015-07-10 2015-10-21 常州东村电子有限公司 New energy super capacitor charging circuit
CN106099218A (en) * 2003-11-24 2016-11-09 密尔沃基电动工具公司 Operation containing set of cells and run method and the power tool battery group of set of cells
CN106452125A (en) * 2015-08-10 2017-02-22 谷歌公司 Converting alternating current power to direct current power
CN107667454A (en) * 2015-05-21 2018-02-06 罗伯特·博世有限公司 Batteries management system and group charger it is integrated
CN110138056A (en) * 2019-06-27 2019-08-16 深圳莱福德科技股份有限公司 Emergency power supply guard method and device

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CN106099218A (en) * 2003-11-24 2016-11-09 密尔沃基电动工具公司 Operation containing set of cells and run method and the power tool battery group of set of cells
CN106099218B (en) * 2003-11-24 2019-05-17 密尔沃基电动工具公司 Operation containing battery pack and the method and power tool battery group for running battery pack
CN100405714C (en) * 2003-12-16 2008-07-23 英特赛尔美国股份有限公司 System and method of detecting phase body diode using a comparator in a synchronous rectified fet driver
CN103064494A (en) * 2005-02-01 2013-04-24 惠普开发有限公司 System and method for controlling use of power in computer system
CN103064494B (en) * 2005-02-01 2016-08-03 惠普开发有限公司 For controlling the system and method for the use of power supply in computer system
CN104734265A (en) * 2013-12-24 2015-06-24 华硕电脑股份有限公司 Battery charging circuit and battery charging method
US9716404B2 (en) 2013-12-24 2017-07-25 Asustek Computer Inc. Charging circuit and charging method of battery
CN107667454B (en) * 2015-05-21 2021-03-09 罗伯特·博世有限公司 Integration of battery management system and battery charger
CN107667454A (en) * 2015-05-21 2018-02-06 罗伯特·博世有限公司 Batteries management system and group charger it is integrated
CN104993564B (en) * 2015-07-10 2018-02-13 常州东村电子有限公司 New energy super capacitor charging circuit
CN104993564A (en) * 2015-07-10 2015-10-21 常州东村电子有限公司 New energy super capacitor charging circuit
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CN110138056A (en) * 2019-06-27 2019-08-16 深圳莱福德科技股份有限公司 Emergency power supply guard method and device

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