CN1355610A - Phase digital locking method for circuit - Google Patents

Abstract

A phase lock method for digit circuit includes C32 three to two transformation matrix, M rotary transformation matrix, LPF low pass filter, the created link of unit vector, Mt rotary transformation matrix transposition, the square root of 3/2 Ct32 two to three transformation matrix, and it works as follows, adding M in-between C32 and LPF to let the circuit fundamental wave degrade as DC, adding LPF in-between M and the created link of unit vector to filter out the existing noon-DC composition after via M, adding created link of unit vector in-between LPF and Mt to reduce the time delay and transient links caused by the filter for raising the attenuatino of harmonic wave composition and speeding up the dynamic response of whole system, adding Mt in-between the created link of unit vector and the square root of 3/2 Ct32 to let the circuit fundamental wave be degraded as DC recover to the fundamental wave frequency. The method can be used for single phase, multi-phase and the multi-phase circuit by phase locking of each phase separately.

Description

A kind of phase digital locking method for circuit

Technical field

The present invention relates to the automatic control of frequency or phase place, especially relate to a kind of phase digital locking method for circuit.

Background technology

Traditional Circuit lock phase method is to adopt analog circuit phase-locked, but phase-locked complexity and the cost that has increased system inevitably of analog circuit, and the precision of phase-locked device own, temperature is floated the error homogeneity that a plurality of phase-locked loops use simultaneously in characteristic and the three-phase circuit all directly influences phase-locked accuracy.The phase digital locking method for circuit that also has a kind of proposition, but that this method only could guarantee under the distortionless situation of line voltage is more phase-locked, for its phase-locked cisco unity malfunction of voltage distortion occasion (zero crossing drifts about).

Summary of the invention

The purpose of this invention is to provide a kind of phase digital locking method for circuit, improve phase-locked precision and obtain dynamic response faster.

The technical solution used in the present invention is:

A kind of phase digital locking method for circuit comprises: C ₃₂Three-two transformation matrixs, M rotation transformation matrix, the LPF low pass filter, unit vector generates link, M ^TThe rotation transformation matrix transpose,

Two-three transformation matrixs; The three-phase periodic signal a, b, c that comprise first-harmonic and harmonic signal are through C ₃₂Three-two transformation matrixs [1] become two mutually orthogonal under alpha-beta coordinate component e _α, e _β, form complex vector jointly

, at this moment, the 3n subharmonic is by cancellation among three-phase periodic signal a, b, the c; Complex vector

With M rotation transformation matrix multiple, make the circuit first-harmonic fall the inferior direct current that is, the 3n+1 subharmonic falls once and the 3n-1 subharmonic rises once, and n is an integer, thereby obtains complex vector

Complex vector

By the LPF low pass filter, can filtering most of non-flip-flop wherein obtain complex vector , make

Generate link by unit vector and obtain normalized vector

Normalized vector

Multiply by M ^TThe rotation transformation matrix transpose obtains complex vector

, complex vector

With

Two-three transformation matrixs multiply each other, and obtain the normalization fundametal compoment of three-phase periodic signal a, b, c, finish the phase-locked of three-phase signal.

Wherein: 1) C ₃₂Three-two transformation matrixs [1]: $C_{32}=\sqrt{\frac{2}{3}}\left[\begin{array}{ccc}1& -\frac{1}{2}& -\frac{1}{2}\\ 0& \frac{\sqrt{3}}{2}& -\frac{\sqrt{3}}{2}\end{array}\right];$

2) M rotation transformation matrix [2]: $M=\left[\begin{array}{cc}\cos \mathrm{\ωt}& \sin \mathrm{\ωt}\\ -\sin \mathrm{\ωt}& \cos \mathrm{\ωt}\end{array}\right];$

3) generate link [4] for unit vector: ${\stackrel{-}{r}}_s=\frac{{\stackrel{-}{v}}_s}{\left|{\stackrel{-}{v}}_s\right|}=\left[\begin{array}{c}{r}_{\mathrm{s\α}}\\ r_{\mathrm{s\β}}\end{array}\right];$

4) M ^TRotation transformation matrix transpose [5]: $M^T=\left[\begin{array}{cc}\cos \mathrm{\ωt}& -\sin \mathrm{\ωt}\\ \sin \mathrm{\ωt}& \cos \mathrm{\ωt}\end{array}\right];$

5)

Two-three transformation matrixs [6]: $\sqrt{\frac{3}{2}}{C}_{32}^T=\left[\begin{array}{cc}1& 0\\ -\frac{1}{2}& \frac{\sqrt{3}}{2}\\ -\frac{1}{2}& -\frac{\sqrt{3}}{2}\end{array}\right]$ 。

The present invention has stable high accuracy, and has dynamic response faster, satisfies phase-locked requirement in real time.It can be applied to single-phase, heterogeneous phase-locked and distinguish phase-locked polyphase circuit mutually by each.

Description of drawings

Accompanying drawing is a phase digital locking method for circuit flow chart of the present invention.

Embodiment

As shown in drawings, it comprises: C ₃₂Three-two transformation matrixs 1, M rotation transformation matrix 2, LPF low pass filter 3, unit vector generates link 4, M ^TRotation transformation matrix transpose 5,

Two-three transformation matrixs 6; The three-phase periodic signal a, b, c that comprise first-harmonic and harmonic signal are through C ₃₂Three-two transformation matrixs 1 become two mutually orthogonal under alpha-beta coordinate component e _α, e _β, form complex vector jointly

, at this moment, the 3n subharmonic is by cancellation among three-phase periodic signal a, b, the c; Complex vector Multiply each other with M rotation transformation matrix 2, make the circuit first-harmonic fall the inferior direct current that is, the 3n+1 subharmonic falls once, and 3n-1 subharmonic liter once, and n is an integer, thereby obtains complex vector

Complex vector

By LPF low pass filter 3, can filtering most of non-flip-flop wherein obtain complex vector

, make

Generate link 4 by unit vector and obtain normalized vector , normalized vector

Multiply by M ^TRotation transformation matrix transpose 5 obtains complex vector , in the complex vector

With Two-three transformation matrixs 6 multiply each other, and obtain the normalization fundametal compoment of three-phase periodic signal a, b, c, finish the phase-locked of three-phase signal.

1 is three-two transformation matrix C among the figure ₃₂, wherein $C_{32}=\sqrt{\frac{2}{3}}\left[\begin{array}{ccc}1& -\frac{1}{2}& -\frac{1}{2}\\ 0& \frac{\sqrt{3}}{2}& -\frac{\sqrt{3}}{2}\end{array}\right],{\stackrel{-}{e}}_s=C_{32}\left[\begin{array}{c}{e}_a\\ e_b\\ e_c\end{array}\right]=\left[\begin{array}{c}{e}_{\mathrm{s\α}}\\ e_{\mathrm{s\β}}\end{array}\right],e_{\mathrm{s\α}}$ And e _{S β}Be respectively vector The axial component of α axle and β under the alpha-beta coordinate system; 2 are the rotation transformation matrix M, wherein $M=\left[\begin{array}{cc}\cos \mathrm{\ωt}& \sin \mathrm{\ωt}\\ -\sin \mathrm{\ωt}& \cos \mathrm{\ωt}\end{array}\right]$ , ω is by the fundamental signal angular frequency of phase lock circuitry, t is the time component, ${\stackrel{-}{w}}_s=M{\stackrel{-}{e}}_s=\left[\begin{array}{c}{w}_{\mathrm{s\α}}\\ w_{\mathrm{s\β}}\end{array}\right]$ 3 is low-pass filtering link LPF; 4 for unit vector generates link, ${\stackrel{-}{r}}_s=\frac{{\stackrel{-}{v}}_s}{\left|{\stackrel{-}{v}}_s\right|}=\left[\begin{array}{c}{r}_{\mathrm{s\α}}\\ r_{\mathrm{s\β}}\end{array}\right],$ Wherein ${\stackrel{-}{v}}_s=\left[\begin{array}{c}{v}_{\mathrm{s\α}}\\ v_{\mathrm{s\β}}\end{array}\right],\left|{\stackrel{-}{v}}_s\right|=\sqrt{v_{\mathrm{s\α}}^2+v_{\mathrm{s\β}}^2}$ 5 are rotation transformation matrix transpose M ^T, ${\stackrel{-}{u}}_s^{*}=M^T{\stackrel{-}{r}}_s=\left[\begin{array}{c}{u}_{\mathrm{s\α}}\\ u_{\mathrm{s\β}}\end{array}\right]$ 6 is two-three transformation matrixs

1) at C ₃₂Add M rotation transformation matrix 2 between three-two transformation matrixs 1 and the LPF low pass filter 3, its objective is to make the circuit first-harmonic fall the inferior direct current that becomes; 2) between M rotation transformation matrix 2 and unit vector (vector) generation link 4, add LPF low pass filter 3, its objective is the non-flip-flop that filtering exists through M rotation transformation matrix 2 backs; 3) at LPF low pass filter 3 and M ^TAdd between the rotation transformation matrix transpose 5 that unit vector (vector) generates link 4, its purpose is to reduce time-delay and the transient state link that is caused by filter, improves the decay to harmonic components, accelerates the dynamic response of whole system; 4) unit vector generate link 4 with

Add M between two-three transformation matrixs 6 ^TRotation transformation matrix transpose 5 its objective is to make to fall time for the circuit first-harmonic of direct current to revert to fundamental frequency.

Claims (2)

1. a phase digital locking method for circuit is characterized in that it comprises: C ₃₂Three-two transformation matrixs [1], M rotation transformation matrix [2], LPF low pass filter [3], unit vector generates link [4], M ^TRotation transformation matrix transpose [5],

Two-three transformation matrixs [6]; The three-phase periodic signal a, b, c that comprise first-harmonic and harmonic signal are through C ₃₂Three-two transformation matrixs [1] become two mutually orthogonal under alpha-beta coordinate component e _α, e _β, form complex vector jointly

, at this moment, the 3n subharmonic is by cancellation among three-phase periodic signal a, b, the c; Complex vector

Multiply each other with M rotation transformation matrix [2], make the circuit first-harmonic fall the inferior direct current that is, the 3n+1 subharmonic falls once and the 3n-1 subharmonic rises once, and n is an integer, thereby obtains complex vector

Complex vector

By LPF low pass filter [3], can filtering most of non-flip-flop wherein obtain complex vector Make

Generate link [4] by unit vector and obtain normalized vector , normalized vector

Multiply by M ^TRotation transformation matrix transpose [5] obtains complex vector

, complex vector With

Two-three transformation matrixs [6] multiply each other, and obtain the normalization fundametal compoment of three-phase periodic signal a, b, c, finish the phase-locked of three-phase signal.

2. a kind of phase digital locking method for circuit according to claim 1 is characterized in that:

1) C ₃₂Three-two transformation matrixs [1]: $C_{32}=\sqrt{\frac{2}{3}}\left[\begin{array}{ccc}1& -\frac{1}{2}& -\frac{1}{2}\\ 0& \frac{\sqrt{3}}{2}& -\frac{\sqrt{3}}{2}\end{array}\right];$

2) M rotation transformation matrix [2]: $M=\left[\begin{array}{cc}\cos \mathrm{\ωt}& \sin \mathrm{\ωt}\\ -\sin \mathrm{\ωt}& \cos \mathrm{\ωt}\end{array}\right];$

3) LPF low pass filter [3]:

4) unit vector generates link [4]: ${\stackrel{-}{r}}_s=\frac{{\stackrel{-}{v}}_s}{\left|{\stackrel{-}{v}}_s\right|}=\left[\begin{array}{c}{r}_{\mathrm{s\α}}\\ r_{\mathrm{s\β}}\end{array}\right];$

5) M ^TRotation transformation matrix transpose [5]: $M^T=\left[\begin{array}{cc}\cos \mathrm{\ωt}& -\sin \mathrm{\ωt}\\ \sin \mathrm{\ωt}& \cos \mathrm{\ωt}\end{array}\right];$

6) Two-three transformation matrixs [6]: $\sqrt{\frac{3}{2}}{C}_{32}^T=\left[\begin{array}{cc}1& 0\\ -\frac{1}{2}& \frac{\sqrt{3}}{2}\\ -\frac{1}{2}& -\frac{\sqrt{3}}{2}\end{array}\right]$ 。

Images