CN1333580C - Television circuit using single CPU to control whole machine and digital convergence system - Google Patents
Television circuit using single CPU to control whole machine and digital convergence system Download PDFInfo
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- CN1333580C CN1333580C CNB2005100452442A CN200510045244A CN1333580C CN 1333580 C CN1333580 C CN 1333580C CN B2005100452442 A CNB2005100452442 A CN B2005100452442A CN 200510045244 A CN200510045244 A CN 200510045244A CN 1333580 C CN1333580 C CN 1333580C
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Abstract
The present invention relates to a television circuit using a single CPU to control a complete machine and a digital convergence system, which comprises a demoding circuit, an A/D converting, signal processing and D/A converting circuit, an analogue signal processing circuit, a television display and rear projection display circuit, a CPU and a convergence system, wherein the CPU is connected with the demoding circuit, the A/D converting, signal processing and D/A converting circuit and the analogue signal processing circuit through a I<2>C bus line; the convergence system is connected with the CPU; the A/D converting, signal processing and D/A converting circuit also inputs HDTV and VGA signals; the convergence system comprises a convergence processing chip connected with the CPU; a convergence grid RGB signal outputted by the convergence processing chip is directly inputted into the analogue signal processing circuit; a convergence control signal is directly inputted to the television display and rear projection display circuit. The present invention realizes the goal of controlling the complete machine system and the convergence system by a single CPU, lowers the cost of a complete machine, simplifies the circuit and can be widely used for various CRT rear projection televisions.
Description
Technical field
The invention belongs to CRT rear-projection TV set circuit engineering field, more particularly relate to design with the TV set circuit of single CPU to control whole machine and digital convergence system.
Background technology
Traditional convergence circuit is one of most important circuit of rear-projection TV set.Since the CRT rear-projection TV set be by three independently electron gun be incident upon on the speculum, invest screen by speculum again, thereby can form the video picture of super large picture.Equally also because such image-forming principle, cause between RGB three looks relatively difficulty of polymerization.This just needs by convergence circuit, and the picture intelligence that three independent electronic rifles are cast out coincides together, thereby produces picture effect true to nature.
Digit convergence is a relatively independent system, comprises hardware circuit and Control Software.Traditional method is that the two CPU of employing constitute main, sub two independently system's realization controls respectively.That is: a host CPU is used to control machine system, comprises after TV signal receives carrying out the control of demodulation, acoustic processing, the control of picture decoding, switching controls of various passages or the like; Another CPU is responsible for the control of convergence yoke specially, and it is connected by the I/O mouth with host CPU, controlled by host CPU.
Since adopt two CPU controls, the circuit relative complexization, and production cost is also high.
Summary of the invention
Purpose of the present invention just is to overcome above-mentioned shortcoming and defect, and a kind of TV set circuit with single CPU to control whole machine and digital convergence system is provided.It is on the basis of traditional double CPU scheme, removes the independent CPU of control convergence yoke, directly controls the circuit of convergence portion with host CPU, realizes that by hardware circuit and software control single CPU controls machine system and convergence yoke respectively.Reduce the complete machine cost like this, simplified circuit.
In order to achieve the above object, the present invention includes and insert TV, AV and the decoding circuit of Svideo signal, the A/D change-over circuit that is connected with decoding circuit, signal processing circuit and D/A change-over circuit, the analog signal processing circuit that is connected with A/D change-over circuit, signal processing circuit and D/A change-over circuit, looking of being connected with analog signal processing circuit put and the rear-projection display circuit, pass through I
2The CPU that C bus and decoding circuit and A/D change-over circuit and signal processing circuit are connected with D/A change-over circuit and analog signal processing circuit, the convergence yoke that is connected with CPU, A/D change-over circuit and signal processing circuit and D/A change-over circuit are also imported HDTV and VGA signal, it is characterized in that convergence yoke comprises the convergence process chip that is connected with CPU, assemble the convergence grid rgb signal of process chip output and directly import analog signal processing circuit, the direct input of convergence control signal of convergence process chip output is looked and is put and the rear-projection display circuit.
Decoding circuit adopts the UOCIII chip, and A/D change-over circuit, signal processing circuit and D/A change-over circuit adopt the MST5C16 chip, and analog signal processing circuit adopts the TDA9333 chip, and CPU adopts the MTV412 chip.Assembling process chip is the STV2050A type.
Traditional CPU control convergence circuit passes through I
2The total line traffic control STV2050 circuit of C.Simultaneously, this I
2The C bus is received the XC01 interface, is connected with computer by this interface.When being used for factory's batch process, assemble automatic adjustment with computer control.This control circuit links to each other with host CPU by MAGIC_SW, D_SIZE, ADJ, BUSY.In the circuit, correct in order to guarantee the identification of row field sync signal, adopted 74HC14 that the row field system chronizing impulse is carried out shaping.In the circuit diagram, the STV2050A circuit is the integrated chip that adopts ST company, is used to send assemble the grid signal, and the adjustment variable of grid is assembled in output.The AMPLIFIER circuit is to carry out elementary amplification to assembling grid adjustment variable, outputs to the convergence amplifying circuit by socket XC02 and amplifies once more.The PORT circuit is the feedback adjusting variable.After this feedback signal entered STV2050A, through comparing, assemble adjustment algorithm etc., the next adjustment variable of output was realized the self calibration of assembling so once more.
The present invention adopts single CPU to control whole machine system and convergence yoke.Complete machine main system part: TV (TV) signal, video (AV) signal and light tone (S-Video) signal are imported UOC III respectively and are carried out decoding processing by after receiving terminal access system for TV set.Form rgb signal input MST5C16 and carry out modulus (A/D) conversion, carry out simultaneously carrying out digital-to-analogue (D/A) conversion again after the signal processing, the output rgb signal enters the TDA9333 chip and carries out the rear end analog.Put plate and form complete image frame by looking at last, come out by screen display by projection tube (Tube).High-definition digital (HDTV) signal and the VGA interface rgb signal MST5C16 that directly comes in and goes out carries out data image signal and handles, and exports rgb signal equally and enters TDA9333 and carry out the rear end analog.System control chip MTV412 passes through I
2The C bus is controlled chips such as UOC III, MST5C16 and TDA9333.
The convergence yoke part: the STV2050A of employing ST company exports OSDR, OSDG and the OSDB signal of assembling, and after TDA9333 chip back-end processing, puts the plate amplification through looking again, is imaged on demonstration convergence grid on the screen by projection tube.Here an image frame RGB who relates to exports the problem of selecting with convergence grid RGB.Traditional convergence circuit is to output signal to host CPU by convergence yoke.After the host CPU response, give the sub-CPU of convergence yoke by signal of I/O mouth output, signal of sub-CPU output of convergence yoke is given TDA9333 then, control the TDA9333 switch inside by this signal and select (be output image signal, or rgb signal being assembled in output or both export simultaneously).Now adopt single CPU to control whole machine system and convergence yoke, pass through I
2The total line traffic control TDA9333 of C, the channel selecting of carrying out rgb signal output.See software control flow chart for details.
Shown in flow chart, the convergence yoke adjustment divides three kinds of patterns.They are respectively: the auto convergence adjustment modes, manually assemble adjustment modes and 9 convergence adjustment modes.When the auto convergence adjustment modes is applied to factory's batch process, adopt convergence Adjustment System device to adjust, it is fast that this adjustment modes has speed, the precision height, and the rectification ability is strong, the characteristics that cost is low; Manually assembling adjustment modes is the convergence adjustment modes that the professional and technical personnel adopts when exploitation, after-sale service, maintenance, and this converge mode has applied range, adjusts the strong characteristics of the high rectification ability of precision; 9 converge mode are the convergence adjustment modes that provide for domestic consumer, and its method of operation is simple, and domestic consumer just can carry out with reference to explanation.
Adopt host CPU control figure convergence circuit to compare with traditional digit convergence circuit, this circuit has removed the circuit of control section.I with host CPU
2The C bus is directly controlled the STV2050A of convergence circuit, the rgb signal of assembling grid by P722A socket output and the I that is connected with host CPU
2The C bus communication.In host CPU, load the program of the original CPU of convergence, and do corresponding the adjustment, so just realized the circuit of single CPU control convergence portion.
Task of the present invention comes to this and finishes.
The present invention adopts optimal design on the basis of traditional double CPU scheme, realized single CPU control convergence circuit by software.Removed the independent CPU of control convergence yoke, directly controlled the circuit of convergence portion, realized that by hardware circuit and software control single CPU controls machine system and convergence yoke respectively with host CPU.Reduce the complete machine cost, simplified circuit, improved the rear-projection competitiveness of product in market.It can be widely used in the various CRT rear-projection TV sets.The rear-projection product will obtain with the advantage of low cost, large-screen, high definition popularizing widely.
Description of drawings
Fig. 1 is a theory diagram of the present invention.
Fig. 2 is its circuit theory diagrams.
Fig. 3 is a software flow pattern.
Fig. 4 is the block diagram that traditional CPU controls convergence yoke.
Embodiment
Embodiment 1.A kind of TV set circuit with single CPU to control whole machine and digital convergence system is shown in Fig. 1～3 figure.The A/D conversion that it comprises the decoding circuit (1) that inserts TV, AV, Svideo signal, be connected with decoding circuit (1) and signal processing and D/A change-over circuit (2), the analog signal processing circuit (3) that is connected with D/A change-over circuit (2) with A/D conversion and signal processing, looking of being connected with analog signal processing circuit (3) are put and rear-projection display circuit (4), pass through I
2The CPU that C bus and decoding (1) and A/D conversion and signal processing are connected with D/A conversion (2) and analog signal processing circuit (3), the convergence yoke that is connected with CPU.A/D conversion and signal processing and D/A change-over circuit (2) are also imported HDTV and VGA signal.Convergence yoke comprises the convergence process chip (5) that is connected with CPU.Assemble the convergence grid rgb signal of process chip (5) output and directly import analog signal processing circuit (3), the direct input of the convergence control signal of convergence process chip (5) output is looked and is put and rear-projection display circuit (4).
Decoding circuit (1) adopts the UOCIII chip, and A/D conversion and signal processing and D/A change-over circuit (2) adopt the MST5C16 chip, and analog signal processing circuit (3) adopts the TDA9333 chip, and CPU adopts the MTV412 chip.Assembling process chip (5) is the STV2050A type.
Claims (3)
1. TV set circuit with single CPU to control whole machine and digital convergence system, it comprises inserts TV, AV and the decoding circuit of Svideo signal, the A/D change-over circuit that is connected with decoding circuit, signal processing circuit and D/A change-over circuit, the analog signal processing circuit that is connected with A/D change-over circuit, signal processing circuit and D/A change-over circuit, looking of being connected with analog signal processing circuit put and the rear-projection display circuit, passes through I
2The CPU that C bus and decoding circuit and A/D change-over circuit and signal processing circuit are connected with D/A change-over circuit and analog signal processing circuit, the convergence yoke that is connected with CPU, A/D change-over circuit and signal processing circuit and D/A change-over circuit are also imported HDTV and VGA signal, it is characterized in that convergence yoke comprises the convergence process chip that is connected with CPU, assemble the convergence grid rgb signal of process chip output and directly import analog signal processing circuit, the direct input of convergence control signal of convergence process chip output is looked and is put and the rear-projection display circuit.
2. according to the described TV set circuit of claim 1 with single CPU to control whole machine and digital convergence system, it is characterized in that said decoding circuit adopts the UOCIII chip, A/D change-over circuit, signal processing circuit and D/A change-over circuit adopt the MST5C16 chip, analog signal processing circuit adopts the TDA9333 chip, and CPU adopts the MTV412 chip.
3. according to claim 1 or 2 described TV set circuit, it is characterized in that said convergence process chip is the STV2050A type with single CPU to control whole machine and digital convergence system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100452442A CN1333580C (en) | 2005-11-21 | 2005-11-21 | Television circuit using single CPU to control whole machine and digital convergence system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100452442A CN1333580C (en) | 2005-11-21 | 2005-11-21 | Television circuit using single CPU to control whole machine and digital convergence system |
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| Publication Number | Publication Date |
|---|---|
| CN1794795A CN1794795A (en) | 2006-06-28 |
| CN1333580C true CN1333580C (en) | 2007-08-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2005100452442A Active CN1333580C (en) | 2005-11-21 | 2005-11-21 | Television circuit using single CPU to control whole machine and digital convergence system |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004080609A (en) * | 2002-08-21 | 2004-03-11 | Hitachi Ltd | Convergence correction circuit and display device using it |
| CN1606360A (en) * | 2003-10-06 | 2005-04-13 | Lg电子株式会社 | Apparatus and method for adjusting convergence of projection television |
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- 2005-11-21 CN CNB2005100452442A patent/CN1333580C/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004080609A (en) * | 2002-08-21 | 2004-03-11 | Hitachi Ltd | Convergence correction circuit and display device using it |
| CN1606360A (en) * | 2003-10-06 | 2005-04-13 | Lg电子株式会社 | Apparatus and method for adjusting convergence of projection television |
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| Publication number | Publication date |
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| CN1794795A (en) | 2006-06-28 |
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Address after: 266071 Shandong city of Qingdao province Jiangxi City Road No. 11 Patentee after: HISENSE Co.,Ltd. Patentee after: Hisense Video Technology Co.,Ltd. Address before: 266071 Shandong city of Qingdao province Jiangxi City Road No. 11 Patentee before: HISENSE Co.,Ltd. Patentee before: HISENSE ELECTRIC Co.,Ltd. |
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