CN1324922C - Detecting device for base band signal processing sub system in CDMA communication system - Google Patents
Detecting device for base band signal processing sub system in CDMA communication system Download PDFInfo
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- CN1324922C CN1324922C CNB2003101129454A CN200310112945A CN1324922C CN 1324922 C CN1324922 C CN 1324922C CN B2003101129454 A CNB2003101129454 A CN B2003101129454A CN 200310112945 A CN200310112945 A CN 200310112945A CN 1324922 C CN1324922 C CN 1324922C
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Abstract
The present invention discloses a testing device for a base band signal processing subsystem in a CDMA system, which comprises a main controller, a testing module of reverse test signal generation and forward receiving signal processing, a communication sending/receiving testing module and a clock circuit testing module, wherein the main controller is used for carrying out configuration to a test environment required by a subsystem to be tested, controlling each testing module to complete a test to a physical passage having a reverse receiving demodulation function and a forward modulation function, and receiving a test result; the testing module of reverse test signal generation and forward receiving signal processing is used for providing reverse test signals and processing forward test signals; the communication receiving/sending testing module is used for interconnecting the main controller with the subsystem to be tested, and testing a physical passage for inputting and outputting the data frames of the subsystem to be tested; the clock circuit testing module is used for providing clock signals required by a testing single board. The testing device of the present invention does not depend on CDMA system equipment and tests the quality of a single-board physical passage to be tested in an independent environment. The present invention has the advantages of simple operation, improved testing efficiency and cost reduction.
Description
Technical field
The invention belongs to the field tests of CDMA mobile communication equipment, specifically, is the testing apparatus that the base band signal process subsystem is formed veneer in a kind of CDMA mobile communication system base station transceiver.
Background technology
Usually, the CDMA mobile communcations system generally comprises MSC mobile switching centre and location registration system, BSM base station management system, BSC base station controller and multichannel BTS base station transceiver, base station transceiver mainly is made up of base band signal process subsystem and radiofrequency signal processing subsystem, please refer to Fig. 1, wherein the major function of base band signal process subsystem 301 is both ways:
To become baseband signal through the baseband interface conversion of signals that radio frequency processing subsystem 302 is handled afterwards on the one hand, from baseband signal, extract the Frame that portable terminal sent again;
The Frame that communication network is sent converts baseband signal on the other hand, converts baseband signal to radiofrequency signal again, by sending portable terminal 303 in the air to.
The base band signal process subsystem generally is made up of a veneer in the base station transceiver, the system equipment manufacturer is carrying out veneer production or is adding man-hour at present, the quality of production that need provide means of testing to guarantee veneer, the testing equipment and the corresponding method of generally carrying out production test have following two kinds:
A kind of is system test equipment: each tested single board is inserted the corresponding groove position on the base station transceiver BTS on the operating CDMA mobile communcations system equipment, the operational system device program, utilizing system network management is a system for simulating with whole C DMA mobile communcations system equipment disposition, utilize testing mobile phone, to channel of a channel respectively by making a phone call, realize tested base band signal process subsystem is formed the test of veneer, if each channel can both be got through, show that then this veneer is normal; If there is a channel not get through, then this veneer is abnormal.
The advantage of this method of testing is: can form that veneer is done comprehensive functional test and performance test, test environment are built easily to tested base band signal process subsystem, shortcoming is fairly obvious also: its rely on system environments, testing efficiency lower, be not suitable for that base station signal processing subsystem is independently formed veneer and judge.
Another kind of then CDMA comprehensive tester that employing is special-purpose is tested tested single board: tested single board is inserted the corresponding groove position on the base station BTS on the operating CDMA mobile communcations system equipment, the operational system device program, utilizing system network management is a system for simulating with CDMA mobile communcations system equipment disposition.In inverse direction, utilize the CDMA comprehensive tester to send the CDMA test signal at radio-frequency head, the test signal of on webmaster the CDMA comprehensive tester being sent is monitored, and realizes the base band signal process subsystem is formed the monitoring of veneer negative function; At forward direction, utilize network management system, assign the CDMA test signaling, on the CDMA comprehensive tester, institute's signaling is detected the monitoring that realizes the base band signal process subsystem is formed veneer forward direction function.
The characteristics of this method of testing are to have adopted to be suitable for special signaling of cdma system and signal, can compare comprehensive detection to the function of base band signal process subsystem composition veneer, being suitable for the system equipment research staff adopts when tested single board is researched and developed, but with respect to large batch of production process, there is the problem that operation is inconvenient, the artificial degree of participation of test process is higher, testing efficiency is low in this method of testing.
Summary of the invention
The deficiency of forming the single board production test technology at existing base band signal process subsystem, the technical problem to be solved in the present invention provides the testing apparatus of base band signal process subsystem in a kind of cdma system, can finish the physical path fault location of the base band signal process subsystem being formed veneer, and cost is low, the testing efficiency height.
In order to solve the problems of the technologies described above, the invention provides the testing apparatus of base band signal process subsystem in a kind of code division multiple address communication system, the clock circuit test module that comprise master controller, is connected respectively with master controller, negative testing signal produce and the forward direction received signal is handled test module and communication reception/transmission test module, and described each test module is mutually interconnected with tested base band signal process subsystem; Wherein:
Each test module of described main controller controls is finished the configuration to the required test environment in described tested subsystem periphery, the oppositely test of the physical path quality of receiving demodulation function and forward direction modulation function; And receive the test result report;
Described clock circuit test module is used to provide described tested subsystem required clock;
Described negative testing signal produces and the forward direction received signal is handled test module, is used for providing the negative testing signal to tested subsystem, and the forward direction test signal is handled, and realizes the test of tested subsystem baseband modulation and demodulation processing capacity physical path;
Described communication reception/transmission test module is used for master controller and the interconnection of tested subsystem are realized the automatic download of test control program and the information communication between testing apparatus and the tested single board; Simultaneously, also be used to realize the physical path test of described tested subsystem Frame input and output.
In the such scheme, described clock test module can adopt following structure, comprising: the high precision clock source circuit is used to provide the high accuracy clock benchmark; Export clock generation circuit, be used to receive the clock reference of output, produce the required various clocks of described tested subsystem; The electric level interface change-over circuit, the various clocks that are used for producing are converted to the needed clock signal of tested subsystem, and output to described tested subsystem; And interface module, be used to export the information interaction between clock generation circuit and the master controller.
In the such scheme, described negative testing signal produces and forward direction received signal processing test module can adopt following structure, comprise: negative testing signal and forward direction received signal control and treatment circuit, be used to receive the control command of master controller, negative testing signal generating circuit and forward direction received signal treatment circuit are controlled; The negative testing signal generating circuit is used for to described tested subsystem output negative testing signal; Forward direction received signal treatment circuit is used for the forward direction test signal that described tested subsystem is sent here is handled; Test result storage and clear circuit, the result that is used to preserve described forward direction received signal treatment circuit is sent to described master controller by interface module, and before carrying out new test with the saving result zero clearing; Interface module, be used for and described master controller between information interaction.
In the such scheme, described communication reception/transmission test module can adopt following structure, comprise: CPU mini system module, be used for by respective interface modules interconnectedly with master controller and described tested subsystem respectively, finish the information interaction between described communication reception/transmission test module and master controller, master controller and the described tested subsystem; The Frame test signal produces circuit, is used to produce the Frame test signal of simulation and outputs to described tested subsystem; The Frame receiving processing circuit is used for the test data frame that described tested subsystem is sent here is handled; Frame test result storage and clear circuit, the result that is used to preserve test data frame, and send back to described master controller by interface module and handle, and before carrying out new test with the saving result zero clearing.
In the such scheme, be characterized in that described clock circuit test module, the interface module that the negative testing signal produces and the forward direction received signal is handled between test module and the described master controller are bus interface module; Interface module with described master controller communication in the described CPU mini system module is a Network Interface Module, and directly passes through the cpu bus communication between the described tested subsystem.
As from the foregoing, testing apparatus of the present invention does not rely on cdma system equipment, independently just can form the forward direction transmission of veneer and modulate with oppositely physical path quality, the quick automatically of Frame input and output physical path quality of receiving demodulation function are tested realizing the base band signal process subsystem in the environment at one.Because the test to tested single board is finished in the testing equipment of a platform independent, be suitable for producing/batch testing of maintenance process.In addition, the test owing to each tested single board only being made physics path quality helps improving production test efficient, and helps reducing the testing equipment input cost.
Description of drawings
Fig. 1 is the structural representation of cdma base station transceiver BTS;
Fig. 2 is the structural representation that CDMA base band signal process subsystem is formed veneer;
Fig. 3 is the whole block diagram of embodiment of the invention testing apparatus;
Fig. 4 is the block diagram of clock circuit test module among Fig. 3;
Fig. 5 is that the negative testing signal produces and the block diagram of forward direction received signal processing test module among Fig. 3;
Fig. 6 is among Fig. 3 and the block diagram of the communication reception/transtation mission circuit test module of tested subsystem communication.
Embodiment
Below in conjunction with accompanying drawing, further describe the testing apparatus of the embodiment of the invention.
Shown in Figure 2 is the structural representation that CDMA base band signal process subsystem is formed veneer 400, when itself and testing apparatus of the present invention are used, Radio Frequency Subsystem interface circuit 401 wherein, the negative testing signal that is used for the acceptance test device, deliver to modem chip 402 after the processing, and receive the forward direction test signal of modem chip generation and deliver to testing apparatus; Modem chip 402 is used for extracting the Frame that is sent from the negative testing signal, and the test data frame signal is modulated, and produces the forward direction test signal; Processor interface circuit 403 is used for control program and write-in program memory that the acceptance test device is sent, finishes the initial configuration to all physical path chips on the tested single board; Clock interface processing unit 404 is used for the clock signal that the acceptance test device provides, and handles the back and uses for functional module on the veneer; Frame Processing Interface circuit 405 is used to finish the transmission and the reception of Frame between modem chip and the testing apparatus.Modem chip 402 is core components of above-mentioned veneer, in the present embodiment, is example with the modem chip of Qualcomm, as C5000.
In order to realize BTS base station transceiver base band signal process subsystem is formed the test of veneer, as shown in Figure 3, the testing apparatus 500 of the embodiment of the invention comprises master controller 501, by bus interface (as, isa bus, vxi bus, cpci bus) mode is connected to internal bus 507 concurrently to produce with the clock circuit test module 502 of master controller 501 communications and negative testing signal and forward direction received signal processing test module 503, and, formed a testing apparatus 500 jointly by the communication reception/transmission test module 504 that the network interface mode uses netting twine 508 to be connected with master controller 501.It is mutually interconnected that this testing apparatus 500 is formed veneer by connection and cable and tested subsystem.
Clock circuit test module 502 is used to the clock that provides tested single board required, as 19.6608MPECL level clock, PP2S PECL level clock and 10M Transistor-Transistor Logic level clock;
The negative testing signal produces and the forward direction received signal is handled test module 503, be used for that tested subsystem is formed veneer the negative testing signal is provided, and the forward direction test signal handled, realize that tested subsystem forms the test of veneer baseband modulation and demodulation processing capacity physical path;
Communication reception/transmission test module 504 is used for master controller 501 and tested subsystem are formed the veneer interconnection, realizes the automatic download of test control program and the information communication between testing apparatus and the tested single board; Simultaneously, also be used to realize the physical path test of tested single board Frame input and output.
Below in conjunction with Fig. 4, Fig. 5, Fig. 6 testing apparatus of the present invention is described further.
Fig. 4 is the block diagram of clock circuit test module 502, and as shown in the figure, wherein high precision clock source circuit 601 provides high-precision OCXO clock reference for output clock generation circuit 602; Output clock generation circuit 602, be used to produce the required various clocks of tested single board, the clock of being exported is through PECL electric level interface change-over circuit 603, for tested subsystem is formed 19.6608Mhz clock and the PP2S clock that veneer provides to be needed, through Transistor-Transistor Logic level interface conversion circuit 604, for tested subsystem is formed the 10Mhz clock that veneer provides to be needed; Bus interface module 605 is used for the information interaction between clock circuit test module 502 and the master controller 501, realizes the control of master controller to this test module.Can additions and deletions when originally stating module to the needs of clock signal according to test.
Fig. 5 is the block diagram that generation of negative testing signal and forward direction received signal are handled test module 503, as shown in the figure, wherein: negative testing signal and forward direction received signal control and treatment circuit 701, be used for receiving control command from master controller 501, negative testing signal generating circuit 702 and forward direction received signal treatment circuit 703 are controlled by bus interface module 705; Negative testing signal generating circuit 702 is used to provide tested base band signal process subsystem to form the needed negative testing signal of veneer; Forward direction received signal treatment circuit 703 is used for the forward direction test signal that base band signal process subsystem composition veneer is sent here is handled; Test result storage and clear circuit 704, the result that is used to preserve forward direction received signal treatment circuit 703 is sent to master controller 501 by bus interface module 705, and before carrying out new test with the saving result zero clearing; Bus interface module 705 is used to realize the information interaction between negative testing signal and forward direction received signal control and treatment circuit 701 and the master controller 501.
Fig. 6 is the block diagram of communication reception/transmission test module 504, wherein, CPU mini system module 911 is the Network Interface Module 915 by disposing in it on the one hand, with master controller 501 interconnection, realization is to the control of this test module, and it is interconnected to form veneer by cpu i/f bus and tested subsystem on the other hand, in order to finish the information interaction between master controller 501 and the tested base band signal process subsystem composition veneer, in the present embodiment, cpu bus adopts the PrPMC bus of standard.The Frame test signal produces circuit 912, is used to produce the Frame test signal of simulation; Frame receiving processing circuit 914 is used to finish the processing to the input test Frame; Frame test result storage and clear circuit 913, the result that is used to preserve test data frame is sent back to master controller 501 by described Network Interface Module 915 and is handled, and before carrying out new test with the saving result zero clearing.
Based on above-mentioned testing apparatus, the present invention mainly may further comprise the steps when tested base band signal process subsystem composition veneer is tested:
Assign test instruction then and give each test module, carry out test assignment; The negative testing signal produces and the forward direction received signal is handled test module 503, communication reception/transmission test module 504, form under the cooperation of test control program in veneer inner treater interface unit circuit 403 program storages at tested base band signal process subsystem, finish test job tested single board;
After test is finished test result is sent back to master controller, and, prepare to test next time the zero clearing of test result memory cell.
May further comprise the steps when carrying out the test of physical path quality that tested base band signal process subsystem forms the reverse receiving demodulation function of veneer:
Negative testing signal and forward direction received signal control and treatment circuit 701 by bus interface module 705, receive the order that master controller 501 is sent, and give negative testing signal generating circuit 702 after the processing, produce the negative testing signal of simulation;
Described simulated inverse test signal is delivered to the Radio Frequency Subsystem interface circuit 401 that tested base band signal process subsystem is formed veneer 400, handles the back to modem chip 402;
The Frame receiving processing circuit is finished the processing to the input test Frame, simultaneously test result is left in test result storage and the clear circuit 913;
Test result is sent back to master controller 501 by the Network Interface Module 915 of configuration in the CPU mini system module 911 again and is handled.
May further comprise the steps when carrying out the test of physical path quality that tested base band signal process subsystem forms veneer forward direction modulation function:
Frame test signal in the communication reception/transmission test module 504 produces circuit 912, by the Network Interface Module 915 of configuration in the CPU mini system module 911, receives the test command that master controller 501 is sent, and produces the Frame test signal of simulation;
Described Frame test signal outputs to modem chip 402 after sending into data-processing interface circuit 405 processing of tested single board;
Described forward direction test signal outputs to forward direction received signal treatment circuit 703 through Radio Frequency Subsystem interface circuit 401, finishes sending the processing of forward direction test signal here;
Test result after finishing dealing with leaves in test result storage and the clear circuit 704, and master controller 501 obtains test result by bus interface module 605 and handles.
Produce and handle for concrete signal, present embodiment of the present invention adopts following proposal:
For forward direction, the forward direction test signal of generation is the sine wave signal that certain amplitude is arranged.If tested subsystem can't produce desired forward direction sine wave, the physical path that then is judged as forward link has fault.Also can adopt I, the Q test signal of standard.
For oppositely, the negative testing signal adopts 10M sine wave or the square wave that satisfies certain energy requirement, send the second test signal, amplitude is 4.0 ~ 5.0V for the first time, for the second time amplitude is 0.0 ~ 0.5V, and the Frame receiving processing circuit judges according to test result, as for the first time or secondary test result all less than the threshold values of a setting, perhaps the ratio of the first time and secondary test result is less than the threshold values of a setting, and the physical path that is judged as reverse link has fault.The negative testing signal also can adopt I, the Q test signals reverse of standard.
It should be noted that method of testing of the present invention is not limited thereto, dependence test means of the prior art all can be used.
Compare with the method that adopts the CDMA comprehensive tester that tested single board is tested in the background technology, the function that the present invention finishes former cause network management system, cdma system and comprehensive tester when test process by one independently testing apparatus realize, thereby in environment just can realize independently that at one the base band signal process subsystem forms the forward direction of veneer and send modulation and oppositely the physical path quality, the test fast automatically of Frame input and output physical path quality of receiving demodulation function.The testing apparatus that the present invention forms is simple in structure, easy to operate, thereby be particularly suitable for producing/cdma base station transceiver base band signal process subsystem is formed the test in enormous quantities of veneer in the maintenance process, owing to each tested single board is only done the test of physics path quality, help improving production test efficient, and help reducing the testing equipment input cost.
On the basis of the foregoing description, can also carry out various conversion, between each test module and the interface mode between test module and the tested subsystem do not limit in an embodiment mode, the layout of each functional unit is partable also.Also can change into bus interface as the Network Interface Module among Fig. 6 and to realize communicating by letter of master controller and communication reception/transmission test module, each test module can a shared interface module etc.
Claims (5)
1, the testing apparatus of base band signal process subsystem in a kind of code division multiple address communication system, it is characterized in that the clock circuit test module, the negative testing signal that comprise master controller, be connected with master controller respectively produce and the forward direction received signal is handled test module and communication reception/transmission test module, described each test module is mutually interconnected with tested base band signal process subsystem, wherein:
Each test module of described main controller controls is finished the configuration to the required test environment in described tested subsystem periphery, the oppositely test of the physical path quality of receiving demodulation function and forward direction modulation function; And receive the test result report;
Described clock circuit test module is used to provide described tested subsystem required clock;
Described negative testing signal produces and the forward direction received signal is handled test module, is used for providing the negative testing signal to tested subsystem, and the forward direction test signal is handled, and realizes the test of tested subsystem baseband modulation and demodulation processing capacity physical path;
Described communication reception/transmission test module is used for master controller and the interconnection of tested subsystem are realized the automatic download of test control program and the information communication between testing apparatus and the tested single board; Simultaneously, also be used to realize the physical path test of described tested subsystem Frame input and output.
2, testing apparatus as claimed in claim 1 is characterized in that, described clock test module comprises:
The high precision clock source circuit is used to provide the high accuracy clock benchmark;
Export clock generation circuit, be used to receive the clock reference of output, produce the required various clocks of described tested subsystem;
The electric level interface change-over circuit, the various clocks that are used for producing are converted to the needed clock signal of tested subsystem, and output to described tested subsystem; And
Interface module is used to export the information interaction between clock generation circuit and the master controller.
3, testing apparatus as claimed in claim 1 is characterized in that, described negative testing signal produces and forward direction received signal processing test module comprises:
Negative testing signal and forward direction received signal control and treatment circuit are used to receive the control command of master controller, and negative testing signal generating circuit and forward direction received signal treatment circuit are controlled;
The negative testing signal generating circuit is used for to described tested subsystem output negative testing signal;
Forward direction received signal treatment circuit is used for the forward direction test signal that described tested subsystem is sent here is handled;
Test result storage and clear circuit, the result that is used to preserve described forward direction received signal treatment circuit is sent to described master controller by interface module, and before carrying out new test with the saving result zero clearing;
Interface module, be used for and described master controller between information interaction.
4, testing apparatus as claimed in claim 1 is characterized in that, described communication reception/transmission test module comprises:
CPU mini system module is used for by respective interface modules interconnectedly with master controller and described tested subsystem respectively, finishes the information interaction between described communication reception/transmission test module and master controller, master controller and the described tested subsystem;
The Frame test signal produces circuit, is used to produce the Frame test signal of simulation and outputs to described tested subsystem;
The Frame receiving processing circuit is used for the test data frame that described tested subsystem is sent here is handled;
Frame test result storage and clear circuit, the result that is used to preserve test data frame, and send back to described master controller by interface module and handle, and before carrying out new test with the saving result zero clearing.
5, testing apparatus as claimed in claim 4 is characterized in that, described clock circuit test module, the interface module that the negative testing signal produces and the forward direction received signal is handled between test module and the described master controller are bus interface module; Interface module with described master controller communication in the CPU mini system module is network interface or bus interface module, and then directly passes through the cpu bus communication between the described tested subsystem.
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| CNB2003101129454A CN1324922C (en) | 2003-12-26 | 2003-12-26 | Detecting device for base band signal processing sub system in CDMA communication system |
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| CNB2003101129454A CN1324922C (en) | 2003-12-26 | 2003-12-26 | Detecting device for base band signal processing sub system in CDMA communication system |
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| CN1555209A CN1555209A (en) | 2004-12-15 |
| CN1324922C true CN1324922C (en) | 2007-07-04 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN100391171C (en) * | 2005-08-17 | 2008-05-28 | 大唐移动通信设备有限公司 | Installation and system for testing data in baseband protocol in third generation mobile communication system |
| CN101159499B (en) * | 2007-11-07 | 2011-11-30 | 中兴通讯股份有限公司 | Method of testing hardware module |
| CN101183900B (en) * | 2007-11-23 | 2011-08-31 | 深圳国人通信有限公司 | Baseband extension radio frequency subsystem RRU testing method, system and analog BBU device |
| CN110531713B (en) * | 2019-08-07 | 2021-05-11 | 北京全路通信信号研究设计院集团有限公司 | Automatic production test method and system for train control single board based on industrial robot |
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