CN1324800C - Brushless motor driving device - Google Patents
Brushless motor driving device Download PDFInfo
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- CN1324800C CN1324800C CNB200410075183XA CN200410075183A CN1324800C CN 1324800 C CN1324800 C CN 1324800C CN B200410075183X A CNB200410075183X A CN B200410075183XA CN 200410075183 A CN200410075183 A CN 200410075183A CN 1324800 C CN1324800 C CN 1324800C
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Abstract
The present invention relates to a brushless motor driving device. A Hall detection circuit generates a position detection signal which stands for the position relation between a rotor and a coil of a motor. A signal synthesis circuit leads the position detection signal to be transformed into a driving signal. The driving signal is compared with a high frequency reference signal, a pulse signal used for controlling a switching circuit is generated, and the motor is driven. The feedback of a current error signal adjusts the corresponding relation between the oscillation amplitude of the driving signal and the oscillation amplitude of the high frequency reference signal. Therefore, the recurring task of the pulse signal is changed. A recurring task limiting circuit is provided, and the recurring task of the pulse signal is limited, which ensures that the motor reliably rotates.
Description
Technical field
The present invention relates to a kind of motor drive, relate in particular to a kind of motor drive that is used to drive brushless motor.
Background technology
Fig. 1 (a) has shown the circuit block diagram of brushless motor driving device commonly used.With reference to Fig. 1 (a), motor M is the three-phase direct-current brushless motor with three-phase coil U, V and W.Hall testing circuit 11 is arranged at around the motor M, in order to detect the rotor-position of motor M, produces three position detection signal HU, HV and HW thus.In response to position detection signal HU, HV and HW, signal synthesis circuit 12 produces three and drives string ripple signal SU, SV and SW.Subsequently, drive string ripple signal SU, SV and SW input pulse-width modulation (Pulse Width Modulation, PWM) comparison circuit 13, the high frequency triangle wave signal T that is used for respectively independently being produced with oscillating circuit 14 compares.Based on the comparison that drives between string ripple signal SU, SV and SW and the high frequency triangle wave signal T, PWM comparison circuit 13 produces three pulse signal PU, PV and PW, is supplied to three drive circuit (Pre-driver) N1, N2 and N3 in advance respectively.In response to pulse signal PU, drive circuit N1 produces switching signal UH and UL in advance.In response to pulse signal PV, drive circuit N2 produces switching signal VH and VL in advance.In response to pulse signal PW, drive circuit N3 produces switching signal WH and WL in advance.
Three-phase commutation circuit 15 has switch S 1 and S2, switch S 3 and S4 and switch S 5 and S6, is subjected to switching signal UH and UL, VH and VL and WH and WL respectively and controls.When switch S 1 formed short circuit, motor drive current Im can flow into coil U from driving voltage source Vdd, and when switch S 2 formed short circuit, motor drive current Im can flow to ground potential from coil U.When switch S 3 formed short circuit, motor drive current Im can flow into coil V from driving voltage source Vdd, and when switch S 4 formed short circuit, motor drive current Im can flow to ground potential from coil V.When switch S 5 formed short circuit, motor drive current Im can flow into coil W from driving voltage source Vdd, and when switch S 6 formed short circuit, motor drive current Im can flow to ground potential from coil W.
In order to detect motor drive current Im, series resistance Rs is arranged between the common tie point and ground potential of switch S 2, S4 and S6.The motor drive current Im potential difference that series resistance Rs caused of flowing through provides to the inverting input of error amplifying circuit EA, as negative feedback.Error amplifying circuit EA relatively represents potential difference and the current command signal Icom of motor drive current Im, and produces current error signal Ierr.Signal synthesis circuit 12 according to current error signal Ierr adjust drive string ripple signal SU, SV, with the amplitude of SW.
Fig. 1 (b) has shown the waveform sequential chart of the operation of brushless motor driving device commonly used.Because three-phase coil U, the V of motor M and each of W are operated with similar waveform, so for for the purpose of the simplified illustration, Fig. 1 (b) has only shown the waveform sequential chart of coil U when operating that is associated with motor M.With reference to Fig. 1 (b), drive string ripple signal SU and high frequency triangle wave signal T and produce pulse signal PU through PWM comparison circuit 13 backs.Particularly, the high level of pulse signal PU is corresponding to driving the situation of string ripple signal SU greater than high frequency triangle wave signal T, and the low level of pulse signal PU is then corresponding to driving the situation of string ripple signal SU less than high frequency triangle wave signal T.In response to pulse signal PU, predrive circuit N1 produces switching signal UH and UL, in order to difference control switch S1 and S2.
Equal current command signal Icom for motor drive current Im is adjusted to, Ierr is to signal synthesis circuit 12 for error amplifying circuit EA output current error signal, in order to adjust the amplitude that drives string ripple signal SU.For example, as motor drive current Im during less than current command signal Icom, current error signal Ierr control signal combiner circuit 12 makes the amplitude that drives string ripple signal SU become big, becomes to drive string ripple signal SU '.Can know from Fig. 1 (b) and to find out that the driving string ripple signal SU ' that amplitude is bigger makes PWM comparison circuit 13 produce the bigger pulse signal PU ' of duty cycles.In response to the bigger pulse signal PU ' of duty cycle, three-phase commutation circuit 15 increases motor drive current Im, with more near current command signal Icom.
Yet, under the too big situation of motor drive current Im and current command signal Icom gap, when for example motor M has just begun to activate, motor drive current Im is almost nil, and signal synthesis circuit 12 is in order to respond great current error signal Ierr even may to produce the driving string ripple signal SU that amplitude surpasses high frequency triangle wave signal T ".As a result, PWM comparison circuit 13 produces the pulse signal PU that frequency is lower than high frequency triangle wave signal T ".This low frequency pulse signal PU " cause the motor torque ripple excessive, and motor rotates slack shortcoming.In addition, low frequency pulse signal PU " continue to be in high level state or low level state with considerable time, cause three-phase commutation circuit 15 to maintain supply or the mode of operation of feed motor drive current Im not for a long time.Long-time feed motor drive current Im may burn motor M and three-phase commutation circuit 15, or the too high and operation of trigger protection mechanism positive closing circuit of Yin Wendu.
Summary of the invention
Because foregoing problems, one of the object of the invention is to provide a kind of brushless motor driving device, can limit the duty cycle of pulse signal.
Another object of the present invention is to provide a kind of brushless motor driving device, prevent that low-frequency pulse signal from producing.
Another purpose of the present invention is to provide a kind of brushless motor driving device, prevents that pulse signal from continuing to be in high level state or low level state for a long time.
According to an aspect of the present invention, a kind of brushless motor driving device is provided, comprise a comparison circuit, be used for comparison one drive signal and a reference signal, to produce a pulse signal, wherein this drive signal is relevant with the rotation of a brushless motor, and the frequency of this reference signal is greater than the frequency of this drive signal; One switches circuit, is coupled between a driving voltage source and this brushless motor, is controlled by this pulse signal, to drive this brushless motor; One device is used for adjusting relativeness between the amplitude of the amplitude of this drive signal and this reference signal according to a current error signal, and this current error signal is represented the difference between a current command signal and the motor drive current; An and duty cycle restricting circuits, be used to limit the duty cycle of this pulse signal, it is characterized in that: this duty cycle restricting circuits is coupled between this comparison circuit and this commutation circuit, makes this pulse signal to be sent to this commutation circuit by this duty cycle restricting circuits.
According to one embodiment of the invention, a kind of brushless motor driving device is provided, be provided with the duty cycle restricting circuits, in order to the duty cycle of restriction pulse signal.The Hall testing circuit produces a position detection signal, and position detection signal is represented the rotor and the relation of the position between the coil of motor.Signal synthesis circuit converts position detection signal to drive signal.Based on the comparison of drive signal and high frequency reference signal and produce the pulse signal that is used to control commutation circuit, with CD-ROM drive motor.Current error signal by the feedback adjusting drive signal amplitude and the relativeness between the amplitude of high frequency reference signal, change the duty cycle of pulse signal thus.
The amplitude of drive signal became situation above the amplitude of high frequency reference signal because of current error signal greatly under, because the restriction of duty cycle restricting circuits, the pulse signal that is produced still had enough frequencies and appropriate tasks cycle.Therefore, the duty cycle restricting circuits guarantees that motor rotates reliably, prevents the caused shortcoming of prior art effectively.
Preferably, the duty cycle restricting circuits comprises first comparator and second comparator.First comparator produces positive half cycle duty cycle restricting signal based on high frequency reference signal with the comparison of the positive half cycle cut-off level of being scheduled to.The high level time of pulse signal is constrained to the high level time that is less than or equal to positive half cycle duty cycle restricting signal.Second comparator produces negative half period duty cycle restricting signal based on high frequency reference signal with the comparison of the negative half period cut-off level of being scheduled to.The low level time of pulse signal is constrained to the low level time that is less than or equal to negative half period duty cycle restricting signal.
Preferably, Yu Ding positive half cycle cut-off level is set in the maximum that is slightly less than high frequency reference signal.Preferably, Yu Ding negative half period cut-off level is set in the minimum value that is slightly larger than high frequency reference signal.
Description of drawings
Fig. 1 (a) has shown the circuit block diagram of brushless motor driving device commonly used.
Fig. 1 (b) has shown the waveform sequential chart of the operation of brushless motor driving device commonly used.
Fig. 2 (a) has shown the circuit block diagram according to brushless motor driving device of the present invention.
Fig. 2 (b) has shown the example detailed circuit diagram according to duty cycle restricting circuits of the present invention.
Fig. 2 (c) has shown the waveform sequential chart according to the operation of brushless motor driving device of the present invention.
The primary clustering symbol description
11 Hall testing circuits, 12 signal synthesis circuits
13 PWM comparison circuits, 14 oscillating circuits
15 three-phase commutation circuits, 16 duty cycle restricting circuits
A1～A3AND logic lock O1～O6 OR logic lock
CU, CV, CW, CH, CL comparator
D1～D6 diode EA error amplifier
M brushless motor N1～N3 is drive circuit in advance
Rs series resistance S1～S6 switch
U, V, W three-phase coil
U1, U2, V1, V2, W1, W2 switch control end
HU, HV, HW position detection signal
The positive half cycle duty cycle of PH restricting signal
PL negative half period duty cycle restricting signal
PU, PV, PW, PU ', PU " pulse signal
PU
d, PV
d, PW
dDuty cycle finite impulse signal
SU, SV, SW, SU ', SU " composite signal
The T high frequency reference signal
UH, UL, VH, VL, WH, WL switching signal
UH
d, UL
d, VH
d, VL
d, WH
d, WL
dThe limited switching signal of duty cycle
Ierr current error signal Icom current command signal
Im motor drive current Vdd driving voltage source
V
HPositive half cycle cut-off level PV
LThe negative half period cut-off level
V
0Mean value of amplitude
Embodiment
Explanation hereinafter and accompanying drawing will make aforementioned and other purpose of the present invention, feature and advantage more obvious.Describe in detail according to a preferred embodiment of the invention now with reference to figure figure.
Fig. 2 (a) has shown the circuit block diagram according to brushless motor driving device of the present invention.With reference to Fig. 2 (a), motor M is the three-phase direct-current brushless motor with three-phase coil U, V and W.Hall testing circuit 11 comprises Hall element and Hall amplifier.Hall testing circuit 11 is arranged on around the motor M, is used to produce three position detection signal HU, HV and HW, represents rotor and the relation of the position between three-phase coil U, V and W of motor M respectively.Each of position detection signal HU, HV and HW is all string ripple signal, is synchronized with the rotation of motor M, and has phase difference 120 degree to each other.In response to position detection signal HU, HV and HW, signal synthesis circuit 12 produces three drive signal SU, SV and SW.
In one embodiment of this invention, drive signal SU, SV and SW are implemented through phase deviation 30 degree by position detection signal HU, HV and the HW of correspondence, so waveform still is maintained at string ripple signal.In another embodiment of the present invention, through phase deviation 30 degree and be superimposed with suitable corrected signal and implement because of the terminal voltage skew that on-delay (Turn-On Delay) is caused in order to compensation, so its waveform becomes the stack of string ripple signal and corrected signal by position detection signal HU, the HV of correspondence and HW for drive signal SU, SV and SW.The possible form and the occupation mode of relevant this corrected signal have been exposed in United States Patent (USP) the 5th, 811, and No. 949, this technical literature is also incorporated in this specification as a reference.
In one embodiment of this invention, high frequency reference signal T is implemented by single triangular signal, and wherein the mean value of amplitude in this each cycle of triangular signal coincides with the mean value of amplitude in drive signal SU, SV or each cycle of SW in fact.In another embodiment of the present invention, high frequency reference signal T is implemented by last triangular signal with same frequency and following triangular signal mutual superposition, the trough that wherein should go up triangular signal is in fact corresponding to the crest of this time triangular signal, and coincides with drive signal SU, SV or the mean value of amplitude in each cycle of SW in fact.Have the stack use of shutting triangular signal and following triangular signal to be exposed in United States Patent (USP) the 3rd, 585, in No. 517, this technical literature is also incorporated in this specification as a reference.
With reference to Fig. 2 (a) and 2 (b), drive signal SU, SV and SW input PWM comparison circuit 13 compare in order to the high frequency reference signal T that is produced for oscillating circuit 14 independently respectively.Particularly, PWM comparison circuit 13 comprises three comparator C U, CV and CW, and wherein in order to receive drive signal SU, SV and SW, inverting input is then in order to common reception high frequency reference signal T respectively for non-inverting input.Based on the comparison between drive signal SU and the high frequency reference signal T, comparator C U produces pulse signal PU.Based on the comparison between drive signal SU and the high frequency reference signal T, comparator C V produces pulse signal PV.Based on the comparison between drive signal SW and the high frequency reference signal T, comparator C W produces pulse signal PW.
Brushless motor driving device according to the present invention is provided with duty cycle restricting circuits 16, in order to the duty cycle of restriction pulse signal PU, PV and PW.Comparator C H is in order to compare high frequency reference signal T and predetermined positive half cycle cut-off level V
H, to produce positive half cycle duty cycle restricting signal PH.Comparator C L is in order to compare high frequency reference signal T and predetermined negative half period cut-off level V
L, to produce negative half period duty cycle restricting signal PL.Subsequently, pulse signal PU, PV that PWM comparison circuit 13 is produced and each of PW compare with positive half cycle duty cycle restricting signal PH and negative half period duty cycle restricting signal PL respectively, to realize the effect of duty cycle restriction.On the one hand, for the high level state that prevents pulse signal PU, PV and PW continues the oversize time, positive half cycle duty cycle restricting signal PH provides the longest possibility time be applied to high level state.On the other hand, for the low level state that prevents pulse signal PU, PV and PW continues the oversize time, negative half period duty cycle restricting signal PL provides the longest possibility time be applied to low level state.By duty cycle restricting circuits 16, even under the too big situation of motor drive current Im and current command signal Icom gap, still can limit duty cycle and the frequency of pulse signal PU, PV and PW effectively according to brushless motor driving device of the present invention, thereby guarantee that motor rotates reliably.
Particularly, AND logic lock A1 carries out the AND logical operation for pulse signal PU and positive half cycle duty cycle restricting signal PH, and the high level time that makes the high level time of pulse signal PU be subjected to positive half cycle duty cycle restricting signal PH limits.OR logic lock O1 carries out the OR logical operation for pulse signal PU and negative half period duty cycle restricting signal PL, and the low level time that makes the low level time of pulse signal PU be subjected to negative half period duty cycle restricting signal PL limits.At last, OR logic lock O4 is combined in the output signal of the AND logic lock A1 output signal with OR logic lock O1, can obtain desired duty cycle finite impulse signal PU
dTherefore, positive half cycle duty cycle restricting signal PH limits pulse signal PU effectively
dIn corresponding to the duty cycle of the positive half cycle part of drive signal SU, and negative half period duty cycle restricting signal PL limits pulse signal PU effectively
dIn corresponding to the duty cycle of the negative half period of drive signal SU part.
AND logic lock A2 carries out the AND logical operation for pulse signal PV and positive half cycle duty cycle restricting signal PH, and the high level time that makes the high level time of pulse signal PV be subjected to positive half cycle duty cycle restricting signal PH limits.OR logic lock O2 carries out the OR logical operation for pulse signal PV and negative half period duty cycle restricting signal PL, and the low level time that makes the low level time of pulse signal PV be subjected to negative half period duty cycle restricting signal PL limits.At last, OR logic lock O5 is combined in the output signal of the AND logic lock A2 output signal with OR logic lock O2, can obtain desired duty cycle finite impulse signal PV
dTherefore, positive half cycle duty cycle restricting signal PH limits pulse signal PV effectively
dIn corresponding to the duty cycle of the positive half cycle part of drive signal SV, and negative half period duty cycle restricting signal PL limits pulse signal PV effectively
dIn corresponding to the duty cycle of the negative half period of drive signal SV part.
AND logic lock A3 carries out the AND logical operation for pulse signal PW and positive half cycle duty cycle restricting signal PH, and the high level time that makes the high level time of pulse signal PW be subjected to positive half cycle duty cycle restricting signal PH limits.OR logic lock O3 carries out the OR logical operation for pulse signal PW and negative half period duty cycle restricting signal PL, and the low level time that makes the low level time of pulse signal PW be subjected to negative half period duty cycle restricting signal PL limits.At last, OR logic lock O6 is combined in the output signal of the AND logic lock A3 output signal with OR logic lock O3, can obtain desired duty cycle finite impulse signal PW
dTherefore, positive half cycle duty cycle restricting signal PH limits pulse signal PW effectively
dIn corresponding to the duty cycle of the positive half cycle part of drive signal SW, and negative half period duty cycle restricting signal PL limits pulse signal PW effectively
dIn corresponding to the duty cycle of the negative half period of drive signal SW part.
Refer back to Fig. 2 (a), duty cycle finite impulse signal PU
d, PV
dAnd PW
dBe supplied to three drive circuit N1, N2 and N3 in advance respectively.In response to pulse signal PU
d, drive circuit N1 produces switching signal UH in advance
dWith UL
dIn response to pulse signal PV
d, drive circuit N2 produces switching signal VH in advance
dWith VL
dIn response to pulse signal PW
d, drive circuit N3 produces switching signal WH in advance
dWith WL
dDrive circuit N1, N2 and the N3 driving force of intensifier pulse signal not only in advance in addition and comprise time delay circuit, makes the switching signal UH that is produced
dWith UL
d, VH
dWith VL
d, and WH
dWith WL
dEach to all having non-overlapped wave character.
Three-phase commutation circuit 15 has switch S 1 and S2, switch S 3 and S4 and switch S 5 and S6, is subjected to switching signal UH respectively
dWith UL
d, VH
dWith VL
d, and WH
dWith WL
dControl.Particularly, switch S 1 is coupled between driving voltage source Vdd and coil U, and switch S 2 then is coupled between coil U and ground potential.Switching signal UH
dInput to end points U1, with control switch S1, and switching signal UL
dInput to end points U2, with control switch S2.Therefore, when switch S 1 formed short circuit, motor drive current Im can flow into coil U from driving voltage source Vdd, and when switch S 2 formed short circuit, motor drive current Im can flow to ground potential from coil U.Switch S 3 is coupled between driving voltage source Vdd and the coil V, and switch S 4 then is coupled between coil V and the ground potential.Switching signal VH
dInput to end points V1, with control switch S3, and switching signal VL
dInput to end points V2, with control switch S4.Therefore, when switch S 3 formed short circuit, motor drive current Im can flow into coil V from driving voltage source Vdd, and when switch S 4 formed short circuit, motor drive current Im can flow to ground potential from coil V.Switch S 5 is coupled between driving voltage source Vdd and the coil W, and switch S 6 then is coupled between coil W and the ground potential.Switching signal WH
dInput to end points W1, with control switch S5, and switching signal WL
dThen input to end points W2, with control switch S6.Therefore, when switch S 5 formed short circuit, motor drive current Im can flow into coil W from driving voltage source Vdd, and when switch S 6 formed short circuit, motor drive current Im can flow to ground potential from coil W.
In one embodiment of this invention, each of switch S 1, S3 and S5 is implemented by the PMOS transistor, and each of switch S 2, S4 and S6 is implemented by nmos pass transistor.In another embodiment of the present invention, each of switch S 1 to S6 is implemented by nmos pass transistor.
In one embodiment of this invention, the every couple of switch S1 and S2, switch S 3 and S4 and switch S 5 and S6 are accordingly by every couple of switching signal UH
dWith UL
d, VH
dWith VL
d, and WH
dWith WL
dCarry out modulation operations in rigid (Hard Chopping) mode of getting of cutting.The rigid modulation operations of getting of cutting refers to that the PWM that side switch (being switch S 2, S4 and S6) is then carried out OFF and ON at one time on the contrary switches when side switch (being switch S 1, S3 and S5) is carried out the PWM switching of ON and OFF.In another embodiment of the present invention, the every couple of switch S1 and S2, switch S 3 and S4 and switch S 5 and S6 are accordingly by every couple of switching signal UH
dWith UL
d, VH
dWith VL
d, and WH
dWith WL
dCarry out modulation operations in soft (Soft Chopping) mode of getting of cutting.Soft cut the modulation operations of getting refer to drive signal SU, SV, and the positive half period of SW between in, when the PWM that side switch S1, S3 and S5 carry out ON and OFF switches side switch S2, S4 and S6 and then is maintained at the OFF state, and between the negative half-cycle of drive signal SU, SV and SW, side switch S1, S3 and S5 are maintained at OFF state side switch S2, S4 and S6 then carries out the PWM switching of ON and OFF.About rigid cutting got and the soft method of operation of getting of cutting has been exposed in United States Patent (USP) the 6th, 710, in No. 572, this technical literature is also incorporated in this specification as a reference.
In order to detect motor drive current Im, series resistance Rs is arranged between the common tie point and ground potential of side switch S2, S4 and S6.Please note: in another embodiment of the present invention, series resistance Rs also be arranged at side switch S1, S3, and the common tie point and driving voltage source Vdd of S5 between.The motor drive current Im potential difference that series resistance Rs caused of flowing through provides to the inverting input of error amplifying circuit EA, as negative feedback.Error amplifying circuit EA relatively represents potential difference and the current command signal Icom of motor drive current Im, and produces current error signal Ierr.Signal synthesis circuit 12 is adjusted the amplitude of drive signal SU, SV and SW according to current error signal Ierr.
Though current error signal Ierr is supplied to signal synthesis circuit 12 in the embodiment shown in Fig. 2 (a), the amplitude in order to by feedback adjusting drive signal SU, SV and SW the invention is not restricted to this.As previously mentioned, PWM comparison circuit 13 is based on the relativeness between the amplitude of the amplitude of drive signal SU, SV and SW and reference signal T and determine the pulse duration of pulse signal PU, PV and PW.Therefore, in another embodiment, current error signal Ierr is supplied to oscillating circuit 14, in order to the amplitude by feedback adjusting reference signal T, realizes adjusting the effect of amplitude relativeness thus.In another embodiment again, current error signal Ierr is supplied to Hall element 11, in order to amplitude by feedback adjusting position detection signal HU, HV and HW, make drive signal SU, SV that signal synthesis circuit 12 is produced and the amplitude of SW be adjusted indirectly, realize adjusting the effect of amplitude relativeness thus.The relevant technology that these adjust the amplitude relativenesses has been exposed in United States Patent (USP) the 6th, 710, and in No. 568, this technical literature is also incorporated in this specification as a reference.
Fig. 2 (c) shows the waveform sequential chart according to the operation of brushless motor driving device of the present invention.Because three-phase coil U, the V of motor M and each of W are operated with similar waveform, so for for the purpose of the simplified illustration, Fig. 2 (c) only shows the waveform sequential chart of coil U when operating that is associated with motor M.With reference to Fig. 2 (c), positive half cycle cut-off level V
HSet the crest value that equals high frequency reference signal T in fact for, and preferably be set as and be slightly less than crest value, in order to be supplied to the comparator C H of Fig. 2 (b), to produce positive half cycle duty cycle restricting signal PH.Negative half period cut-off level V
LSet the trough value that equals high frequency reference signal T in fact for, and preferably be set as and be slightly larger than the trough value, in order to be supplied to the comparator C L of Fig. 2 (b), to produce negative half period duty cycle restricting signal PL.
When the amplitude of drive signal SU during less than the amplitude of high frequency reference signal T, duty cycle restricting circuits 16 there is no practical function, the duty cycle finite impulse signal PU that is promptly produced
dBe equal to original pulse signal PU in fact.Yet, when the amplitude of drive signal SU becomes big along with the feedback adjusting of current error signal Ierr, so that form the drive signal SU that amplitude surpasses high frequency reference signal T " time; PWM comparison circuit 13 produces a low-frequency pulse signal PU ", it continues to be in high level state or low level state for a long time.By means of duty cycle restricting circuits 16, low frequency pulse signal PU " the high level time high level time that is subjected to positive half cycle duty cycle restricting signal PH limit (for example the AND logic lock A1 by Fig. 2 (b) is realized), and its low level time low level time of then being subjected to negative half period duty cycle restricting signal PL limits, and (for example the OR logic lock O1 by Fig. 2 (b) is realized.As a result, low frequency pulse signal PU " be adjusted and convert duty cycle finite impulse signal PU to
d", have the frequency and the appropriate tasks cycle that are same as high frequency reference signal T, guarantee that thus motor rotates reliably.
Though the present invention is illustrated as illustration by preferred embodiment, be appreciated that to the invention is not restricted in these the disclosed embodiments.On the contrary, the invention is intended to be to contain tangible to those skilled in the art various modifications and similar configuration.Therefore, claim should be according to the widest annotation, and this type of is revised and similar configuration to comprise all.
Claims (11)
1, a kind of brushless motor driving device comprises:
One comparison circuit is used for comparison one drive signal and a reference signal, and to produce a pulse signal, wherein this drive signal is relevant with the rotation of a brushless motor, and the frequency of this reference signal is greater than the frequency of this drive signal;
One switches circuit, is coupled between a driving voltage source and this brushless motor, is controlled by this pulse signal, to drive this brushless motor;
One device is used for adjusting relativeness between the amplitude of the amplitude of this drive signal and this reference signal according to a current error signal, and this current error signal is represented the difference between a current command signal and the motor drive current; And
One duty cycle restricting circuits is used to limit the duty cycle of this pulse signal, it is characterized in that:
This duty cycle restricting circuits is coupled between this comparison circuit and this commutation circuit, makes this pulse signal to be sent to this commutation circuit by this duty cycle restricting circuits.
2, brushless motor driving device according to claim 1, wherein:
This drive signal is a string ripple signal.
3, brushless motor driving device according to claim 2, wherein:
This drive signal is superimposed with a corrected signal in order to the compensation on-delay.
4, brushless motor driving device according to claim 1, wherein:
This reference signal is a triangular signal, and wherein the mean value of amplitude of this triangular signal coincides with the mean value of amplitude of this drive signal in fact.
5, brushless motor driving device according to claim 1, wherein:
This reference signal is formed by triangular signal on one and triangular signal once, wherein should on the trough of triangular signal in fact corresponding to the crest of this time triangular signal, and coincide with the mean value of amplitude of this drive signal in fact.
6, brushless motor driving device according to claim 1 further comprises:
One Hall testing circuit is used to produce a position detection signal, and this position detection signal is represented the rotor and the relation of the position between the coil of this brushless motor, and
One combiner circuit is in order to produce this drive signal in response to this position detection signal.
7, brushless motor driving device according to claim 6, wherein:
This current error signal is offered this Hall testing circuit, in order to adjust the amplitude of this position detection signal.
8, brushless motor driving device according to claim 6, wherein:
This current error signal is offered this combiner circuit, in order to adjust the amplitude of this drive signal.
9, brushless motor driving device according to claim 1, wherein:
This duty cycle restricting circuits comprises:
One first device is used to produce a positive half cycle duty cycle restricting signal;
One second device is used to produce a negative half period duty cycle restricting signal;
One the 3rd device is used to prevent the high level time of the high level time of this pulse signal greater than this positive half cycle duty cycle restricting signal; And
One the 4th device is in order to the low level time that prevents this pulse signal low level time greater than this negative half period duty cycle restricting signal.
10, brushless motor driving device according to claim 1, wherein:
This current error signal is in order to adjust the amplitude of this reference signal.
11, brushless motor driving device according to claim 1, wherein:
This duty cycle restricting circuits is further used for preventing that the frequency of this pulse signal is lower than this frequency of this reference signal.
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| CN101179251B (en) * | 2006-11-07 | 2010-12-08 | 凌阳科技股份有限公司 | DC brushless motor torsion compensation process and system |
| CN101729009B (en) * | 2008-10-21 | 2013-01-16 | 深圳万讯自控股份有限公司 | Control system of direct current motor |
| CN108023513A (en) * | 2016-11-04 | 2018-05-11 | 德昌电机(深圳)有限公司 | Motor driving integrated circuit and electric machine |
| TWI699961B (en) * | 2019-08-30 | 2020-07-21 | 茂達電子股份有限公司 | Motor driving circuit and method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3585517A (en) * | 1968-05-01 | 1971-06-15 | Westinghouse Electric Corp | High-efficiency power amplifier |
| US5300866A (en) * | 1990-03-07 | 1994-04-05 | Matsushita Electric Industrial Co., Ltd. | Drive apparatus and speed control apparatus for brushless motor |
| JPH08182374A (en) * | 1994-12-27 | 1996-07-12 | Mitsubishi Electric Corp | Device for controlling drive of dc brushless motor |
| CN1173075A (en) * | 1994-01-12 | 1998-02-11 | 三菱电机株式会社 | Drive circuit for brushless motor |
| JP2002084772A (en) * | 2000-09-08 | 2002-03-22 | Rohm Co Ltd | Drive controller for brushless motor |
| US6710568B2 (en) * | 2001-01-15 | 2004-03-23 | Rohm Co., Ltd. | Motor drive device |
-
2004
- 2004-09-02 CN CNB200410075183XA patent/CN1324800C/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3585517A (en) * | 1968-05-01 | 1971-06-15 | Westinghouse Electric Corp | High-efficiency power amplifier |
| US5300866A (en) * | 1990-03-07 | 1994-04-05 | Matsushita Electric Industrial Co., Ltd. | Drive apparatus and speed control apparatus for brushless motor |
| CN1173075A (en) * | 1994-01-12 | 1998-02-11 | 三菱电机株式会社 | Drive circuit for brushless motor |
| JPH08182374A (en) * | 1994-12-27 | 1996-07-12 | Mitsubishi Electric Corp | Device for controlling drive of dc brushless motor |
| JP2002084772A (en) * | 2000-09-08 | 2002-03-22 | Rohm Co Ltd | Drive controller for brushless motor |
| US6710568B2 (en) * | 2001-01-15 | 2004-03-23 | Rohm Co., Ltd. | Motor drive device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1744425A (en) | 2006-03-08 |
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