CN1317765C - Stucture of resistance type random access of internal memory and its producing method - Google Patents
Stucture of resistance type random access of internal memory and its producing method Download PDFInfo
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
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- G—PHYSICS
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- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
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Abstract
The present invention concerns a structure for resistance type random access of internal memory which comprises several character lines allocated at a basement; several resetting lines allocated at corresponding character lines, wherein the ion type of the resetting lines is contrary to that of the character lines; a dielectric layer allocated at the basement; several internal memory unit allocated at the dielectric layer, with each internal memory unit including a lower electrode, an upper electrode as well as an electric resistance thin film, wherein for the internal memory units in the same column, the lower electrodes are in electrical contact with one of the resetting lines thereof; as well as several bit lines allocated at the internal memory unit, wherein for the internal memory units in the same row, the upper electrodes are in electrical contact with one of the bit lines thereof; As a consequence of the resetting lines, manipulations of programming as well as resetting can be executed for the internal memory module operated by diodes in accordance with the present invention.
Description
Technical field
The present invention relates to a kind of structure and manufacture method thereof of semiconductor subassembly, particularly relate to a kind of resistor-type random access memory (Resistance Random Access Memory, structure RRAM) and manufacture method thereof.
Background technology
Large-scale magnetic resistance (Colossal Magnetoresistive, CMR) film and oxide film with perovskite structure (Perovskite Structure) or dependency structure are to have the reversible thin-film material of resistance, so it can be applied in the reversible switch processing procedure (Reversible SwitchingProcess).More detailed explanation is, for the CMR resistance film, when bestowing a forward electric pulse (voltage) so far during resistor, can make its resistance value be become high resistance state, when the anti-phase electric pulse (voltage) of bestowing same-amplitude so far then can make its resistance value be changed into low resistance state by program during resistor by sequencing (programmed).Same, for having the oxidation resistance film of perovskite structure or dependency structure, when bestowing a forward electric pulse (electric current) so far during resistor, can make its resistance value be changed into low resistance state, when the anti-phase electric pulse (electric current) of bestowing same-amplitude so far then can make its resistance value be changed into high resistance state by program during resistor by program.Because above-mentioned two kinds of resistors all are to have the reversible character of resistance, therefore it can be applied in the memory assembly, and form resistor-type random access memory (RRAM).And when the power supply stop supplies, the data storage state (resistance states) of resistor-type random access memory still can not disappear, and is a kind of non-volatile memory assembly therefore.
In the prior art, with large-scale magnetoresistive film and have perovskite structure or technology that the oxide film of dependency structure is applied in the memory assembly is exposed in the following documents and materials: W.W.Zhuang, W.Pan, B.D.Ulrich, J.J.Lee, L.Stecker, A.Burmaster, D.R.Evants, S.T.Evans, S.T., Hsu, M.Tajiri, A.Shimaoka, K.Inoue, T.Naka, N.Awaya, K.Sakiyama, Y.Wang, S.Q.Liu, N.J.Wu, and A.Ignatiev, " Novell Colossal Magnetoresistive Thin Film Nonvolatile ResistanceRandom Access Memory (RRAM) ", IEDM, 2002 and Y.Watanabe, J.G.Bednorz, A.Bietsch, Ch.Gerber, D.Widmer, and A.Beck, " Current-driven insulator-conductor transition and nonvolatilememory in chromium-dopcd SrTiO3 single crystals ", vol.78, no.23,2001, Applied Physics Letters.
See also shown in Figure 1ly, it is the generalized section of existing known a kind of resistor-type random access memory.Resistor-type random access memory component shown in Figure 1 is the memory assembly for 1R1D (resistor one diode) pattern, it comprises the word line (N type doped region) 102 that is configured in the substrate 100, several P+ doped regions 104 and N+ doped region 106 in the configuration word line 102, wherein word line 102 is to constitute diode with P+ doped region 104.Then be to dispose dielectric layer 114 in substrate 100, and be to dispose several memory cells 107 in the dielectric layer 114, wherein each memory cell 107 is to comprise a bottom electrode 108, a top electrode 110 and the resistance film 112 between two electrodes, and each memory cell 107 is that correspondence is configured on the surface of P+ doped region 104.In addition, in dielectric layer 114, also comprise and dispose a word line contact hole 116, and an end of word line contact hole 116 is electrically to contact with N+ doped region 106, the other end then electrically contacts with being formed on dielectric layer 114 lip-deep leads 120, and it is with so that the purposes that word line 102 can electrically connect with external circuitry.In addition, also be formed with bit line 118 on dielectric layer 114, it is electrically to contact with the top electrode 110 of memory cell 107.
Existing known another kind of resistor-type random access memory component is the memory assembly for 1R1T (resistor one transistor) pattern, as shown in Figure 2.See also shown in Figure 2ly, this memory assembly comprises several N+ doped regions 202,204 that are configured in the substrate 200, and wherein N+ doped region 204 is to be a common lines.And be to dispose a dielectric layer 220 in substrate 200, wherein be to include several memory cells 207 (comprising bottom electrode 206, top electrode 208 and resistance film 210), and several gate structures (word line) 212 and several contact holes 214,216 in the dielectric layer 220.Wherein each memory cell 207 is that correspondence is configured on the surface of N+ doped region 202, and the N+ doped region the 202, the 204th of gate structure 212 and its both sides constitutes a transistor, and contact hole the 214, the 216th electrically contacts with gate structure 212 and common lines 204 respectively, so that gate structure 212 and common lines 204 can electrically connect with external circuitry.In addition, also be formed with bit line 218 on the surface of dielectric layer 220, it is electrically to contact with the top electrode 208 of memory cell 207.
In above-mentioned two kinds of memory assemblies, the memory assembly of 1R1T pattern (as shown in Figure 2) is to utilize the transistor of three terminals to come the operational store assembly, the operation that it can carry out sequencing and erase and reset memory assembly easily, but this kind memory assembly shortcoming is that the size of assembly is bigger, if F is a minimum feature size, then the minimum dimension of 1R1T unit is 6F2.
And for the memory assembly (as shown in Figure 1) of 1R1D pattern, the minimum dimension of its unit is 4F2, so the size of this kind memory assembly is less, and meets the trend of the high productive set of assembly.This kind memory assembly is to utilize the diode of two-terminal to come the programmed memory assembly, because only unilaterally conducting of voltage/current, so stored data state can't be erased or reset to memory assembly after sequencing.
This shows that the structure of above-mentioned existing resistor-type random access memory and manufacture method thereof still have many defectives, and demand urgently further being improved.For the structure that solves existing resistor-type random access memory and the defective of manufacture method thereof, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, this obviously is the problem that the anxious desire of relevant dealer solves.
Because the defective that the structure of above-mentioned existing resistor-type random access memory and manufacture method thereof exist, the inventor is based on being engaged in this type of product design manufacturing abundant practical experience and professional knowledge for many years, actively studied innovation, in the hope of founding a kind of structure and manufacture method thereof of new resistor-type random access memory, through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.
Summary of the invention
The objective of the invention is to, overcome the structure of existing resistor-type random access memory and the defective that manufacture method exists thereof, and provide a kind of structure and manufacture method thereof of new resistor-type random access memory, technical problem to be solved is to make its memory assembly that solves existing known 1R1D pattern can't erase or reset the problem of stored data state, thereby is suitable for practicality more.
Another object of the present invention is to, a kind of structure and manufacture method thereof of resistor-type random access memory are provided, technical problem to be solved is to make it provide a kind of to meet the memory assembly of high integration and can erase or reset the resistor-type random access memory of stored data state, thereby is suitable for practicality more.
The object of the invention to solve the technical problems realizes by the following technical solutions.The structure of a kind of resistor-type random access memory that proposes according to the present invention, it comprises: many word lines are configured in the substrate; Many reset lines (Reset Line), it is and those word line adjacency; One dielectric layer is configured in this substrate; A plurality of memory cells, be configured in this dielectric layer, wherein each memory cell comprise a bottom electrode, a top electrode and be clipped in this top electrode and this bottom electrode between a resistance film, and this bottom electrode of those memory cells of mutually same row is electrically to contact with a reset line wherein; And multiple bit lines, be configured on those memory cells, wherein this top electrode of those memory cells of identical delegation is electrically to contact with a bit line wherein.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The structure of aforesaid resistor-type random access memory, wherein said those reset lines are to be configured in those word lines, and the ion kenel of those reset lines is opposite with the ion kenel of those word lines.
The structure of aforesaid resistor-type random access memory, wherein said those reset lines are to be configured on the surface of those word lines, and the material of those reset lines is to comprise a metal material.
The structure of aforesaid resistor-type random access memory more comprises a plurality of word line contact holes, be configured in this dielectric layer, and each word line contact hole is to electrically connect with a corresponding wherein word line.
The structure of aforesaid resistor-type random access memory, more comprise a plurality of doped regions, those doped regions are to be configured in those word lines, and each doped region is electrically to contact with a corresponding wherein word line contact hole, and those doped regions are identical with the ion kenel of those word lines.
The structure of aforesaid resistor-type random access memory more comprises a plurality of reset line contact holes, be configured in this dielectric layer, and each reset line contact hole is to electrically connect with a corresponding wherein reset line.
The structure of aforesaid resistor-type random access memory, those memory cells of wherein said mutually same row are to be configured on the surface of a reset line wherein.
The structure of aforesaid resistor-type random access memory, this resistance film of wherein said those memory cells are for having the reversible thin-film material of resistance.
The structure of aforesaid resistor-type random access memory, wherein said have the reversible thin-film material of resistance and comprise large-scale magnetic resistance (Colossal Magnetoresistive, CMR) film or have the oxide film of perovskite structure (Perovskite Structure).
The object of the invention to solve the technical problems also adopts following technical scheme to realize.The manufacture method of a kind of resistor-type random access memory that proposes according to the present invention, it may further comprise the steps: form many word lines in a substrate; Form many reset lines, each reset line is and a corresponding wherein word line adjacency; In this substrate, form a plurality of memory cells, each memory cell comprise a bottom electrode, a top electrode and be clipped in this top electrode and this bottom electrode between a resistance film, and this bottom electrode of those memory cells of mutually same row is electrically to contact with a reset line wherein; Above this substrate, form a dielectric layer, and this dielectric layer is to expose those memory cells; And form multiple bit lines on those memory cells, and this top electrode of those memory cells of identical delegation is electrically to contact with a bit line wherein.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The manufacture method of aforesaid resistor-type random access memory, wherein said those reset lines are formed in those word lines, and the ion kenel of those reset lines is opposite with the ion kenel of those word lines.
The manufacture method of aforesaid resistor-type random access memory, wherein said those reset lines are formed on the surface of those word lines, and the material of those reset lines is to comprise a metal material.
The manufacture method of aforesaid resistor-type random access memory, the method for those memory cells of wherein said formation and those bit lines may further comprise the steps: form a stack layer on the surface of each reset line; Above this substrate, form this dielectric layer, and this dielectric layer is to expose those stack layers; On this dielectric layer and those stack layers, form a conductive layer; And with this conductive layer of directional patternsization and those stack layers, to form those bit lines and those memory cells simultaneously perpendicular to those word lines.
The manufacture method of aforesaid resistor-type random access memory wherein after forming this dielectric layer, more is included in and forms a plurality of word line contact holes in this dielectric layer, and each word line contact hole is to electrically connect with a corresponding wherein word line.
The manufacture method of aforementioned electric resistance type random access memory, wherein after forming those word lines, more be included in and form a doped region in each word line, the ion kenel of those doped regions is identical with the ion kenel of those word lines, and each doped region is electrically to contact with a corresponding wherein word line contact hole.
The manufacture method of aforesaid resistor-type random access memory wherein after forming this dielectric layer, more is included in and forms a plurality of reset line contact holes in this dielectric layer, and each reset line contact hole is to electrically connect with a corresponding wherein reset line.
The manufacture method of aforesaid resistor-type random access memory, this resistance film of wherein said those memory cells are for having the reversible thin-film material of resistance.
The manufacture method of aforesaid resistor-type random access memory, wherein said have the reversible thin-film material of resistance and comprise large-scale magnetic resistance (Colossal Magnetoresistive, CMR) film or have the oxide film of perovskite structure (Perovskite Structure).
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, in order to reach aforementioned goal of the invention, major technique of the present invention thes contents are as follows:
The present invention proposes a kind of structure of resistor-type random access memory, and it comprises several word lines, several reset lines, a dielectric layer, several memory cells and several bit lines.Wherein, word line is to be configured in the substrate, and each reset line is to be configured in the corresponding wherein word line, and the ion kenel of reset line is opposite with the ion kenel of word line, to constitute diode.In addition, dielectric layer is to be configured in the substrate, and memory cell is to be configured in the dielectric layer, and each memory cell be comprise a bottom electrode, a top electrode and be clipped in bottom electrode and top electrode between a resistance film, and the memory cell of mutually same row is to be configured on the surface of mutually same reset line, and therefore the memory cell of mutually same row can electrically contact with mutually same reset line.In addition, bit line is to be configured on the memory cell, and the top electrode of the memory cell of identical delegation is electrically to contact with a bit lines wherein.
In the structure of above-mentioned memory assembly, in dielectric layer, more comprise and dispose word line contact hole and reset line contact hole, wherein the word line contact hole is electrically to contact with word line, and the reset line contact hole is electrically to contact with reset line, and it is respectively to be used for making word line and reset line to do to electrically connect with the circuit in the external world.
The present invention proposes a kind of manufacture method of resistor-type random access memory again, the method is at first to form several word lines in a substrate, and form a reset line in each word line, wherein the kenel of word line is opposite with the ion kenel of reset line, to constitute diode.Then, in substrate, form several memory cells, and each memory cell be include a bottom electrode, a top electrode and be clipped in top electrode and bottom electrode between a resistance film, and the memory cell of mutually same row is to be configured on the surface of a reset line wherein, and the bottom electrode of this row memory cell is electrically contacted with this reset line.Afterwards, above substrate, form a dielectric layer, and dielectric layer is to expose memory cell.Afterwards, on the memory cell of identical delegation, form a bit line, and the top electrode of the memory cell of identical delegation is serially connected.
In the manufacture method of above-mentioned resistor-type random access memory, its method that forms memory cell and bit line can be to form a stack layer earlier on the surface of each reset line, form dielectric layer in the top of substrate more afterwards, and dielectric layer is to expose above-mentioned formed stack layer.Then, on dielectric layer and stack layer, form a conductive layer, and with directional patterns conductive layer and stack layer perpendicular to word line, and form bit line and memory cell simultaneously.
In the manufacture method of above-mentioned memory assembly, more be included in and form word line contact hole and reset line contact hole in the dielectric layer, it is used for making word line and reset line to electrically connect with external circuitry.
Resistor-type random access memory of the present invention is the memory for the 1R1D pattern, therefore its size is little than the memory assembly of 1R1T pattern, and be provided with reset line because of the present invention, though therefore it is the memory assembly for diode operation, but the but operation that can carry out sequencing and reset, and overcome the shortcoming that the memory of existing known 1R1D pattern can't reset.
Via as can be known above-mentioned, the invention relates to a kind of structure of resistor-type random access memory, it comprises several word lines, is configured in the substrate; Several reset lines are configured in the corresponding word lines, and the ion kenel of reset line is opposite with the ion kenel of word line; One dielectric layer is configured in the substrate; Several memory cells are configured in the dielectric layer, and each memory cell comprises a bottom electrode, a top electrode and a resistance film, and the bottom electrode of the memory cell of mutually same row is electrically to contact with a corresponding wherein reset line; And several bit lines, be configured on the memory cell, wherein the top electrode of the memory cell of identical delegation is electrically to contact with a bit line wherein.Because the setting of reset line, so the present invention's operation that can carry out sequencing and reset with the memory assembly of diode operation.
By technique scheme, the structure of resistor-type random access memory of the present invention and manufacture method thereof have following advantage at least: its memory assembly that solves existing known 1R1D pattern can't erase or reset the problem of stored data state and a kind of resistor-type random access memory that meets the memory assembly of high integration and can erase or reset stored data state is provided.
In sum, the structure and the manufacture method thereof of the resistor-type random access memory of special construction of the present invention, it has above-mentioned many advantages and practical value, and in homogeneous structure and manufacture method, do not see have similar structural design and method to publish or use and really genus innovation, no matter it is at product structure, bigger improvement is all arranged on manufacture method or the function, have large improvement technically, and produced handy and practical effect, and the structure of more existing resistor-type random access memory and manufacture method thereof have the multinomial effect of enhancement, thereby be suitable for practicality more, and have the extensive value of industry, really be a novelty, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, below with preferred embodiment of the present invention and conjunction with figs. describe in detail as after.
Concrete structure of the present invention and manufacture method thereof are provided in detail by following examples and accompanying drawing.
Description of drawings
Fig. 1 is the generalized section of the resistor-type random access memory of existing known 1R1D pattern;
Fig. 2 is the generalized section of the resistor-type random access memory of existing known 1R1T pattern;
Fig. 3 to Fig. 6 looks schematic diagram on the manufacturing process of resistor-type random access memory of a preferred embodiment of the present invention, wherein the figure A of same icon numbering be in the icon by the profile of A-A ', the figure B of same icon numbering is by the profile of B-B ' in the icon;
Fig. 7 be another preferred embodiment of the present invention the resistor-type random access memory on look schematic diagram, and Fig. 7 A be among Fig. 7 by the profile of A-A ', Fig. 7 B is by the profile of B-B ' among Fig. 7;
Fig. 8 is the profile of the resistor-type random access memory of a preferred embodiment of the present invention;
Fig. 9 is the profile of the resistor-type random access memory of a preferred embodiment of the present invention.
100,200,300,400: substrate 102,212,302,402: word line
104,106,202: doped region 204,306,406: doped region
108,206,308,408: bottom electrode 110,208,310,310a, 410: top electrode
112,210: resistance film 312,312a, 412: resistance film
107,207: memory cell 314a, 414: memory cell
114,220: dielectric layer 316,316a, 416: dielectric layer
116,214,216: contact hole 318,320,418,420: contact hole
118,218,326,426: bit line 120,328,330,428,430: lead
301: isolated area 304,404: reset line
314: stack layer 322: conductive layer
324: photoresist layer 340,440: metal reset line
Embodiment
Below in conjunction with accompanying drawing and preferred embodiment, structure and its concrete structure manufacture method of manufacture method, step, feature and the effect thereof of the resistor-type random access memory that foundation the present invention is proposed, describe in detail as after.
Fig. 3 to Fig. 6 looks schematic diagram on the manufacturing process according to the resistor-type random access memory of a preferred embodiment of the present invention, wherein the figure A of same icon numbering be in the icon by the profile of A-A ', the figure B of same icon numbering is by the profile of B-B ' in the icon.
See also shown in Figure 3, Fig. 3 A and Fig. 3 B, a substrate 300 at first is provided, it for example is a N type silicon base.Then, form isolated area 301 in the substrate 300.Afterwards, form P type doped region 302 in the substrate 300 between isolated area 301, in order to as word line, and in word line (P type doped region) 302, form a N+ doped region 304 and a P+ doped region 306, wherein N+ doped region 304 and word line (P type doped region) the 302nd constitute diode, and N+ doped region 304 is used as a reset line (Reset Line), and P+ doped region 306 is in order to promote the electrical contact of word line 302 and follow-up formed word line contact hole.In a preferred embodiment, the method that forms P type doped region 302, N+ doped region 304 and P+ doped region 306 for example is to utilize ion implantation.
Afterwards, in substrate 300, form stack layer 314, wherein stack layer 314 is to be formed on the surface of reset line 304 with the direction of reset line 304 along word line 302, and each stack layer 314 be by a bottom electrode 308, a top electrode 310 and be clipped in bottom electrode 308 and top electrode 310 between a resistance film 312 constituted.At this, resistance film 312 for example is large-scale magnetic resistance (ColossalMagnetoresistive, CMR) film, oxide film etc. with perovskite structure (Perovskite Structure) or dependency structure have the reversible resistance film material of resistance, its medium-and-large-sized magnetoresistive film for example is that the oxide film of PCMO (Pr0.7Ca0.3MoO3) film, perovskite structure or dependency structure for example is Nb2O5, TiO2, Ta2O5, NiO or the oxide film that was doped with plating, and it for example is SrTiO3:Cr.And the material of bottom electrode 308 and top electrode 310 for example is metal materials such as platinum, gold.
See also shown in Fig. 4, Fig. 4 A and Fig. 4 B, form a dielectric layer 316 above substrate 300, dielectric layer 316 is to cover isolated area 301 and expose stack layer 314.The material of dielectric layer 316 for example is the dielectric materials such as material of silica, low-k, and after for example first deposition one deck dielectric materials layer (not shown) comprehensive above substrate 300 of the method that forms dielectric layer 316, remove the part dielectric materials layer with chemical mechanical milling method or etch-back method again, come out up to stack layer 314.
Afterwards, in dielectric layer 316, form word line contact hole 318 and reset line (Reset Line) contact hole 320, wherein word line contact hole 318 is electrically to contact with P+ doped region 306, and then electrically connect with word line (P type doped region) 302, and reset line contact hole 320 is electrically to contact with reset line (N+ doped region) 304.In a preferred embodiment, the method that forms word line contact hole 318 and reset line contact hole 320 for example is to utilize micro image etching procedure pattern dielectric layer 316, in dielectric layer 316, to form the contact window (not shown), expose P+ doped region 306 and N+ doped region 304 respectively, inserting electric conducting material afterwards again in contact window can form.
See also shown in Fig. 5, Fig. 5 A and Fig. 5 B, comprehensive formation one conductive layer 322 above substrate 300 covers stack layer 314, dielectric layer 316 and contact hole 318,320.Afterwards, form a patterned light blockage layer 324 again on conductive layer 322, photoresist layer 324 is to cover predetermined formation bit line and other lead part, and covers the bearing of trend that predetermined photoresist layer 324 patterns that form the bit line place are perpendicular to word line 302.
Please refer to shown in Fig. 6, Fig. 6 A and Fig. 6 B, with photoresist layer 324 is that etch mask carries out an etch process, form bit line 326 and lead 328,330 with patterned conductive layer 322, and in this etch process process, patterning stack layer 314 simultaneously also, so that the stack layer 314 of original strip becomes block stack layer 314a (being made of top electrode 310a, film 312a and bottom electrode 308a), and form memory cell.Because the bottom electrode 308a of each memory cell of mutually same row can electrically conduct by reset line 304, therefore in the process of the many laminations 314 of this patterning, can also select not with bottom electrode 308 patternings, and only patterning top electrode 310 and film 312.Formed bit line 326 is that the memory cell 314a with identical delegation is connected in series.In addition, formed lead 328 is electrically to contact with word line contact hole 318, and with so that word line 302 can electrically connect with external circuitry, lead 330 is electrically to contact with reseting contact hole 320, with so that reset line 304 can electrically connect with external circuitry.
Subsequently, form an insulating barrier (not shown),, carry out follow-up interconnect processing procedure and weld pad processing procedure afterwards again to fill up space between the memory cell 314a and the space between the bit line 326.
What is particularly worth mentioning is that in the manufacture method of above-mentioned resistor-type random access memory, reset line (N+ doped region) 304 and word line (P type doped region) 302 diodes that constituted can also replace with Schottky diode (Schokky Diode).See also shown in Figure 8, after forming word line 302, the surface of corresponding word line 302 forms reset line 340 in substrate 300, and wherein the material of reset line 340 for example is a metal material, so reset line 340 promptly constitutes the Schottky diode that metal/semiconductor connects face with word line 302.
In above-mentioned example, the dopant profile of substrate 300, word line 302, reset line 304 and doped region 306 is to explain with a kind of kenel of memory assembly wherein, but the present invention and the non-limiting memory assembly that can only be used in this kind kenel, also in scope of the present invention, it for example is to use P type substrate 300, uses word line 302, the reset line 304 of P+ dopant profile and the memory assembly of N+ doped region 306 of N type dopant profile the memory assembly opposite with above-mentioned kenel.
Therefore, resistor-type random access memory of the present invention is to comprise substrate 300, isolated area 301, word line 302, reset line 304 (or 340), doped region 306, memory cell 314a, dielectric layer 316a, word line contact hole 318, reset line contact hole 320, bit line 326 and lead 328,330.
Wherein, isolated area 301 is to be configured in the substrate 300, and word line 302 is to be configured in the substrate 100, and between two adjacent isolated areas 301.Reset line 304 is to be configured in the part word line 302, and the ion kenel of reset line 304 is opposite with the kenel of word line 302, to constitute diode (Fig. 6 A).In addition, reset line 340 can also be configured on the surface of word line 302, and the material of reset line 340 for example is a metal material (Fig. 8).And doped region 306 is to be configured in the word line 302, and its ion kenel is identical with the ion kenel of word line 302, and it is in order to promote the electrical contact of word line 302 and follow-up formed word line contact hole.
Dielectric layer 316a is the top that is configured in substrate 300, and is to dispose memory cell 314a, word line contact hole 318 and reset line contact hole 320 among the dielectric layer 316a.Wherein, memory cell 314a is configured on the surface of reset line 304 (or 340), and each memory cell 314a be by a bottom electrode 308, a top electrode 310a and be clipped in bottom electrode 308 and top electrode 310a between resistance film 312a constituted, oxide film that resistance film 312a for example is large-scale magnetoresistive film, have perovskite structure or dependency structure etc. has the reversible resistance film material of resistance.And word line contact hole 318 is electrically to contact with doped region 306, and then electrically contacts with word line 302, and reset line contact hole 320 is electrically to contact with reset line 304 (or 340).
The manufacture method of memory assembly of the present invention can also utilize other method to make except above-described method, and it is described in detail as follows.
Please refer to shown in Fig. 7, Fig. 7 A and Fig. 7 B, it is for according to looking schematic diagram and generalized section on the resistor-type random access memory of a preferred embodiment of the present invention, wherein Fig. 7 A be among Fig. 7 by the profile of A-A ', Fig. 7 B is by the profile of B-B ' among Fig. 7.At first in substrate 400, form isolated area 401, form P type doped region 402 afterwards in the substrate between isolated area 401 400, in order to as word line.Then, in word line (P type doped region) 402, form N+ doped region 404 and P+ doped region 406, wherein N+ doped region 404 is to constitute diode with P type doped region 402, and N+ doped region 404 is used as a reset line (Reset Line), and P+ doped region 406 is in order to promote the electrical contact of word line 402 and follow-up formed word line contact hole.
Afterwards, in substrate 400, form several memory cells 414, each memory cell 414 be by bottom electrode 408, top electrode 410 and be clipped in bottom electrode 408 and top electrode 410 between resistance film 414 constituted, and resistance film 414 for example be large-scale magnetoresistive film, oxide film with perovskite structure or dependency structure etc. has the reversible resistance film material of resistance.At this, the method that forms memory cell 414 is to deposit in regular turn after top electrode rete (not shown), resistance film layer (not shown) and the bottom electrode rete (not shown) earlier, again with micro image etching procedure with its patterning, and form several block memory cells 414.
Afterwards, on dielectric layer 416, form a conductive layer (not shown), afterwards again with its patterning, can form bit line 426 and lead 428,430, the bearing of trend of its neutrality line 426 is vertical with the bearing of trend of word line 402, and bit line 426 can be connected in series the memory cell 414 of identical delegation.In addition, formed lead 428 is electrically to contact with word line contact hole 418, with so that word line 402 can electrically connect with external circuitry, lead 430 is electrically to contact with reseting contact hole 420, with so that reset line (N+ doped region) 404 can electrically connect with external circuitry.
Same, in above-mentioned example, the dopant profile of substrate 400, word line 402, reset line 404 and doped region 406 is to explain with a kind of kenel of memory assembly wherein, but the present invention and the non-limiting memory assembly that can only be used in this kind kenel, the memory assembly opposite with above-mentioned kenel is also in scope of the present invention.
What is particularly worth mentioning is that in the manufacture method of above-mentioned resistor-type random access memory, reset line (N+ doped region) 404 and word line (P type doped region) 402 diodes that constituted can also replace with Schottky diode (Schokky Diode).See also shown in Figure 9, after forming word line 402, the surface of corresponding word line 402 forms reset line 440 in substrate 400, and wherein the material of reset line 440 for example is a metal material, so reset line 440 promptly constitutes the Schottky diode that metal/semiconductor connects face with word line 402.
Resistor-type random access memory of the present invention is the memory for the 1R1D pattern, therefore its size is little than the memory assembly of 1R1T pattern, and be provided with reset line because of the present invention, though therefore it is the assembly for diode operation, the but operation that can carry out sequencing and reset has the shortcoming that can't reset and overcome the memory that has known 1R1D pattern now.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the method that can utilize above-mentioned announcement and technology contents are made a little change or be modified to the equivalent embodiment of equivalent variations, but every content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (18)
1, a kind of structure of resistor-type random access memory is characterized in that it comprises:
Many word lines are configured in the substrate;
Many reset lines, it is and those word lines adjacency up and down;
One dielectric layer is configured in this substrate;
A plurality of memory cells, be configured in this dielectric layer, wherein each memory cell comprise a bottom electrode, a top electrode and be clipped in this top electrode and this bottom electrode between a resistance film, and this bottom electrode of those memory cells of mutually same row is electrically to contact with a reset line wherein; And
Multiple bit lines is configured on those memory cells, and wherein this top electrode of those memory cells of identical delegation is electrically to contact with a bit line wherein.
2, the structure of resistor-type random access memory according to claim 1 it is characterized in that wherein said those reset lines are to be configured in those word lines, and the ion kenel of those reset lines is opposite with the ion kenel of those word lines.
3, the structure of resistor-type random access memory according to claim 1 it is characterized in that wherein said those reset lines are to be configured on the surface of those word lines, and the material of those reset lines is to comprise a metal material.
4, the structure of resistor-type random access memory according to claim 1 is characterized in that more comprising a plurality of word line contact holes, be configured in this dielectric layer, and each word line contact hole is to electrically connect with a corresponding wherein word line.
5, the structure of resistor-type random access memory according to claim 4, it is characterized in that more comprising a plurality of doped regions, those doped regions are to be configured in those word lines, and each doped region is electrically to contact with a corresponding wherein word line contact hole, and those doped regions are identical with the ion kenel of those word lines.
6, the structure of resistor-type random access memory according to claim 1 is characterized in that more comprising a plurality of reset line contact holes, be configured in this dielectric layer, and each reset line contact hole is to electrically connect with a corresponding wherein reset line.
7, the structure of resistor-type random access memory according to claim 1, those memory cells that it is characterized in that wherein said mutually same row are to be configured on the surface of a reset line wherein.
8, the structure of resistor-type random access memory according to claim 1, this resistance film that it is characterized in that wherein said those memory cells are for having the reversible thin-film material of resistance.
9, the structure of resistor-type random access memory according to claim 8 is characterized in that the wherein said oxide film that the reversible thin-film material of resistance comprises large-scale magnetoresistive film or has perovskite structure that has.
10, a kind of manufacture method of resistor-type random access memory is characterized in that it may further comprise the steps:
In a substrate, form many word lines;
Form many reset lines, each reset line is and corresponding wherein word line adjacency up and down;
In this substrate, form a plurality of memory cells, each memory cell comprise a bottom electrode, a top electrode and be clipped in this top electrode and this bottom electrode between a resistance film, and this bottom electrode of those memory cells of mutually same row is electrically to contact with a reset line wherein;
Above this substrate, form a dielectric layer, and this dielectric layer is to expose those memory cells; And
On those memory cells, form multiple bit lines, and this top electrode of those memory cells of identical delegation is electrically to contact with a bit line wherein.
11, the manufacture method of resistor-type random access memory according to claim 10 it is characterized in that wherein said those reset lines are formed in those word lines, and the ion kenel of those reset lines is opposite with the ion kenel of those word lines.
12, the manufacture method of resistor-type random access memory according to claim 10 it is characterized in that wherein said those reset lines are formed on the surface of those word lines, and the material of those reset lines is to comprise a metal material.
13, the manufacture method of resistor-type random access memory according to claim 10 is characterized in that the method for those memory cells of wherein said formation and those bit lines may further comprise the steps:
On the surface of each reset line, form a stack layer;
Above this substrate, form this dielectric layer, and this dielectric layer is to expose those stack layers;
On this dielectric layer and those stack layers, form a conductive layer; And
With this conductive layer of directional patternsization and those stack layers, to form those bit lines and those memory cells simultaneously perpendicular to those word lines.
14, the manufacture method of resistor-type random access memory according to claim 10, it is characterized in that after forming this dielectric layer, more be included in and form a plurality of word line contact holes in this dielectric layer, each word line contact hole is to electrically connect with a corresponding wherein word line.
15, the manufacture method of resistor-type random access memory according to claim 10, it is characterized in that after forming those word lines, more be included in and form a doped region in each word line, the ion kenel of those doped regions is identical with the ion kenel of those word lines, and each doped region is electrically to contact with a corresponding wherein word line contact hole.
16, the manufacture method of resistor-type random access memory according to claim 10, it is characterized in that after forming this dielectric layer, more be included in and form a plurality of reset line contact holes in this dielectric layer, each reset line contact hole is to electrically connect with a corresponding wherein reset line.
17, the manufacture method of resistor-type random access memory according to claim 10, this resistance film that it is characterized in that wherein said those memory cells are for having the reversible thin-film material of resistance.
18, the manufacture method of resistor-type random access memory according to claim 17 is characterized in that the wherein said oxide film that the reversible thin-film material of resistance comprises large-scale magnetoresistive film or has perovskite structure that has.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/604,627 | 2003-08-06 | ||
| US10/604,627 US6946702B2 (en) | 2003-06-03 | 2003-08-06 | Resistance random access memory |
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| CN1581488A CN1581488A (en) | 2005-02-16 |
| CN1317765C true CN1317765C (en) | 2007-05-23 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5579258A (en) * | 1991-11-28 | 1996-11-26 | Olympus Optical Co., Ltd. | Ferroelectric memory |
| US6204139B1 (en) * | 1998-08-25 | 2001-03-20 | University Of Houston | Method for switching the properties of perovskite materials used in thin film resistors |
| US6531371B2 (en) * | 2001-06-28 | 2003-03-11 | Sharp Laboratories Of America, Inc. | Electrically programmable resistance cross point memory |
| US6583003B1 (en) * | 2002-09-26 | 2003-06-24 | Sharp Laboratories Of America, Inc. | Method of fabricating 1T1R resistive memory array |
-
2004
- 2004-05-12 CN CNB200410038012XA patent/CN1317765C/en not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5579258A (en) * | 1991-11-28 | 1996-11-26 | Olympus Optical Co., Ltd. | Ferroelectric memory |
| US6204139B1 (en) * | 1998-08-25 | 2001-03-20 | University Of Houston | Method for switching the properties of perovskite materials used in thin film resistors |
| US6531371B2 (en) * | 2001-06-28 | 2003-03-11 | Sharp Laboratories Of America, Inc. | Electrically programmable resistance cross point memory |
| US6583003B1 (en) * | 2002-09-26 | 2003-06-24 | Sharp Laboratories Of America, Inc. | Method of fabricating 1T1R resistive memory array |
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