CN1308487A - Wiring technique for multiplayer printed circuit board - Google Patents
Wiring technique for multiplayer printed circuit board Download PDFInfo
- Publication number
- CN1308487A CN1308487A CN 00132185 CN00132185A CN1308487A CN 1308487 A CN1308487 A CN 1308487A CN 00132185 CN00132185 CN 00132185 CN 00132185 A CN00132185 A CN 00132185A CN 1308487 A CN1308487 A CN 1308487A
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- layers
- wiring
- layer
- circuit board
- top layer
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- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
A wiring process for four layer printed circuit board which is to use the top layer as a power source layer, the bottom layer as an earthing layer and two middle layers as wiring layers. The process for over four layers circuit board is to use top and bottom layers as earthing layers, the middle layers as wiring layers and power source layers. The present process can reduce the electromagnetic disturbance of the electronic equipment to ambient space as well as reduce the disturbance from other electronic equipment to the present equipment greatly.
Description
The present invention relates to a kind of Wiring technique of multilayer board.
As everyone knows, for adapting to some particular application, as products such as guided missile, telemetry system, space flight, aviation, communication equipment, high-speed computer, microminaturization computers printed circuit is constantly proposed new requirement, multilayer printed circuit has obtained popularization in recent years.Each layer function of present multi-layer sheet is divided and is generally the top layer copper platinum (film) that lays the element one side is wiring side, and the following second layer copper platinum of top layer is bus plane, and bottom copper platinum is wiring side, and the above one deck of bottom is a ground plane; To wiring board more than 4 layers, the layer that has more is for middle wiring layer, between bus plane and ground plane.For modem computer systems and other high-frequency circuit device,, exist a large amount of high-frequency currents in the circuit on top layer and the wiring underlayer, thereby surrounding space is had bigger electromagnetic interference because wiring board top layer and bottom are wiring side.
The present invention seeks to propose a kind of Wiring technique of multilayer board in order to reduce the electromagnetic interference of high-frequency electronic device to surrounding space.
The object of the present invention is achieved like this:
1, for four laminates, top layer (top layer copper platinum) is a bus plane, and bottom is a ground plane, and middle two layers is wiring side.
2, for more than four layers wiring board, top layer and bottom are ground plane, and the intermediate layer comprises wiring side and bus plane.
Multilayer circuit board according to above scheme realizes can produce following effect:
1, because the top layer of wiring board is bus plane or ground plane, bottom is a ground plane, top layer and bottom do not have effectively to send electromagnetic long wiring, top layer and the large-area copper platinum of bottom have shielding action to the electromagnetic interference that wiring board internal layer signal routing sends simultaneously, therefore adopt this Wiring technique, can reduce the electromagnetic interference of electronic equipment self significantly the surrounding environment space.
2, the larger areas of copper platinum of top layer and bottom also plays shielding action to the electromagnetic interference that other electronic equipment sends, and can reduce the interference of other electronic equipment to this equipment.The invention will be further described below in conjunction with drawings and Examples.
Fig. 1 is four layers of each layer of wiring board location drawing.
Fig. 2 is a kind of each layer location drawing of six layers of wiring board.
Among the figure: 1. wiring side, 2. insulating barrier, 3. bus plane, 4. ground plane.
Among the embodiment shown in Figure 1, the component side of four layers of wiring board (top layer) is a bus plane, and solder side (bottom) is a ground plane, and label is that 1 centre is wiring side for two layers.
Among the embodiment shown in Figure 2, component side of six layers of wiring board (top layer) and solder side (bottom) are ground plane, and the following second layer of top layer (label is 3) is a bus plane, label be 1 other three layers for wiring side.
Claims (3)
1. the Wiring technique of a multilayer board is characterized in that the top layer of multilayer circuit board and bottom copper platinum are ground plane or bus plane, and wiring side is positioned at the intermediate layer of multilayer circuit board.
2. the Wiring technique of multilayer board according to claim 1 is characterized in that for four layers of wiring board, top layer is a bus plane, and bottom is a ground plane, and middle two layers is wiring side.
3. computer bus system according to claim 1 is characterized in that for more than four layers wiring board, top layer and bottom are ground plane, and the intermediate layer comprises wiring side and bus plane.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 00132185 CN1308487A (en) | 2000-12-20 | 2000-12-20 | Wiring technique for multiplayer printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 00132185 CN1308487A (en) | 2000-12-20 | 2000-12-20 | Wiring technique for multiplayer printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1308487A true CN1308487A (en) | 2001-08-15 |
Family
ID=4595032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 00132185 Pending CN1308487A (en) | 2000-12-20 | 2000-12-20 | Wiring technique for multiplayer printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1308487A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100421136C (en) * | 2003-04-28 | 2008-09-24 | 松下电器产业株式会社 | Plasma display device |
| CN101360408B (en) * | 2007-07-30 | 2010-06-09 | 英业达股份有限公司 | Electric power laminated board |
| CN101140326B (en) * | 2006-09-08 | 2010-12-01 | 三菱电机株式会社 | Dosimetry device for charged particle radiation |
| CN101188434B (en) * | 2006-11-16 | 2011-08-10 | 亚洲光学股份有限公司 | Signal receiving and transmission module and its printing circuit board |
| CN102324684A (en) * | 2011-08-04 | 2012-01-18 | 无锡市中兴光电子技术有限公司 | Small optical fiber amplifier |
| CN102665155A (en) * | 2012-04-28 | 2012-09-12 | 歌尔声学股份有限公司 | Printed circuit board (PCB) of Bluetooth earphone |
| CN105101608A (en) * | 2014-05-04 | 2015-11-25 | 群联电子股份有限公司 | Multi-layer printed circuit board structure, connector module and memorizer storage device |
| CN107194094A (en) * | 2017-05-27 | 2017-09-22 | 郑州云海信息技术有限公司 | A kind of quick method that Color scheme is set in PCB design |
-
2000
- 2000-12-20 CN CN 00132185 patent/CN1308487A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100421136C (en) * | 2003-04-28 | 2008-09-24 | 松下电器产业株式会社 | Plasma display device |
| CN101140326B (en) * | 2006-09-08 | 2010-12-01 | 三菱电机株式会社 | Dosimetry device for charged particle radiation |
| US8044364B2 (en) | 2006-09-08 | 2011-10-25 | Mitsubishi Electric Corporation | Dosimetry device for charged particle radiation |
| CN101188434B (en) * | 2006-11-16 | 2011-08-10 | 亚洲光学股份有限公司 | Signal receiving and transmission module and its printing circuit board |
| CN101360408B (en) * | 2007-07-30 | 2010-06-09 | 英业达股份有限公司 | Electric power laminated board |
| CN102324684A (en) * | 2011-08-04 | 2012-01-18 | 无锡市中兴光电子技术有限公司 | Small optical fiber amplifier |
| CN102324684B (en) * | 2011-08-04 | 2014-04-23 | 无锡市中兴光电子技术有限公司 | Small optical fiber amplifier |
| CN102665155A (en) * | 2012-04-28 | 2012-09-12 | 歌尔声学股份有限公司 | Printed circuit board (PCB) of Bluetooth earphone |
| CN105101608A (en) * | 2014-05-04 | 2015-11-25 | 群联电子股份有限公司 | Multi-layer printed circuit board structure, connector module and memorizer storage device |
| CN105101608B (en) * | 2014-05-04 | 2018-05-18 | 群联电子股份有限公司 | Multilayer printed circuit board structure, connector modules and memory storage apparatus |
| CN107194094A (en) * | 2017-05-27 | 2017-09-22 | 郑州云海信息技术有限公司 | A kind of quick method that Color scheme is set in PCB design |
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Legal Events
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| REG | Reference to a national code |
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