CN1305285C - Method and device for realing differential-deviation four-phase key-control coherent demodulation - Google Patents
Method and device for realing differential-deviation four-phase key-control coherent demodulation Download PDFInfo
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- CN1305285C CN1305285C CNB200310100404XA CN200310100404A CN1305285C CN 1305285 C CN1305285 C CN 1305285C CN B200310100404X A CNB200310100404X A CN B200310100404XA CN 200310100404 A CN200310100404 A CN 200310100404A CN 1305285 C CN1305285 C CN 1305285C
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Abstract
The present invention belongs to the digital communication field, concretely relates to a method and a device for realizing differential-deviation four-phase key-control (pi/4 DQPSK) coherent demodulation and particularly relates to a method and a device for realizing pi/4 DQPSK coherent demodulation based on a training sequence. The present invention gives an initial value respectively estimated by carrier frequency deviation and a carrier phase according to the training sequence and a reference modulation sequence thereof, and furthermore, the initial value and a first order digital phase locked loop are utilized to trace the carrier phase, and the carrier frequency deviation and the carrier phase are corrected for data; then the judgement output is carried out, and the frequency deviation and phase deviation compensating technique is used to realize the coherent demodulation. The digital phase-locked loop is designed by using the judgement output, and the digital phase-locked loop is utilized to trace the carrier phase, which ensures the algorithmic stability quality. The novel technique of two-time judgement is used, which makes the algorithm have very high fault freedom. Under the same bit error rate (such as, 10<-2>), the input signal-noise ratio required by the device is 1.6dB lower that required by differential decoding.
Description
Technical field
The invention belongs to digital communicating field, be specifically related to a kind of method and device of realizing differential offset quadriphase keying (pi/4 DQPSK) coherent demodulation, particularly a kind of based on training sequence, the method and the device of realization pi/4 DQPSK coherent demodulation.
Background technology
Along with the develop rapidly of mobile communication industry, digital communication system is applied among the multiple communication system more and more widely with its remarkable power system capacity and outstanding performance.
Used multiple modulator approach in the digital communication system.Wherein heterogeneous key moves (MPSK) modulation and comes into one's own with its good availability of frequency spectrum and bit error rate performance.It is with the modulation format of information stores in the phase place that transmits that heterogeneous key moves.Each phase place that transmits is represented 2 to M possible values, and M is an order of modulation.For example: two-phase keying (BPSK) (M=2) and quadriphase keying (QPSK) (M=4).
Demodulation for heterogeneous keying modulation signal generally has non-coherent demodulation and coherent demodulation dual mode.The coherent demodulation mode requires to estimate carrier phase.And non-coherent demodulation does not need carrier phase is estimated.
The most frequently used non-coherent demodulation implementation method is to carry out differential coding at transmitting terminal, and adopts differential decoding at receiving terminal.Differential coding be exactly information mapping in the phase difference of adjacent-symbol.If in the system of the heterogeneous keying modulation of utilization, adopt differential coding at transmitting terminal, adopt differential decoding at receiving terminal, this system just is called heterogeneous keying differential modulation system (DMPSK) so.Pi/4 DQPSK is a kind of permanent envelope modulation mode that grows up on DQPSK (M=4) basis.
At present, many digital communication systems have all adopted pi/4 quadriphase keying differential modulation, as PHS system, U.S.'s Digital Cellular System (IS-136) etc.Pi/4 DQPSK modulation is permanent envelope modulation mode, and the most tempting advantage is to use incoherent detection, the receiver simplicity of design.
As everyone knows, coherent demodulation generally can be good than Difference Solution tonality, sees [U.S.] John G.Proakis " digital communication ", McGraw-Hill Publications, 1983.But require carrier estimation more accurate.Existing many coherent demodulation modes are applied on the receiver.As: U.S. Patent No. 5,754,600 (Rahnema; Moe) Method and apparatus for optimumsoft-decision viterbi decoding of convolutional-differentialencoded QPSK data in coherent detection.For another example: U.S. Patent No. 5,285,480 (Chennakeshu etc.), ADAPTIVE MSLE-VA RECEIVER FOR DIGITALCELLULAR RADIO.These patents all are that coherent demodulation mode and coding and decoding mode are combined, and the whole bag of tricks (as: least mean-square error, maximal possibility estimation etc.) are applied on the training sequence, to provide optimum decision method.
Summary of the invention
The object of the present invention is to provide the method and the device of a kind of pi/4 of realization DQPSK coherent demodulation.
Core concept of the present invention is: by training sequence and with reference to modulation sequence, provide the initial value that Nonlinear Transformation in Frequency Offset Estimation and carrier phase are estimated, and then utilize initial value and single order digital phase-locked loop that carrier phase is followed the tracks of, and data are proofreaied and correct carrier wave frequency deviation and carrier phase, then adjudicate output.
The present invention is achieved in that
A kind of method that realizes pi/4 DQPSK coherent demodulation may further comprise the steps:
Step 2 is calculated the Nonlinear Transformation in Frequency Offset Estimation value and with respect to the carrier phase estimated value of reference modulation sequence, is provided carrier wave frequency deviation initial value P and carrier phase initial value F;
Step 3 is carried out phase alignment for each incoming symbol C;
Step 4, to the calibration result and the judgement of step 3 output, the result of judgement is T;
Step 5 is utilized the T as a result of incoming symbol C and judgement to calculate the value E1 of phase error, and margin of error E is carried out low-pass filtering;
Step 6 utilizes digital phase-locked loop that carrier phase is followed the tracks of.Change step 2 and handle next incoming symbol.
Described step 1 further comprises: preestablishing training sequence is 0 with reference to the initial value of modulation sequence and specification error amount E, sets the sequence number N of the incoming symbol of current calculating.Require: or get one of (1,0), (1,0), (0,1) and (0 ,-1), or odd point is got (/2 ， /2 with reference to odd point in the modulation sequence), (/2 ,-/2), one of (-/2 ， /2) and (-/2 ,-/2).Narration is got one of (1,0), (1,0), (0,1) and (0 ,-1) below with reference to odd point in the modulation sequence for convenience;
Described step 2 is calculated the Nonlinear Transformation in Frequency Offset Estimation value and with respect to the carrier phase estimated value of reference modulation sequence, provide carrier wave frequency deviation initial value P, with carrier phase initial value F, further comprise: at first the conjugation of known training sequence (as in the PHS system, the PR+UW word is totally 12 symbols) and received signal being multiplied each other obtains sequence S
i(i from 1 to 12), and with S
iAnd S
I-1Conjugate multiplication (i from 2 to 12) and addition, get itself and phase value, be frequency deviation initial value P; Utilize frequency deviation initial value P to compensate each incoming symbol then, the value that obtains again with the conjugate multiplication of training sequence, obtain 12 totals, these are counted addition and get it and phase value, be phase place initial value F;
Described step 3 is carried out phase alignment to each incoming symbol C and is further comprised: frequency deviation P and phase place F are compensated to the value that obtains on the incoming symbol C still put into C;
Described step 4 further comprises result's judgement of step 3: according to the constellation characteristics with reference to modulation sequence, if N is an odd number then with incoming symbol C rotation 45 degree, if being even number then incoming symbol C, do not rotate N, then C is carried out first time and adjudicate, the result of judgement is designated as: (a, b); With (a b) is combined into symbol C1.If N is odd number then symbol C1 rotation-45 is spent that C1 does not rotate if N is the even number then symbol; C1 is carried out differential ference spiral, and judgement obtains T as a result;
Described step 5 utilizes incoming symbol C and court verdict T to calculate the value E1 of this phase error, and margin of error E is carried out low-pass filtering further comprise: the conjugation that C be multiply by C1 is as error current amount E1, and margin of error E carried out the low-pass filtering result put into E;
Described step 6 is utilized digital phase-locked loop that carrier phase is followed the tracks of further to comprise: margin of error E is adjusted phase place F, obtain new phase place F, frequency deviation P is constant, changes step 2 over to and handles new incoming symbol.
A kind of device of realizing pi/4 DQPSK coherent demodulation is characterized in that described device comprises:
Carrier wave frequency deviation and carrier phase estimator (21), frequency deviation and phase alignment device (22), decision device (23) and phase tracker (24).
Described carrier wave frequency deviation and carrier phase estimator (21) further comprise carrier frequency offset estimator (211) and carrier phase offset estimator (212);
Described decision device (23) further comprises: phase shifter 1 (231), decision device (232) and phase shifter 2 (233);
Described phase tracker (24) further comprises: error maker (241), digital phase-locked loop (242);
Described carrier wave frequency deviation and carrier phase estimator (21) mainly are responsible for frequency deviation and phase place initial value and are estimated, the modulation symbol that imports the training sequence of setting carries out frequency offset estimating with the input data through carrier frequency offset estimator (211), carrier frequency offset estimator (211) output result is imported estimate the phase place initial value in the carrier phase offset estimator (212);
Described frequency deviation and phase alignment device (22) mainly are responsible for the data of input are carried out the compensation of frequency and phase deviation;
Described decision device (23) mainly is responsible for carrying out phase shift processing and judgement output for frequency deviation and phase alignment device (22) output result;
Described phase tracker (24) mainly is responsible for the value of the phase error of current sign and is calculated, and will carry out Phase Tracking in the error result input digit phase-locked loop.
The present invention adopts the technology of frequency deviation and phase deviation compensation, has realized coherent demodulation; Adopt judgement output to design digital phase-locked loop, utilize digital phase-locked loop that carrier phase is followed the tracks of, guaranteed the stability of algorithm; Adopt the innovative techniques of twice judgement, make algorithm that very high fault freedom be arranged; Described device is in the same error rate (as: 10
-2) under, the input signal-to-noise ratio of requirement is than the needed low 1.6dB of Difference Solution sign indicating number.
Description of drawings
Fig. 1 method flow diagram of the present invention;
Fig. 2 structure drawing of device of the present invention.
Embodiment
The present invention is described in further detail below in conjunction with accompanying drawing:
The initial value that main points of the present invention are based on Nonlinear Transformation in Frequency Offset Estimation and estimate with respect to the carrier phase of reference modulation sequence, and utilize the single order digital phase-locked loop that carrier phase is followed the tracks of, and, then carry out the pi/4DQPSK coherent demodulation method of twice judgement output to input adjustment of data frequency deviation and carrier phase.Relate to carrier wave frequency deviation and phase estimation, digital phase-locked loop and phase alignment.
Method set forth in the present invention can realize by following several steps:
The first step (101), the reference modulation sequence x of setting training sequence
i(i=1 is to M, and M gets 12 in the PHS system), the initial value of specification error amount E is 0.Suppose: get one of (1,0), (1,0), (0,1) and (0 ,-1) with reference to odd point in the modulation sequence, the even number point is got (/2 ， /2), (/2 ,-/2), one of (-/2 ， /2) and (-/2 ,-/2);
In second step (102), at first the conjugation of known training sequence (as in the PHS system, the PR+UW word is totally 12 symbols) and received signal being multiplied each other obtains sequence S
i(i from 1 to 12), and with S
iAnd S
I-1Conjugate multiplication (i from 2 to 12) and addition, get itself and the mould value, be frequency deviation initial value P;
In the 3rd step (103), utilize frequency deviation initial value P compensation incoming symbol y
i, the value that obtains again with the conjugate multiplication of training sequence, obtain 12 totals, these are counted addition and get it and the mould value, be phase place initial value F;
The 4th goes on foot (104), sets the sequence number N=1 of the symbol of current calculating, and current process symbol is: y
N
In the 5th step (105), frequency deviation P and phase place F are compensated to symbol y
NOn the value that obtains still put into y
NIn;
In the 6th step (106), judge whether N is odd number; If for odd number carried out for the 7th step, if do not carry out for the 8th step for odd number;
The 7th step (107), y
NRotation 45 degree;
The 8th step (108) is to y
NCarry out the judgement first time, the result who adjudicates is designated as: (a, b); With (a b) is combined into symbol C1=a+b*j;
In the 9th step (109), judge whether N is odd number; If for odd number carried out for the tenth step, if do not carry out for the 11 step for odd number;
The tenth step (110), C1 rotation-45 degree;
The 11 step (111), differential ference spiral, C1 multiply by conjugation judgement and the output court verdict of C0;
The 12 step (112), the value E1:y of the phase error of calculating current sign
NMultiply by the conjugation of C1, with y
NThe conjugation that multiply by C1 is as error current amount E1;
In the 13 step (113), E is carried out low-pass filtering.Formula: E=α E+ β E1, (alpha+beta=1) is also carried out the low-pass filtering result to margin of error E and is put into E;
In the 14 step (114), adjust phase place F with margin of error E.Formula: F=F+ γ E, (γ 〉=0) obtains new phase place F, and frequency deviation P is constant;
In the 15 step (115), judge whether new data input; If just do not finish demodulation; If new data input is arranged, continues next step;
In the 16 step (116), change the new incoming symbol of second step processing over to.
Fig. 2 is a coherent demodulation implement device pie graph provided by the present invention.All input data (2100) all will be passed through bit synchronizer (20), and bit synchronizer can adopt different method for synchronous at different systems, and this is a mature technology.Through the data behind the bit synchronizer (20) are (2111).The reference modulation sequence (2110) of training sequence and input data (2111) incoming carrier frequency offset estimators (211), output result (2121) and the input data (2111) after synchronizer is handled are sent in the carrier phase estimator (212), and the result is delivered to frequency deviation and phase alignment device (22); Frequency deviation and phase alignment device (22) calibration input this moment data (221), data (222) the input decision device (23) after the calibration; Data (222) after decision device (23) output result and the calibration are sent in the phase tracker (24).Phase compensation value in the tracking results FEEDBACK CONTROL carrier phase estimator (212).
The invention discloses a kind of by training sequence and with reference to modulation sequence, provide the initial value that Nonlinear Transformation in Frequency Offset Estimation and carrier phase are estimated, and then utilize initial value and single order digital phase-locked loop that carrier phase is followed the tracks of, and data are proofreaied and correct carrier wave frequency deviation and carrier phase, then adjudicate the pi/4 DQPSK demodulation method and the implement device of output.Described method uniqueness, novelty do not retrieve in present patent and pertinent literature, and described device constitutes simply, the development technique risk is little.
The present invention compared with former pi/4 DQPSK demodulation method has following characteristics:
The first, the present invention adopts the technology of frequency deviation and phase deviation compensation, has realized coherent demodulation.
The second, the present invention adopts and utilizes judgement output to design digital phase-locked loop, utilizes digital phase-locked loop that carrier phase is followed the tracks of, and has guaranteed the stability of algorithm.
The 3rd, the present invention has adopted the innovative techniques of twice judgement, makes algorithm that very high fault freedom be arranged.
The 4th, device of the present invention is in the same error rate (as: 10
-2) under, the input signal-to-noise ratio of requirement is than the needed low 1.6dB of Difference Solution sign indicating number.
In a word, adopt method and apparatus provided by the invention to realize pi/4 DQPSK coherent demodulation, not only simple for structure being easy to realized, and improved the receiver demodulation performance.
Claims (7)
1, a kind of method that realizes the coherent demodulation of differential offset quadriphase keying may further comprise the steps:
Step 1, the reference modulation sequence of setting training sequence, the initial value of specification error amount E is 0, sets the sequence number N of the incoming symbol of current calculating;
Step 2 is calculated the Nonlinear Transformation in Frequency Offset Estimation value and with respect to the carrier phase estimated value of reference modulation sequence, is provided carrier wave frequency deviation initial value P and carrier phase initial value F;
Step 3 is carried out phase alignment for each incoming symbol C;
Step 4 is carried out the conjugation judgement to the calibration result of step 3 output, and the result of judgement is C1;
Step 5 is utilized the C1 as a result of incoming symbol C and judgement to calculate the value E1 of phase error, and margin of error E is carried out low-pass filtering;
Step 6 utilizes digital phase-locked loop that carrier phase is followed the tracks of, and changes step 2 and handles next incoming symbol.
2, realize the method for differential offset quadriphase keying coherent demodulation according to claim 1, it is characterized in that described step 1:
The odd point value is one of (1,0), (1,0), (0,1) and (0 ,-1) in the reference modulation sequence of setting, and even number point value is (/2 ， /2), (/2 ,-/2), one of (-/2 ， /2) and (-/2 ,-/2); Perhaps the odd point value is (/2 ， /2), (/2 ,-/2), one of (-/2 ， /2) and (-/2 ,-/2), even number point value is one of (1,0), (1,0), (0,1) and (0 ,-1).
3, realize the method for differential offset quadriphase keying coherent demodulation according to claim 1, it is characterized in that described step 2 further comprises:
At first the conjugation of known training sequence and received signal are multiplied each other and obtain sequence S
i(i from 1 to 12), and with S
iAnd S
I-1Conjugate multiplication (i from 2 to 12) and addition, get itself and phase value, be frequency deviation initial value P;
Utilize frequency deviation initial value P to compensate each incoming symbol then, the value that obtains again with the conjugate multiplication of training sequence, obtain 12 totals, these are counted addition and get it and phase value, be phase place initial value F.
4, realize the method for differential offset quadriphase keying coherent demodulation according to claim 1, it is characterized in that described step 3 carries out phase alignment to each incoming symbol C and further comprise:
Frequency deviation P and phase place F are compensated to the value that obtains on the incoming symbol C still put into C.
5, realize the method for differential offset quadriphase keying coherent demodulation according to claim 1, it is characterized in that described step 4 further comprises result's judgement of step 3:
According to reference to the constellation characteristics of modulation sequence, if N is an odd number then with incoming symbol C rotation 45 degree,, do not rotate N if being even number then incoming symbol C, then C is carried out judgement first time, the result who adjudicates is designated as: (a, b); With (a b) is combined into symbol C1;
If N is odd number then symbol C1 rotation-45 is spent that C1 does not rotate if N is the even number then symbol, and C1 is carried out differential ference spiral, and judgement obtains T as a result.
6, realize the method for differential offset quadriphase keying coherent demodulation according to claim 1, it is characterized in that described step 5 further comprises:
The conjugation that C be multiply by C1 is as error current amount E1, and margin of error E is carried out low-pass filtering, and the filtering result puts into E.
7, realize the method for differential offset quadriphase keying coherent demodulation according to claim 1, it is characterized in that described step 6 further comprises: margin of error E is adjusted phase place F, obtain new phase place F, frequency deviation P is constant, changes step 2 over to and handles new incoming symbol.
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI350679B (en) * | 2006-04-03 | 2011-10-11 | Realtek Semiconductor Corp | Frequency offset correction for an ultrawideband communication system |
| CN102098254B (en) * | 2009-12-11 | 2013-04-17 | 无锡华润矽科微电子有限公司 | Phase judgment method used for DQPSK demodulation |
| CN101860516B (en) * | 2010-05-18 | 2013-01-16 | 湖北众友科技实业股份有限公司 | Signal demodulation method |
| EP2591566B1 (en) * | 2010-07-09 | 2018-03-14 | Huawei Technologies Co., Ltd. | Method and apparatus for carrier phase estimation and correction in a coherent optical system |
| CN102316058B (en) * | 2011-03-18 | 2014-04-09 | 中国科学院上海微系统与信息技术研究所 | Coherent demodulation device of non-geostationary orbit satellite DQPSK (Differential Quadrature Phase Shift Keying) communication |
| CN102332935B (en) * | 2011-09-21 | 2014-02-19 | 北京华力创通科技股份有限公司 | Carrier compensation system and carrier compensation method |
| CN104219185B (en) * | 2014-08-25 | 2018-06-15 | 武汉光迅科技股份有限公司 | A kind of line width compensating module and its compensation method applied to DQPSK systems |
| CN106301666A (en) * | 2015-06-03 | 2017-01-04 | 深圳市中兴微电子技术有限公司 | A kind of phase ambiguity bearing calibration and device |
| CN114285709B (en) * | 2021-12-31 | 2023-04-25 | 北京中科晶上科技股份有限公司 | Method and device for tracking phase of received signal and signal processing system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5438592A (en) * | 1994-03-31 | 1995-08-01 | At&T Corp. | PI/4-DQPSK phase state encoder/decoder |
| US5754600A (en) * | 1994-08-29 | 1998-05-19 | Motorola, Inc. | Method and apparatus for optimum soft-decision viterbi decoding of convolutional-differential encoded QPSK data in coherent detection |
| CN1315102A (en) * | 1998-08-31 | 2001-09-26 | 艾利森公司 | Coherent demodulation and sequence estimation for differential PSK signals |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5438592A (en) * | 1994-03-31 | 1995-08-01 | At&T Corp. | PI/4-DQPSK phase state encoder/decoder |
| US5754600A (en) * | 1994-08-29 | 1998-05-19 | Motorola, Inc. | Method and apparatus for optimum soft-decision viterbi decoding of convolutional-differential encoded QPSK data in coherent detection |
| CN1315102A (en) * | 1998-08-31 | 2001-09-26 | 艾利森公司 | Coherent demodulation and sequence estimation for differential PSK signals |
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