CN1300949C - Parallelling receiving method by chip balancer and rake receiver - Google Patents
Parallelling receiving method by chip balancer and rake receiver Download PDFInfo
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- CN1300949C CN1300949C CNB2004100449248A CN200410044924A CN1300949C CN 1300949 C CN1300949 C CN 1300949C CN B2004100449248 A CNB2004100449248 A CN B2004100449248A CN 200410044924 A CN200410044924 A CN 200410044924A CN 1300949 C CN1300949 C CN 1300949C
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Abstract
The present invention relates to a parallel receiving method by a chip balancer and a Rake receiver, which is suitable for the receiving of the chip level of a forward chain base band of a CDMA spread spectrum communication system (such as a CDMA2000 system or a WCDMA system); functions of the Rake receiver of the existing forward chain is replaced. In the present invention, the chip level balancer and the Rake receiver are combined to a parallel receiving method; a recombination pilot frequency signal trains the coefficient of the balancer to realize the chip level balance; the coefficient iterative balancer and the main balancer use a linkage operation mode. The present invention comprises the following steps that estimation results of a channel estimation device is used for recombinating the pilot frequency signal passing through the channel to train the coefficient of the iterative balancer; the main balancer linked with iterative balancer is used for inputting a base band signal in a balance way. The output of the main balancer and the output of the Rake are combined proportionally to deliver to a de-modulating module. The present invention has the advantages of superior performance, good work and low computation complexity for the receiving of the chip level of a forward chain base band of a CDMA.
Description
Technical field
The present invention is the mobile station side base band chip level signal acceptance method of code division multiple access (CDMA) system, belongs to the base band signal process technical field in the cdma cellular mobile communication.
Background technology
Rake in cdma system (Rake) receiver uses a plurality of " interdigital " to point to corresponding strong footpath respectively according to the estimated result of channel estimator, and carries out despreading to produce each symbol after the principle merging of output according to high specific with these " interdigital ".In existing real system the Rake receiver with its succinct structure and comparatively the performance of robust become the main selection of CDMA forward link receiver.
But the Rake receiver is considered as white noise with other footpath to its interference that causes when extracting the component in a certain footpath, this hypothesis makes the structure of Rake receiver have inadequate natural endowment, limited the Rake receiver when the multipath interference becomes principal contradiction (the more or high s/n ratio environment as distinguishable footpath), the further raising of receiver performance.
The mentality of designing of another kind of receiver is to make every effort to the feasible chip sequence of despreading module and the mean square error minimum between the expectation sequence sent into, the multiple access that this design criterion has been taken all factors into consideration noise and multipath formation disturbs, utilize finite length unit impulse response (FIR) filter to realize this criterion, can obtain (the LMMSE-chip equalizer of linear minimum mean-squared error-Qie Pu).Theory and practice proves that all the performance of LMMSE-chip equalizer is better than the Rake receiver, and especially this advantage is more obvious in the multipath serious interference and when requiring frame error rate low.
The implementation of LMMSE-chip equalizer is to calculate equalizer coefficients according to channel estimator channel that estimates and the associating impulse response that sends baseband filter, reception baseband filter, and the associating impulse response can be expressed as channel convolution matrix H
H is that (wherein L is the time delay expansion of channel to (L-1+M) * Metzler matrix; M is the length of equalizer).
The chip equalizer coefficients that obtains based on the LMMSE criterion is:
δ in the formula
DBe [00 ... 1
D+10 ... 0]
T, D is a delay parameter,
Be signal to noise ratio, I is M * M unit matrix.In the formula ()
HExpression Hermite transposition.Following formula can be regarded as and take all factors into consideration that multipath disturbs and the result of noise after to the influence of signal, and the LMMSE equalizer deteriorates to the zero forcing equalization device when signal to noise ratio snr＞＞1; SNR＜＜1 an o'clock LMMSE equalizer deteriorates to the Rake receiver.
Because the complexity of matrix inversion operation is difficult to Project Realization in when matrix is big, generally adopts the method for iteration that the matrix inversion operation in the formula 2 is rewritten as adaptive process:
LMMSE self adaptation chip balancer has more performance than Rake, and operand also adopts the chip balancer of traditional matrix inversion algorithm that bigger decline is arranged.But still relate to following problem: the multiplying amount of matrix and matrix and matrix and vector is still very big, even adopt the method compute matrix of FFT to multiply each other, the operand of equalizer complex multiplication and complex addition in the chip of the unit time is all up to M
2Level, receiver structure is also very complicated; Receiver performance will produce deterioration during M＜L, and especially when the time delay expansion had the stronger footpath of power to exist greater than the M place, this phenomenon was more obvious; In addition, LMMSE self adaptation chip equalizer requires channel estimator that very high precision is all arranged under the different speed of a motor vehicle, has increased the design difficulty of channel estimator and has realized cost.
Summary of the invention
Technical problem: the method that the purpose of this invention is to provide a kind of chip balancer and Rake receiver parallel receive, solve existing Rake receiver poor-performing or when requiring frame error rate very low in the multipath serious interference, and existing LMMSE self adaptation chip balancer computation complexity problem of higher still; Make in the bigger environment of channel delay expansion system's receptivity robust more.
Technical scheme: the method for a kind of chip balancer and Rake receiver parallel receive, it is characterized in that: the method that adopts chip balancer formation in parallel with Rake receiver code division multiple access system mobile station side base band to receive is handled base-band input signal, that is: the output of base-band input signal divides two-way, one the tunnel connects channel estimator, another road connects the input of equalizer and Rake receiver, the input of the output termination adder of equalizer and Rake receiver, the output termination despreading module of adder; Wherein, chip balancer is made of coefficient iteration equalizing device and master equalizer two parts of coefficient interlock, utilize the reconstruct of the original channel estimator estimated result of Rake receiver to be used to train coefficient iteration equalizing device through the pilot frequency sequence of channel, the coefficient of master equalizer and coefficient iteration equalizing device are consistent, master equalizer equalization base band input signal.
Coefficient iteration equalizing device is realized with the LMS algorithm, and is utilized the pilot signal of reconstruct to work in training method all the time.The mean square error estimated value that draws according to coefficient iteration equalizing device is determined the merging ratio of chip balancer and Rake; That is: the weight coefficient of Rake output gets 1 all the time, and the weight coefficient of chip balancer output is got 1-mean square error estimated value, when 1-mean square error estimated value less than 0 the time, the weight coefficient of chip balancer output gets 0.
The method that base-band input signal is handled is: base-band input signal is divided into two-way, and the first via is admitted to channel estimator, and the unit impulse response that is estimated current channel by channel estimator is used for pilot tone regeneration; Another roadbed tape input signal deducts the base-band input signal that draws after the local pilot signal that pilot tone regeneration reconstructs through pilot cancellation, and this signal is divided into two-way again, and the first via is admitted to another road of Rake and is admitted to master equalizer; The local pilot signal that pilot tone regeneration reconstructs is admitted to coefficient iteration equalizing device simultaneously, and coefficient iteration equalizing device is adjusted coefficient in view of the above, and the equalizer coefficients that draws is sent into master equalizer; Carry out despreading after the output result of Rake and master equalizer merges and produce symbol level output.
Main innovate point of the present invention is the method for chip balancer and Rake parallel receive and the method for the chip balancer that wherein reconstruct pilot signal is trained.In chip balancer and the Rake parallel receive method, the output of chip balancer and RAKE is sent into the despreading module after merging again.
Wherein the mentality of designing of chip balancer part is as follows: consider that cdma system mixes emission with pilot channel and other channel after the Walsh function isolation with quadrature, if can extracting with pilot channel " totally ", then the design of this equalizer will greatly be simplified, can obtain receiver structure shown in Figure 3 based on this thinking, abbreviate method one as:
The output of coefficient iteration equalizing device expectation is known in this structure, so coefficient iteration equalizing device works in physical training condition always, and available simple LMS (Least Mean Square lowest mean square) algorithm is realized, be need not to carry out matrix operation.Because not having noise, coefficient iteration equalizing device is a kind of zero forcing equalization device in essence.Master equalizer only is the FIR filter that a coefficient changes synchronously with coefficient iteration equalizing device.The Rake receiver can with the delay line of public this FIR filter of master equalizer.The pilot signal of reconstruct is used for pilot cancellation simultaneously in the process.The closed-loop adaptation structure of master equalizer also will obtain more performance and stronger robustness than the open loop structure of LMMSE (LinearMinimum Mean Square Error linear minimum mean-squared error) adaptive equalizer.The inventor is with the method for this receiver structure called after chip balancer and Rake parallel receive.This method of reseptance declines to a great extent the operand of complex multiplication and complex addition in the chip of the unit time to the order of magnitude suitable with equalizer length, and more succinct than LMMSE self adaptation chip equalizer.In addition, the mean square error of coefficient iteration equalizing device output also will be used to control the merging ratio of master equalizer and Rake receiver, too fast or some multipath distributes and will turn-off equalizer when causing the equalizer equalizes effect bad in channel variation, only adopts the output result of Rake receiver.
The associating impulse response of necessary complete reflection channel of the result of channel estimator and baseband filter among Fig. 3, and the position that does not have the footpath to exist in the channel is difficult to guarantee enough estimated accuracies because signal to noise ratio is hanged down.Can obtain the 2nd kind of chip balancer and Rake parallel receiver structure as this receiver structure is out of shape a little, abbreviate method two as.
In method two, channel estimator adopts the choosing footpath scheme consistent with the Rake receiver, and promptly the time delay between the footpath must not be less than 1 chip.The pilot tone baseband filter is the convolution that sends baseband filter and receive baseband filter, is used for the assisted channel estimation device and reconstructs the pilot signal approaching with actual conditions.
Consider that the introducing of pilot tone baseband filter has increased the complexity of system,, its secondary lobe is all left out the method two that can obtain simplifying as only keeping the main lobe of baseband filter.Because the baseband filter maximum is set as 1, utilizes the symmetry of baseband filter again, when 2 times of over-samplings, the complex multiplication number of times of the baseband filter of simplification on each sampled point only is 1 time.
Because can being cancelled the pilot tone baseband filter and be changed channel estimator choosing footpath scheme by method two, said method one obtains, the performing step of describing method two only here, specific as follows:
Step 1: use channel estimator to estimate the unit impulse response of current channel: the resolution of channel estimator is 1/4chip or 1/8chip, adopt the channel estimation methods of the average or sliding window IIR filtering of sliding window, during the choosing footpath, use the choosing footpath scheme of Rake receiver, promptly under the interval between the footpath is not less than the prerequisite of 1chip, choose 3～4 the strongest footpaths of power;
Step 2: with pilot tone regeneration reconstruct pilot signal: utilize information such as PN sign indicating number side-play amount to generate local PN sequence, the strong footpath information that draws according to channel estimator, use tapped delay line modeling multipath channel environment, reconstruct is through the pilot signal of multipath channel, make it pass through the pilot tone baseband filter again, to approach the pilot portion of receiving in the signal;
Step 3: the signal that receives is deducted the pilot signal of reconstruct, receive pilot portion in the signal to the receiver Effect on Performance with elimination;
Step 4: utilize the pilot signal of reconstruct and adopt LMS algorithm training coefficient iteration equalizing device, the attach most importance to local PN sequence of structure of its output expectation; The error that the LMS algorithm draws is sent into the estimated value that mean square error estimates to draw mean square error, and equalizer is according to the merging ratio of this estimated value decision master equalizer in adder;
Step 5: master equalizer is balanced through the received signal behind the pilot cancellation, the coefficient of master equalizer keeps and the interlock of coefficient iteration equalizing device, utilize the delay line of master equalizer to constitute the Rake receiver simultaneously, and the output of master equalizer and the output of Rake receiver are merged in proportion.
The cdma system forward link chip level receiver that the present invention constitutes, this receiver partly is made up of channel estimator, PN sequence generation module, tapped delay line model, pilot tone baseband filter, coefficient iteration equalizing device, master equalizer, Rake etc.The concrete function of each several part is described as follows:
Channel estimator: the channel estimator of this part and existing Rake receiver is basic identical, minimum resolution is 1/4chip, be responsible for guaranteeing that the time delay between the footpath is not less than under the prerequisite of 1 chip, estimate time delay, amplitude and the phase information in 4 the strongest footpaths of power, use for principal and subordinate's equalizer and Rake receiver.
PN sequence generation module: this part is according to the information such as PN sign indicating number side-play amount of this sub-district, and serial produces local I, Q two-way PN sequence is used for back level module.The speed and the chip speed that produce are synchronous, and the amplitude of dateout is 1.
Tapped delay line model: this part is used for the estimated result according to channel estimator, adopts the form of FIR filter, and reconstruct is by the pilot signal of multipath channel.The minimum resolution of this tapped delay line model is identical with channel estimator, is 1/4chip.
The pilot tone baseband filter: this filter is to constitute after transmission baseband filter and the convolution brachymemma that receives baseband filter, is used for making that the pilot signal of reconstruct more approaches the pilot portion of received signal.Because sending baseband filter, multipath channel and accepting the equivalent channel that baseband filter constitutes is a linear system, will send baseband filter and multipath channel switch, does not influence the unit impulse response of equivalent channel.
Equalizer expectation is adjusted: be used for the received signal amplitude that estimates according to channel estimator the amplitude of local PN sequence is weighted.Receive that weight coefficient was bigger when signal amplitude was big, hour weight coefficient is also less to receive signal amplitude.With the output expectation of the local PN sequence after the weighting, help improving the decoding performance of channel decoder in the fading channel environment as master equalizer.
Coefficient iteration equalizing device: coefficient iteration equalizing device adopts integer or fractional spaced plural LMS algorithm (this algorithm is finished by the equalizer coefficients adjustment), and chooses suitable FIR filter length.Coefficient iteration equalizing device works in training method all the time, and the output expectation of coefficient iteration equalizing device is the local PN sequence through amplitude weighting, is adjusted by the generation of PN sequence, equalizer expectation.Because training sequence does not have noise, coefficient iteration equalizing device is the zero forcing equalization device that works in training method in essence.
Master equalizer: master equalizer is used for balanced baseband signal through pilot cancellation.This equalizer only is the FIR filter of a coefficient with the interlock of coefficient iteration equalizing device, and its sampling rate is consistent with coefficient iteration equalizing device.
Rake:Rake receiver and existing Rake receiver structure are basic identical, but do not comprise despreading section.The shared delay line of this Rake receiver and master equalizer has several " interdigital ".
The mean square error estimator: the actual output of output expectation and coefficient iteration equalizing device is subtracted each other can obtain balancing error, the mean square error estimator with this square-error after, send into the estimated value that low pass filter draws mean square error.This estimated value is used to estimate the working condition of current equalizer, make in channel variation too fast or some multipath distribute when causing the equalizer equalizes effect bad and can enable control and multiplier cuts out equalizer, only adopt the output result of Rake receiver by equalizer.
Beneficial effect: beneficial effect of the present invention is mainly reflected in the following aspects:
1) because taken all factors into consideration that multipath disturbs and noise to the influence of signal, compare with existing Rake receiver, performance increases, especially the performance raising is more in the multipath serious interference or when requiring frame error rate low.
2) to compare robustness stronger with existing LMMSE self adaptation chip equalizer, exists or the position in footpath when changing at the multipath that has time delay greater than equalizer length, and performance can obviously not descend.
3) compare with existing LMMSE self adaptation chip equalizer, computation complexity descends greatly.The amount of calculation of complex addition and complex multiplication drops to the order of magnitude linear with equalizer length by the order of magnitude of equalizer length square.
Description of drawings
Fig. 1 is signal processing flow figure of the present invention.
Fig. 2 is the parallel method schematic diagram of chip balancer and Rake.
Fig. 3 is the 1st kind of chip balancer and Rake parallel receiver (method one) schematic diagram.
Fig. 4 is chip balancer and Rake parallel receiver implement device schematic diagram.
Fig. 5 is the two footpath models (performance comparison of different receivers during L＜M).Wherein L is the channel delay expansion, and M is an equalizer length; Among the figure, abscissa Ior/Ioc is the total power signal that receives and the ratio of noise gross power, and unit is dB, and ordinate SER is an error sign ratio, also is the ratio that mismark accounts for total symbolic number in the output of despreading module.
Fig. 6: the two footpath models (performance comparison of different receivers during L＞M).
Have among the above figure: base-band input signal 1, channel estimator 2, chip balancer 3, pilot tone regeneration 31, subtracter 32, coefficient iteration equalizing device 33, master equalizer 34, the PN sequence produces 35, tapped delay line model 36, pilot tone baseband filter 37, multiplier 38, equalizer expectation adjust 39, subtracter 310, equalizer coefficients adjustment 311, mean square error estimate 312, equalizer enables to control 313, multiplier 314, coefficient iteration equalizing device assist control 331, Rake receiver 4, adder 5, despreading module 6.
Embodiment
Fig. 1 is signal processing flow figure of the present invention.Wherein base-band input signal 1 is the baseband signal through mould/number (A/D) conversion and the processing of reception baseband filter; The CDMA mobile station side channel estimator of channel estimator 2 for utilizing matched filtering or slip correlation technique to realize; Despreading module 6 is identical with existing C DMA mobile station side despreading module, finishes the function of descrambling and despreading, and it is output as symbol (symbol) level signal.
Fig. 2 is the parallel method schematic diagram of chip balancer and Rake receiver 4.Wherein, equalizer 3 is a part of the present invention, and its specific implementation method is referring to the detailed description in Fig. 3～Fig. 4 and the patent specification; The device (not comprising its despreading section) that Rake receiver 4 receives for similar existing CDMA mobile station side base band; Adder 5 is the assembling section in equalizer and the Rake receiver parallel method, and this module is finished the function to the output weighting of equalizer simultaneously, and its specific implementation method is referring to Fig. 4.
Fig. 3 is the 1st kind of chip balancer and Rake receiver (method one).Wherein, one of pilot tone regeneration 31, subtracter 32, coefficient iteration equalizing device 33 and master equalizer 34 common implementation methods that constitute equalizer 3 among Fig. 2 of the present invention; Pilot tone regeneration 31 results that utilize channel estimator the to draw local pilot signal of regenerating is used for pilot cancellation and training coefficient iteration equalizing device; Subtracter 32 deducts the signal of pilot tone regeneration 31 as output with base-band input signal 1; Coefficient iteration equalizing device 33 utilizes the pilot signal training equalizer of pilot tone regeneration 31 outputs, utilizes the adaptive adjustment equalizer coefficients of respective algorithms; Master equalizer 34 is used for channel equalization, and the coefficient of its coefficient and coefficient iteration equalizing device keeps synchronously; The specific implementation method of coefficient iteration equalizing device 33 and master equalizer 34 is referring to the detailed description in Fig. 4 and the patent specification.
Fig. 4 is chip balancer and Rake receiver parallel receiver implement device figure.Wherein, the implement device that the PN sequence produces 35, the pilot tone in tapped delay line model 36 and the pilot tone baseband filter 37 common constructive methods two is regenerated 31 parts; The expectation of multiplier 38, equalizer adjusts 39, subtracter 310, equalizer coefficients adjustment 311, mean square error estimate 312, equalizer enables to control 313 and multiplier 314 is common constitutes coefficient iteration equalizing device assist control 331, is used for the operating state of control coefrficient iteration equalizing device and to the aid in treatment of master equalizer output signal.
Chip balancer of the present invention is handled base-band input signal with the method that the method for Rake receiver parallel receive adopts chip balancer formation in parallel with Rake receiver code division multiple access system mobile station side base band to receive, that is: the output of base-band input signal 1 divides two-way, one the tunnel connects channel estimator 2, another road connects the input of equalizer 3 and Rake receiver 4, the input of the output termination adder 5 of equalizer 3 and Rake receiver 4, the output termination despreading module 6 of adder 5; Wherein, chip balancer is made of coefficient iteration equalizing device and master equalizer two parts of coefficient interlock, utilize the reconstruct of the original channel estimator estimated result of Rake receiver to be used to train coefficient iteration equalizing device through the pilot frequency sequence of channel, the coefficient of master equalizer and coefficient iteration equalizing device are consistent, master equalizer equalization base band input signal.
Coefficient iteration equalizing device is realized with the LMS algorithm, and is utilized the pilot signal of reconstruct to work in training method all the time.The mean square error estimated value that draws according to coefficient iteration equalizing device is determined the merging ratio of chip balancer and Rake; That is: the weight coefficient of Rake receiver output gets 1 all the time, and the weight coefficient of chip balancer output is got 1-mean square error estimated value, when 1-mean square error estimated value less than 0 the time, the weight coefficient of chip balancer output gets 0.The method that base-band input signal is handled is: base-band input signal is divided into two-way, and the first via is admitted to channel estimator 2, and the unit impulse response that is estimated current channel by channel estimator 2 is used for pilot tone regeneration 31; Another roadbed tape input signal draws the base-band input signal that passes through pilot cancellation after deducting the pilot tone regeneration 31 local pilot signals that reconstruct, and this signal is divided into two-way again, and the first via is admitted to Rake receiver 4 another roads and is admitted to master equalizer 34; The pilot tone regeneration 31 local pilot signals that reconstruct are admitted to coefficient iteration equalizing device 33 simultaneously, and coefficient iteration equalizing device 33 is adjusted coefficient in view of the above, and the equalizer coefficients that draws is sent into master equalizer 34; Carry out despreading after the output result of Rake receiver 4 and master equalizer 34 merges and produce symbol level output.
Be example with the CDMA2000 platform below, the performance that provides two kinds of receivers of method two of the present invention and independent use LMMSE self adaptation chip equalizer and Rake receiver compares.
Signal processing of the present invention is as follows:
Step 1: use channel estimator 2 to estimate the unit impulse response of current channel.The resolution of channel estimator is 1/4chip, the self adaptation slip window iir filter that scheme is estimated for the band speed of a motor vehicle.When footpath choosing, use the choosing footpath scheme of Rake receiver, promptly under being not less than the prerequisite of 1chip, the interval between the footpath chooses 4 the strongest footpaths of power.
Step 2: with the pilot tone 2 reconstruct pilot signals of regenerating.Utilize information such as PN sign indicating number side-play amount to generate local PN sequence, according to the strong footpath information that channel estimator draws, use tapped delay line modeling multipath channel environment, reconstruct is through the pilot signal of multipath channel, make it pass through the pilot tone baseband filter again, to approach the pilot portion of receiving in the signal.
Step 3: the signal that receives is deducted the pilot signal (subtracter 32) of reconstruct, receive pilot portion in the signal to the receiver Effect on Performance with elimination.
Step 4: utilize the pilot signal of reconstruct and adopt LMS algorithm (equalizer coefficients is adjusted 311 and realized) training coefficient iteration equalizing device 33, its output expectation is local PN sequence.The error that the LMS algorithm draws (subtracter 310) is sent into mean square error and is estimated that 312 draw the estimated value of mean square error, equalizer enable to control 313 and multiplier 314 according to the merging ratio of this estimated value decision master equalizer 34 in adder 5.
Step 5: master equalizer 34 is balanced through the received signal behind the pilot cancellation, the master equalizer coefficient keeps and 33 interlocks of coefficient iteration equalizing device, utilize the delay line of master equalizer to constitute Rake receiver 4 receivers simultaneously, and the output of master equalizer and the output of Rake receiver receiver are merged by proper proportion.
Simulated conditions is as follows:
1) sample rate of every chip: Rake receiver 4 samplings; Method two of the present invention and LMMSE self adaptation chip equalizer are single-time sampling.The FIR length of equalizer is 32.
2) data rate is 153.6kbps, and spreading ratio is 4; Chnnel coding adopts the convolution code of 1/4 code check.
3) the total transmitting power in base station is 0dB: pilot channel-6dB wherein, and synchronizing channel-9dB, paging channel-9dB, Traffic Channel is-7dB that dump power is supplied with the influence of emulation from other user of this sub-district with the orthogonal interference that produces.
4) multipath channel produces with the tapped delay line model, and resolution is 1/4chip, and Jake ' s model, carrier frequency 2GHz are adopted in decline.
5) the emulation frame number of each point is 10000 frames among the figure, or erroneous frame reaches 500 frames.
Because the different receivers error sign ratio performance that records in the AWGN environment is very approaching, omits its performance curve at this.Fig. 5 is the speed of a motor vehicle when being 3km/h, the performances of two models such as strong footpath such as grade, and the time delay in these two footpaths is respectively 0chip and 2chip.The expansion of time delay between these two footpaths is increased to surpass equalizer length, can obtain result shown in Figure 6.(wherein prefix PC represents that this receiver has used the pilot cancellation technology)
By Fig. 5 and Fig. 6 as seen, during less than equalizer length, the present invention and LMMSE equalizer performance no significant difference all are better than traditional Rake receiver in the channel delay expansion.In addition, when the channel delay expansion surpassed equalizer length, serious deterioration appearred in the LMMSE equalizer performance, and the present invention can guarantee that still receiver obtains to be not less than the performance of Rake receiver.
Claims (4)
1, the method for a kind of chip balancer and Rake receiver parallel receive, it is characterized in that: the method that adopts chip balancer formation in parallel with Rake receiver code division multiple access system mobile station side base band to receive is handled base-band input signal, that is: the output of base-band input signal (1) divides two-way, one the tunnel connects channel estimator (2), another road connects the input of chip balancer (3) and Rake receiver (4), the input of the output termination adder (5) of chip balancer (3) and Rake receiver (4), the output termination despreading module (6) of adder (5); Wherein, chip balancer is made of coefficient iteration equalizing device and master equalizer two parts of coefficient interlock, utilize the original channel estimator of Rake receiver (2) estimated result reconstruct to be used to train coefficient iteration equalizing device through the pilot frequency sequence of channel, the coefficient of master equalizer and coefficient iteration equalizing device are consistent, master equalizer equalization base band input signal.
2, the method for chip balancer as claimed in claim 1 and Rake receiver parallel receive is characterized in that: coefficient iteration equalizing device is realized with the LMS algorithm, and is utilized the pilot signal of reconstruct to work in training method all the time.
3, the method for chip balancer as claimed in claim 1 and Rake receiver parallel receive is characterized in that: the mean square error estimated value that draws according to coefficient iteration equalizing device is determined the merging ratio of chip balancer and Rake receiver; That is: the weight coefficient of Rake receiver output gets 1 all the time, and the weight coefficient of chip balancer output is got 1-mean square error estimated value, when 1-mean square error estimated value less than 0 the time, the weight coefficient of chip balancer output gets 0.
4, the method for chip balancer as claimed in claim 1 and Rake receiver parallel receive, it is characterized in that: the method that base-band input signal is handled is: base-band input signal is divided into two-way, the first via is admitted to channel estimator (2), and the unit impulse response that is estimated current channel by channel estimator (2) is used for pilot tone regeneration (31); Another roadbed tape input signal deducts the base-band input signal that draws after the local pilot signal that pilot tone regeneration (31) reconstructs through pilot cancellation, this signal is divided into two-way again, and the first via is admitted to another road of Rake receiver (4) and is admitted to master equalizer (34); The local pilot signal that pilot tone regeneration (31) reconstructs is admitted to coefficient iteration equalizing device (33) simultaneously, and coefficient iteration equalizing device (33) is adjusted coefficient in view of the above, and the equalizer coefficients that draws is sent into master equalizer (34); Carry out despreading after the output result of Rake receiver (4) and master equalizer (34) merges and produce symbol level output.
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| CN101753173B (en) * | 2009-11-03 | 2013-04-17 | 华为终端有限公司 | Receiving method and equipment under long time delay extended channel |
| CN104702539B (en) * | 2015-01-29 | 2018-03-30 | 武汉剑通信息技术有限公司 | A kind of equalization methods of CDMA2000 Reverse Access Channels |
| CN105429711B (en) * | 2015-11-12 | 2018-08-17 | 哈尔滨工程大学 | Software- redundancy based on receiving hydrophone battle array is from the soft balanced underwater acoustic communication method of iteration |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001005052A1 (en) * | 1999-07-09 | 2001-01-18 | Nokia Mobile Phones | Interference suppression in a cdma receiver |
| WO2001018986A1 (en) * | 1999-09-10 | 2001-03-15 | Interdigital Technology Corporation | Interference cancellation in a spread spectrum communication system |
| CN1367591A (en) * | 2002-02-26 | 2002-09-04 | 东南大学 | Ruike and equalization cascade receiving method under the code division multiple address low band-spreading ratio and its equipment |
| EP1283602A2 (en) * | 1998-05-14 | 2003-02-12 | Interdigital Technology Corporation | Multipath CDMA receiver for reduced pilot |
-
2004
- 2004-06-07 CN CNB2004100449248A patent/CN1300949C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1283602A2 (en) * | 1998-05-14 | 2003-02-12 | Interdigital Technology Corporation | Multipath CDMA receiver for reduced pilot |
| WO2001005052A1 (en) * | 1999-07-09 | 2001-01-18 | Nokia Mobile Phones | Interference suppression in a cdma receiver |
| WO2001018986A1 (en) * | 1999-09-10 | 2001-03-15 | Interdigital Technology Corporation | Interference cancellation in a spread spectrum communication system |
| CN1367591A (en) * | 2002-02-26 | 2002-09-04 | 东南大学 | Ruike and equalization cascade receiving method under the code division multiple address low band-spreading ratio and its equipment |
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