CN1295429A - Laminating method and product of 8-layer printed circuit board - Google Patents
Laminating method and product of 8-layer printed circuit board Download PDFInfo
- Publication number
- CN1295429A CN1295429A CN 99123695 CN99123695A CN1295429A CN 1295429 A CN1295429 A CN 1295429A CN 99123695 CN99123695 CN 99123695 CN 99123695 A CN99123695 A CN 99123695A CN 1295429 A CN1295429 A CN 1295429A
- Authority
- CN
- China
- Prior art keywords
- layer
- circuit board
- pressing
- printed circuit
- insulating barrier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
In the eight-layer printed circuit board, there is one first pressed 2-6 mil thick insulating layer between the 4th and the 5th layers; one second pressed 3-11 mil thick insulating layer between the 3rd and the 4th layers and between 5th and the 6rh layers separately; one third pressed 3-9 mil thick insulating layer between the 2nd and the 3rd layers and between the 6th and the 7th layers separately; and one forth pressed 2.5-6.5 mil thick insulating layer between the 1st and the 2nd layers and between 7th and the 8th layers separately. Thus, the signal line layers are made to impedance matched and has less reflection and electromagnetic interference to high speed signal. The printed circuit board is suitable for use of high speed signal.
Description
The present invention relates to a kind of compression method and finished product thereof of circuit board, relate in particular to and a kind ofly can make the impedance matching of circuit board ectonexine, thereby reduce the compression method and the finished product thereof of the 8-layer printed circuit board of high speed signal reflection and electromagnetic interference.
As shown in Figure 1, this is each layer arrangement schematic diagram of a kind of prior art thickness of slab 8-layer printed circuit board that is 1.2mm, first of this circuit board, three, six and eight layers is signal lead layer S1, S2, S3 and S4, second, four and seven layers is ground plane GND, and layer 5 is bus plane Power, and this ground floor S1 and the 8th layer of S4 are that part is laid layer, pressing has the first thick insulating barrier of a 8mil (1mil=0.00254cm) between the 4th layer of this circuit board and the layer 5, between the 3rd layer and the 4th layer of this circuit board and between layer 6 and the layer 5 respectively pressing the second thick insulating barrier of one 5mil is arranged, between the second layer of this circuit board and the 3rd layer and between layer 7 and the layer 6 respectively pressing the 3rd thick insulating barrier of one 8mil is arranged, pressing has the 4th thick insulating barrier of a 2.5mil between the ground floor of this circuit board and the second layer and between the 8th layer and the layer 7, and, the material of this second insulating barrier and the 4th insulating barrier is a mylar (prepreg), the material of this first insulating barrier and the 3rd insulating barrier is a papery, the base material of glass fibre and so on (core), and the pressing mode between aforesaid each laminate can make this first laminate S1 to resistance value Rs1=the 8th laminate S4 of the second laminate GND to 44 ohm of the resistance value Rs4 of layer 7 plate GND, this three ply board S2 to this layer 6 plate of resistance value Rs2=S3 of the second laminate GND and the 4th laminate GND to 55 ohm of the resistance value Rs3 of layer 5 plate Power and layer 7 plate GND, but the pressing structure of prior art has following shortcoming:
1. the high speed signal reflection is serious.Above-mentioned circuit board is when walking the high speed signal, the resistance value design of its transmission line, just the layer with layer between resistance value, preferably should be according to the specification theoretical value that Intel (Intel) sets at 55 Ω ± 10%, just be preferably between 49.5 Ω ~ 60.5 Ω, but because the result that the circuit board of prior art is calculated, wherein resistance value Rs1 and the Rs4 of this first laminate S1 (lamina rara externa) and the 8th laminate S4 (lamina rara externa) equal 44 Ω, resistance value Rs2 and the Rs3 of this three ply board S2 (inner plating) and layer 6 plate S3 (inner plating) equal 55 Ω, Rs1=Rs4=44 Ω just, Rs2=Rs3=55 Ω, the ectonexine plate resistance is anti-to differ up to 11 ohm, can cause impedance not match because of the anti-gap of its ectonexine plate resistance thus, thereby cause when a high speed signal transmits in this circuit board, this high speed signal is from skin, just part is laid layer (as ground floor or the 8th layer) when wearing layer to internal layer (as three ply board or layer 6 plate), can cause the signal reflex of this high speed signal, cause signal transmitting quality bad, here our reflection coefficient that can calculate this high speed signal is
。
2. magnetic flux negative function variation.Because the reflection of this high speed signal can produce standing wave, and this standing wave can strengthen the electromagenetic wave radiation of this high speed signal, thereby makes its magnetic flux negative function variation, causes too high Electromagnetic Interference.
So, if can make first and third, six and eight layer of this circuit board more approaching for signal lead layer S1, S2, S3 and the relative resistance value Rs1 of S4, Rs2, Rs3, Rs4, can reduce reflection coefficient, Electromagnetic Interference is reduced, and, the value of product is improved applicable to high-speed line, and because impedance is controlled, so when making cabling wear, do not need to change the cabling live width, just can improve the ageing of layout to different layers when this circuit-board laying-out.
The object of the present invention is to provide a kind of each layer signal routing layer impedance matching, thereby can reduce the reflection and the Electromagnetic Interference of high speed signal, make this circuit board be applicable to the compression method and the finished product thereof of the 8-layer printed circuit board of high speed signal.
The object of the present invention is achieved like this:
A kind of method of 8-layer printed circuit board pressing, first and third, six and eight layer of this circuit board is the signal lead layer, and second, four and seven layer is ground plane, and layer 5 is a bus plane, is characterized in that this method comprises the following steps:
A. the 4th of this circuit board the layer be with at a distance of layer 5 in the 2-6mil scope with insulation material pressing;
B. among the step a two surfaces of the circuit board of pressing be respectively with at a distance of in the 3rd, six layer of this circuit board in the 3-11mil scope with the pressing of insulation material;
C. among the step b two surfaces of the circuit board of pressing be respectively with at a distance of in second, seven layer of this circuit board in the 3-9mil scope with the pressing of insulation material;
D. among the step c two surfaces of the circuit board of pressing be respectively with at a distance of in first, eight layer of this circuit board in the 2.5-6.5mil scope with the pressing of insulation material.
A kind of 8-layer printed circuit board made from said method, first of this circuit board, three, six and eight layers is the signal lead layer, second, four and seven layers is ground plane, layer 5 is a bus plane, and be folded with one first insulating barrier between the 4th layer of this circuit board and the layer 5, be folded with one second insulating barrier respectively between the 3rd layer and the 4th layer of this circuit board and between this layer 6 and the layer 5, be folded with one the 3rd insulating barrier respectively between the second layer of this circuit board and the 3rd layer and between this layer 7 and the layer 6, be folded with one the 4th insulating barrier respectively between the ground floor of this circuit board and the second layer and between the 8th layer and the layer 7, be characterized in: the thickness of described first insulating barrier is in the 2-6mil scope; The thickness of described each second insulating barrier is in the 3-11mil scope; The thickness of described each the 3rd insulating barrier is in the 3-9mil scope; The thickness of described each the 4th insulating barrier is in the 2.5-6.5mil scope.
The compression method of 8-layer printed circuit board of the present invention and finished product thereof make it compared with prior art owing to adopted above-mentioned technical scheme, have tangible advantage and good effect.Because the thickness of each first insulating barrier is in the 2-6mil scope, the thickness of each second insulating barrier is in the 3-11mil scope, the thickness of each the 3rd insulating barrier is in the 3-9mil scope, and the thickness of each the 4th insulating barrier is in the 2.5-6.5mil scope, therefore can make each layer signal routing layer impedance matching, and can reduce the reflection and the Electromagnetic Interference of high speed signal, so that this circuit board is applicable to the laying of high speed signal.
By following to 8-layer printed circuit board of the present invention compression method and an embodiment of finished product in conjunction with the description of its accompanying drawing, can further understand purpose of the present invention, concrete structure and advantage.Wherein, accompanying drawing is:
Fig. 1 is the pressing and the thickness schematic diagram of each interlayer of prior art 8-layer printed circuit board;
Fig. 2 is pressing and the thickness schematic diagram according to each interlayer of the compression method of the 8-layer printed circuit board of the present invention's proposition and finished product thereof;
Fig. 3 is the cut-away section schematic diagram () of 8-layer printed circuit board in the compression method of 8-layer printed circuit board of the present invention and the finished product thereof;
Fig. 4 is another part generalized section (two) of 8-layer printed circuit board in the compression method of 8-layer printed circuit board of the present invention and the finished product thereof.
As shown in Figure 2, the compression method of 8-layer printed circuit board of the present invention and finished product thereof, its thickness of slab is between 0.7-1.7mm, be that 8-layer printed circuit board with thickness of slab 1.2mm illustrates as preferred embodiment in this case, 8-layer printed circuit board of the present invention has comprised four layer signal routing layer S1, S2, S3 and S4, three layers of ground plane GND, one deck bus plane Power, and be folded in the insulating barrier between the adjacent circuit plate in twos respectively.
First and third, six and eight layer of this circuit board is signal lead layer S1, S2, S3 and S4, and signal lead layer S1, S2, S3, S4 all utilize copper platinum, and this ground floor S1 and the 8th layer of S4 are that the sub-part of power supply is laid.
Second, four and seven layer of this circuit board is ground plane GND.
The layer 5 of this circuit board then is bus plane Power.
Be folded with one first insulating barrier between the 4th layer of this circuit board and layer 5, its thickness is H1, and the employed material of this first insulating barrier is the base material (core) of papery, glass fibre and so on.
Be folded with one second insulating barrier respectively between the 3rd layer and the 4th layer of this circuit board and between layer 6 and the layer 5, its thickness is H2, and the employed material of this second insulating barrier is mylar (prepreg).
Between the second layer of this circuit board and the 3rd layer and be folded with one the 3rd insulating barrier respectively between layer 7 and the layer 6, its thickness is H3, and the employed material of the 3rd insulating barrier base material (core) that is papery, glass fibre and so on.
Be folded with one the 4th insulating barrier respectively between the ground floor of this circuit board and the second layer and between the 8th layer and the layer 7, its thickness is H4, and the employed material of the 4th insulating barrier is mylar (prepreg).
Respectively this signal lead layer S1 of circuit board of the present invention, S2, S3, the relative resistance value of S4 preferably equates or is close, and in 49.5 ~ 59.5 ohm of the theoretical resistance values of the high-speed line that is preferably in Intel (Intel) regulation, make respectively this signal lead layer S1 by the thickness that changes each insulating barrier, S2, S3, the relative resistance value of S4 changes thereupon, thereby reach the purpose of each layer impedance coupling, simultaneously, compression method because of this 8-layer printed circuit board, at first insert and put the first insulating barrier pressing between the 4th layer and the layer 5, then reach between the 3rd layer and the 4th layer and insert and put pressing behind second insulating barrier between this layer 6 and the layer 5 respectively, and insert and put pressing behind the 3rd insulating barrier between this second layer and the 3rd layer and between this layer 7 and the layer 6 respectively, after being gripped with one the 4th insulating barrier pressing respectively between this ground floor and the second layer and between the 8th layer and the layer 7, constitute 8-layer printed circuit board at last, if so make the thickness of these two second insulating barriers identical, the thickness of this two the 3rd insulating barrier and two the 4th insulating barriers is also identical, comparatively convenient on not only making, also meet general manufacture.
Please cooperate referring to shown in Figure 3, the outer field relative resistance value of this circuit board is the resistance value Rs1 of the first signal lead layer S1 with respect to ground plane GND (the circuit board second layer just), or be the resistance value Rs4 of the 8th signal lead layer S4 with respect to ground plane GND (circuit board layer 7 just), obtain resistance value Rs1 (or Rs4 so can utilize following formula 1, because this two the 4th thickness of insulating layer is identical, so Rs1=Rs4):
Wherein: ER=dielectric coefficient=4.5.
The thickness of H4=the 4th insulating barrier.
The W=live width, live width can be 2-8mil, is to illustrate as preferred embodiment with 5mil at this.
Thickness=1.4mil of this first signal lead layer of T1=S1.
In an embodiment of the present invention, the thickness that the thickness of this each layer of circuit board removes outer (S4 of the first signal lead layer S1 and the 8th signal lead layer just) is 1.4mil, the thickness of other each layers is 0.7mil, the relative impedance of the internal layer of this circuit board is secondary signal routing layer S2 with respect to the relative impedance Rs2 of ground plane GND (the circuit board second layer) with ground plane GND (the 4th layer of circuit board), or be that the 3rd signal lead layer S3 is with respect to the relative impedance Rs3 of bus plane Power (circuit board layer 5) with ground plane GND (circuit board layer 7), utilize following formula 2 to obtain resistance value Rs2 (or Rs3 again, because the thickness H2 of two second insulating barriers is identical, so Rs2=Rs3), and please cooperate shown in Figure 4:
Wherein: ER=dielectric radio coefficient=4.5
H2=second thickness of insulating layer
H3=the 3rd thickness of insulating layer
Thickness=the 0.7mil of T2=secondary signal routing layer
The W=live width, live width can be 2-8mil, is to illustrate as preferred embodiment with 5mil at this.2H4+2H3+2H2+1H1+2T1+6T2 ≌ 48.6mil ... formula 3
In addition, the gross thickness of this circuit board is necessary for 1.2mm (just for 48mil) or in its error range, also can say as formula 3 representedly, and the inventor utilizes above-listed mode, obtains preferred embodiment of the present invention:
When the thickness H1 of this first insulating barrier in the 2-6mil scope, be good at this with H1=4mil;
The thickness H2 of this second insulating barrier is good with H2=7mil in the 3-11mil scope;
The thickness H3 of the 3rd insulating barrier is good with H3=6mil in the 3-9mil scope;
The thickness H4 of the 4th insulating barrier is good with H4=4.5mil in the 2.5-6.5mil scope;
At this moment, this first signal lead layer S1 equals the 4th signal lead layer S4 resistance value Rs4=58 ohm with respect to ground plane GND (circuit board layer 7) with respect to the resistance value Rs1 of ground plane GND (the circuit board second layer), Rs1=Rs4=58 Ω (outer layer impedance) just, and equaling the 3rd signal lead layer S3 with respect to the relative impedance Rs2 of two ground plane GND (circuit board second and the 4th layer), this secondary signal routing layer S2 equals 52 ohm with the relative impedance Rs3 of ground plane GND (circuit board layer 7) with respect to bus plane Power (circuit board layer 5), Rs2=Rs3=52 Ω (interior layer impedance) just, these resistance values drop in the scope of 55 Ω ± 10% all, and in, the lamina rara externa impedance only differs 6 ohm, be half of prior art, and meet 2H4+2H3+2H2+1H1+2T1+6T2=2 * 4.5mil+2 * 6mil+2 * 7mil+1 * 4mil+2 * 1.4mil+6 * 0.7mil=46mil 1.2mm (in admissible error).
In sum, the method for 8-layer printed circuit board pressing of the present invention and finished product thereof by above-mentioned method, produce the 8-layer printed circuit board with following advantages:
1. reduce the reflection of high speed signal. In preferred embodiment of the present invention, Rs1=Rs4=58 Ω, Rs2=Rs3=52 Ω, these resistance values drop in the scope of 55 Ω ± 10% all, and this inside and outside laminate impedance only differs 6 Ohm, for the thickness of slab 1.2mm 8-layer printed circuit board of prior art half, reflectance factor also obviously is reduced to existing Half of technology, reflectance factor only has 0.054, so the situation of high speed signal reflection obviously reduces, and is suitableeer Walk in high speed signal.
2. reduction Electromagnetic Interference. Because the situation of this high speed signal reflection is obviously improved and has been reduced, so More can not produce standing wave, thereby make its magnetic flux negative function better, the Electromagnetic Interference situation reduces, and can accord with thus Close present EMI standard.
3. be applicable to the high speed signal layout. Because by being minimized high speed signal by compression method of the present invention Reflection, thereby reduce Electromagnetic Interference, the high speed signal walking can not had problems, so be applicable at a high speed The signal layout can be in response to cooperation circuit board fabrication industry toward the high speed signal development, and the value that improves product reaches Competitiveness.
4. improve the ageing of layout. Owing to during layout, worn to the situation of internal layer, because of each by skin at cabling The relative impedance of the fixing and inside and outside layer of the thickness of insulating barrier has reached impedance matching, so need not change cabling Live width just can reach the effect of impedance Control, and makes the ageing raising of layout.
Claims (16)
1. the method for a 8-layer printed circuit board pressing, first and third, six and eight layer of this circuit board is the signal lead layer, and second, four and seven layer is ground plane, and layer 5 is a bus plane, it is characterized in that this method comprises the following steps:
A. the 4th of this circuit board the layer be with at a distance of layer 5 in the 2-6mil scope with insulation material pressing;
B. among the step a two surfaces of the circuit board of pressing be respectively with at a distance of in the 3rd, six layer of this circuit board in the 3-11mil scope with the pressing of insulation material;
C. among the step b two surfaces of the circuit board of pressing be respectively with at a distance of in second, seven layer of this circuit board in the 3-9mil scope with the pressing of insulation material;
D. among the step c two surfaces of the circuit board of pressing be respectively with at a distance of in first, eight layer of this circuit board in the 2.5-6.5mil scope with the pressing of insulation material.
2. the method for 8-layer printed circuit board pressing as claimed in claim 1 is characterized in that: the insulation material of institute's pressing is a mylar in described step b and the steps d.
3. the method for 8-layer printed circuit board pressing as claimed in claim 1 is characterized in that: the insulation material of institute's pressing is a base material among described step a and the step c.
4. the method for 8-layer printed circuit board pressing as claimed in claim 1 is characterized in that: among the described step a insulation material of institute's pressing thick be to be best with 4mil.
5. the method for 8-layer printed circuit board pressing as claimed in claim 1 is characterized in that: among the described step b insulation material of institute's pressing thick be to be best with 7mil.
6. the method for 8-layer printed circuit board pressing as claimed in claim 1 is characterized in that: among the described step c insulation material of institute's pressing thick be to be best with 6mil.
7. the method for 8-layer printed circuit board pressing as claimed in claim 1 is characterized in that: in the described steps d insulation material of institute's pressing thick be to be best with 4.5mil.
8. the method for 8-layer printed circuit board pressing as claimed in claim 1 is characterized in that: the thickness of slab of described 8-layer printed circuit board is between 0.7mil-1.7mil, and is the best with 1.2mil.
9. 8-layer printed circuit board made from the method for the described 8-layer printed circuit board pressing of claim 1, first of this circuit board, three, six and eight layers is the signal lead layer, second, four and seven layers is ground plane, layer 5 is a bus plane, and be folded with one first insulating barrier between the 4th layer of this circuit board and the layer 5, be folded with one second insulating barrier respectively between the 3rd layer and the 4th layer of this circuit board and between this layer 6 and the layer 5, be folded with one the 3rd insulating barrier respectively between the second layer of this circuit board and the 3rd layer and between this layer 7 and the layer 6, be folded with one the 4th insulating barrier respectively between the ground floor of this circuit board and the second layer and between the 8th layer and the layer 7, it is characterized in that:
The thickness of described first insulating barrier is in the 2-6mil scope; The thickness of described each second insulating barrier is in the 3-11mil scope; The thickness of described each the 3rd insulating barrier is in the 3-9mil scope; The thickness of described each the 4th insulating barrier is in the 2.5-6.5mil scope.
10. 8-layer printed circuit board as claimed in claim 9 is characterized in that: described each second insulation material and each the 4th insulation material are mylar.
11. 8-layer printed circuit board as claimed in claim 9 is characterized in that: the described first insulation material and each the 3rd insulation material are base material.
12. 8-layer printed circuit board as claimed in claim 9 is characterized in that: described each first thick 4mil of being of material that insulate.
13. 8-layer printed circuit board as claimed in claim 9 is characterized in that: described each second thick 7mil of being of material that insulate.
14. 8-layer printed circuit board as claimed in claim 9 is characterized in that: described each the 3rd thick 6mil of being of material that insulate.
15. 8-layer printed circuit board as claimed in claim 9 is characterized in that: described each the 4th thick 4.5mil of being of material that insulate.
16. 8-layer printed circuit board as claimed in claim 9 is characterized in that: the thickness of slab of described 8-layer printed circuit board is between 0.7mil-1.7mil, and is the best with 1.2mil.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99123695 CN1295429A (en) | 1999-11-04 | 1999-11-04 | Laminating method and product of 8-layer printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99123695 CN1295429A (en) | 1999-11-04 | 1999-11-04 | Laminating method and product of 8-layer printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1295429A true CN1295429A (en) | 2001-05-16 |
Family
ID=5282912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 99123695 Pending CN1295429A (en) | 1999-11-04 | 1999-11-04 | Laminating method and product of 8-layer printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1295429A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106455295A (en) * | 2016-10-14 | 2017-02-22 | 盛科网络（苏州）有限公司 | PCB (printed circuit board) |
| CN106658941A (en) * | 2016-10-26 | 2017-05-10 | 努比亚技术有限公司 | Signal anti-interference circuit, PCB and PCB design method |
-
1999
- 1999-11-04 CN CN 99123695 patent/CN1295429A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106455295A (en) * | 2016-10-14 | 2017-02-22 | 盛科网络（苏州）有限公司 | PCB (printed circuit board) |
| CN106658941A (en) * | 2016-10-26 | 2017-05-10 | 努比亚技术有限公司 | Signal anti-interference circuit, PCB and PCB design method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7737362B2 (en) | Multi-layer shielded wire | |
| TWI248333B (en) | Multi-layer printed circuit board and method for manufacturing the same | |
| JP2002353588A (en) | Wiring board and producing method therefor | |
| CN1906800A (en) | Directional coupler | |
| WO2009028108A1 (en) | Multi-layer substrate | |
| EP3334259A1 (en) | Pcb transmission lines having reduced loss | |
| CN1295429A (en) | Laminating method and product of 8-layer printed circuit board | |
| US20020153164A1 (en) | Multi-layer circuit board | |
| CN1248554C (en) | Technology for laminating 6-layer circuit board suitable for high-speed signals and its product | |
| CN1148110C (en) | Laminating method and product of 8-layer printed circuit board | |
| CN211457495U (en) | Flexible circuit board | |
| CN1538466A (en) | Low induction resistance device of bidirectional archimedes spiral arrangement | |
| CN1248553C (en) | Technology for laminating 6-layer circuit board and its product | |
| CN1159960C (en) | Laminating method and product of 8-layer printed circuit board | |
| CN1151707C (en) | Laminating method and product of 8-layer printed circuit board | |
| CN2448046Y (en) | Six-layer circuit board adapted for high-speed signals | |
| US6417460B1 (en) | Multi-layer circuit board having signal, ground and power layers | |
| CN2445544Y (en) | Six-layer circuit board | |
| CN1388737A (en) | Circuit board capable of inhibiting electromagnetic interference and its inhibition method | |
| US6384340B1 (en) | Multi-layer circuit board | |
| CN1344130A (en) | Technology for laminating 6-layer circuit board and its product | |
| CN1268181C (en) | Laminating method and product of circuit board with low dielectric coefficient insulating material to inhibitor electromagnetic interference | |
| CN2448047Y (en) | Six-layer circuit board | |
| US6548858B2 (en) | Multi-layer circuit board | |
| JP4471281B2 (en) | Multilayer high frequency circuit board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |