CN1285102C - Metallic silicifying double-layer structure and method for forming same - Google Patents
Metallic silicifying double-layer structure and method for forming same Download PDFInfo
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- CN1285102C CN1285102C CN 03143025 CN03143025A CN1285102C CN 1285102 C CN1285102 C CN 1285102C CN 03143025 CN03143025 CN 03143025 CN 03143025 A CN03143025 A CN 03143025A CN 1285102 C CN1285102 C CN 1285102C
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Abstract
The present invention discloses a method for forming a semiconductor device with a metal silicification double-layer structure. Firstly, a silicon substrate is provided, and the silicon substrate is provided with a grid and a source electrode/ drain electrode region; a nickel metal layer and a cobalt metal level are orderly deposited on the silicon substrate in the mode of compliance and then, heat treatment is carried out to the silicon substrate; a cobalt / nickel cobalt / nickel double layer metal silicide is formed on the grid and the source electrode/ drain electrode region, and finally, a silicified cobalt metal layer and a nickel metal layer are removed. The present invention also discloses the semiconductor device with the metal silicification double-layer structure.
Description
Technical field
Present invention is directed to a kind of formation method of metal silicide, particularly relevant for a kind of autoregistration metal silication double-decker and forming method thereof and have above-mentioned double-deck semiconductor device and forming method thereof.
Background technology
Along with development of integrated circuits, size of components continues to dwindle to improve the integrated level of assembly.When size of components was dwindled, the grid of low-resistance value becomes the subject under discussion that industry is extensively inquired into recently, and was wherein important with the use of metal silicide materials.The metal silicide of low-resistance value system at present is widely used on the grid and source/drain of integrated circuit package, in order to reduce contact resistance, recent modal manufacture method is autoregistration silicidation technique (self-aligned silicidation, SALICIDE), its method system is formed at metal on the silicon base earlier, forms metal silicide by heat treatment makes metal and pasc reaction on grid and source/drain again.
In at present all metal silicide materials, with titanium disilicide (TiSi
2), cobalt disilicide (CoSi
2), and the resistivity of nickle silicide (NiSi) minimum, be about 15～20 μ ohm-cm.With regard to the titanium silicide material, it has preferable thermal stability and titanium can reduce the lip-deep native oxide of silicon base (nativeoxide) effectively.Yet, need to implement the titanium disilicide (C54-TiSi of two stage tempering program on its processing procedure usually with the center of area (faced-centered) structure of formation tool low-resistivity
2).Moreover, along with dwindling of live width, below 0.25 μ m, the thickness attenuation of titanium disilicide and agglomerateization (agglomeration) phenomenon easily takes place and sheet resistor is increased, promptly so-called narrow linewidth effect (narrow-line-width effect).Therefore, little to 0.25 μ m when following when live width institute, this kind material is no longer suitable.
Therefore with regard to the cobalt silicide material, its thermal stability is similar to the titanium silicide material, but its sheet resistor value and with live width very big relation is arranged unlike the titanium silicide material becomes the material of using always in the following processing procedure of 0.18 μ m.Yet it can't need be careful the cleaning of silicon face as titanium can reduce the native oxide of silicon face.Moreover its processing procedure also needs two stages tempering program forming the cobalt disilicide of tool low-resistivity, and is contracted to 65nm when following when live width, and high temperature will cause the generation of agglomerate phenomenon and increase its sheet resistor value.
With regard to nickel suicide material, it is too high only to need the tempering program in a stage and temperature need not on its processing procedure, the too high higher nickel disilicide (NiSi of resistivity that can form on the contrary
2) phase place.Moreover its resistivity is not returned equally along with live width narrows and very big variation is arranged.In addition, the silicon of its consumption can be avoided prominent (spiking) phenomenon of point on the shallow junction than titanium silicide and next the lacking of cobalt silicide.Unfortunately, when making integrated circuit, often be applied to fluorine-containing plasma manufacture, fluorine atom wherein is the nickle atom generation bond of material and produce amorphous phase on its surface therewith easily, causes the sheet resistor value to rise.
United States Patent (USP) the 5th, 047, disclose the double-deck method of a kind of formation autoregistration titanium nitride/cobalt silicide for No. 367, it is titanium deposition metal level and cobalt metal level in regular turn on silicon base earlier, again by the heat treatment of nitrogenous atmosphere to finish the double-deck making of autoregistration titanium nitride/cobalt silicide.Moreover United States Patent (USP) the 6th, 509 discloses a kind of manufacture method of contact hole barrier layer No. 265, and it is deposition one titanium niobium alloy layer on silicon base earlier, again by the heat treatment of nitrogenous atmosphere to finish titanium oxynitrides/double-deck making of titanium silicide niobium.In the formed double-decker of said method, be to focus on the metal silicified layer to form a contact hole barrier layer, point take place when avoiding follow-up making connector appear suddenly and resemble, reduce the reliability of assembly.Yet its employed metal silication material is present titanium or cobalt metal, these material material and can't be applicable to very small live width processing procedure, as preceding as described in.
Summary of the invention
In view of this, the metal silication double-decker and forming method thereof that the object of the present invention is to provide a kind of novelty with have double-deck semiconductor device of metal silication and forming method thereof, it is applied to the processing procedure of small live width to replace conventional metals silication single layer structure by the double-decker that forms nickel metal silicified layer/cobalt metal silicified layer.Moreover by the phenomenon that the thick nickel metal silicified layer of lower floor avoids the caused sheet resistor of narrow linewidth effect to raise up, by the thin cobalt metal silicified layer on upper strata, the nickel metal silicified layer of protection lower floor is avoided suffering damage in follow-up fluorine-containing plasma manufacture simultaneously.
According to above-mentioned purpose, the invention provides a kind of metal silication double-decker, it comprises a silicon base and one cobalt/nickel double-level-metal silicide; Cobalt/nickel double-level-metal silicide is arranged on the silicon base; Wherein, the nickel metal silicified layer is positioned at silicon base top, and the cobalt metal silicified layer is positioned at nickel metal silicified layer top, and this cobalt metal silicified layer is thin than this nickel metal silicified layer.
Moreover, the thickness of cobalt metal silicified layer be cobalt/nickel double-level-metal silicide thickness 5%～30%, and be preferably 15%.
Moreover cobalt/nickel double-level-metal silication system forms by simultaneously the cobalt on the silicon base/nickel double-level-metal being implemented a heat treatment.Wherein, the thickness of nickel metal layer is in the scope of 100～200 dusts, and the cobalt metal layer thickness is in the scope of 50～200 dusts.Moreover heat treated temperature is 350～550 ℃ scope, and heat treatment period was 10～60 seconds scope.
According to above-mentioned purpose, the invention provides the double-deck method of a kind of formation metal silication again: at first, provide a silicon base, and on silicon base, deposit to compliance a nickel metal layer and a cobalt metal level in regular turn; Then, silicon base is implemented a heat treatment, to form one cobalt/nickel double-level-metal silicide on silicon base, wherein this cobalt/nickel double-level-metal silicide comprises a nickel metal silicified layer and a cobalt metal silicified layer, and this cobalt metal silicified layer is thin than this nickel metal silicified layer.
Moreover the thickness of nickel metal layer is in the scope of 100～200 dusts, and the cobalt metal layer thickness is in the scope of 50～200 dusts.
Moreover above-mentioned heat treatment is a Rapid Thermal temper.Wherein, the temperature of Rapid Thermal temper is 350～550 ℃ scope, and the time of Rapid Thermal temper was 10～60 seconds scope.
Moreover, the thickness of cobalt metal silicified layer be cobalt/nickel double-level-metal silicide thickness 5%～30%, and be preferably 15%.
Again, according to above-mentioned purpose, the invention provides a kind of double-deck semiconductor device of metal silication that has, it comprises a silicon base and one cobalt/nickel double-level-metal silicide.Silicon base has a grid and source; Cobalt/nickel double-level-metal silicide is arranged on grid and the source/drain regions; Wherein, the nickel metal silicified layer is positioned at grid and source/drain regions top, and the cobalt metal silicified layer is positioned at nickel metal silicified layer top, and this cobalt metal silicified layer is thin than this nickel metal silicified layer.
Moreover, the thickness of cobalt metal silicified layer be cobalt/nickel double-level-metal silicide thickness 5%～30%, and be preferably 15%.
Moreover cobalt/nickel double-level-metal silication system forms by simultaneously the cobalt on the silicon base/nickel double-level-metal being implemented a heat treatment.Wherein, the thickness of nickel metal layer is in the scope of 100～200 dusts, and the cobalt metal layer thickness is in the scope of 50～200 dusts.Moreover heat treated temperature is 350～550 ℃ scope, and heat treatment period was 10～60 seconds scope.
Again, according to above-mentioned purpose, the invention provides the method that a kind of formation has the double-deck semiconductor device of metal silication: at first, provide a silicon base, it has a grid and source, and deposits to compliance a nickel metal layer and a cobalt metal level in regular turn on silicon base; Then, silicon base is implemented a heat treatment, to form one cobalt/nickel double-level-metal silicide on grid and source/drain regions, wherein this cobalt/nickel double-level-metal silicide comprises a nickel metal silicified layer and a cobalt metal silicified layer, and this cobalt metal silicified layer is thin than this nickel metal silicified layer; It more comprises by sulfuric acid and hydrogen peroxide mixed liquor (SPM) removes the cobalt metal level and the nickel metal layer of not silication.
Moreover the thickness of nickel metal layer is in the scope of 100～200 dusts, and the cobalt metal layer thickness is in the scope of 50～200 dusts.
Moreover above-mentioned heat treatment is a Rapid Thermal temper.Wherein, the temperature of Rapid Thermal temper is 350～550 ℃ scope, and the time of Rapid Thermal temper was 10～60 seconds scope.
Moreover, the thickness of cobalt metal silicified layer be cobalt/nickel double-level-metal silicide thickness 5%～30%, and be preferably 15%.
The metal silication double-decker and forming method thereof that the invention provides a kind of novelty with have double-deck semiconductor device of metal silication and forming method thereof, it is applied to the processing procedure of small live width to replace conventional metals silication single layer structure by the double-decker that forms nickel metal silicified layer/cobalt metal silicified layer.Moreover by the phenomenon that the thick nickel metal silicified layer of lower floor avoids the caused sheet resistor of narrow linewidth effect to raise up, by the thin cobalt metal silicified layer on upper strata, the nickel metal silicified layer of protection lower floor is avoided suffering damage in follow-up fluorine-containing plasma manufacture simultaneously.
Description of drawings
Fig. 1 a and Fig. 1 b figure are the double-deck flow process generalized section of formation metal silication on silicon base according to first embodiment of the invention.
Fig. 2 a to Fig. 2 d for having the flow process generalized section of the double-deck semiconductor device of autoregistration metal silication in formation according to second embodiment of the invention.
Description of reference numerals
10,20～silicon base
12,30～nickel metal layer
14,32～cobalt metal level
16,30a, 30b～nickel metal silicified layer
18,32a, 32b～cobalt metal silicified layer
19,33,35～cobalt/nickel double-level-metal silicide
21～source area
22～gate dielectric
23～drain region
24～grid
26～grid gap wall
28～isolation structure
36～dielectric layer
37,39～contact hole
Embodiment
Below cooperate on silicon base the formation metal silication double-deck method of Fig. 1 a to Fig. 1 b explanation first embodiment of the invention.
At first, please refer to Fig. 1 a, provide a silicon base 10, for example a Silicon Wafer.Then, by existing deposition technique, for example physical vapour deposition (PVD) (physical vapor deposition, PVD) or chemical vapour deposition (CVD) (chemical vapor deposition, CVD), on silicon base 10, deposit to compliance a nickel metal layer 12 and a cobalt metal level 14 in regular turn.In the present embodiment, nickel metal layer 12 is to utilize chemical vapour deposition (CVD) to form, and its thickness is in the scope of 100～200 dusts.Moreover cobalt metal level 14 utilizes chemical vapour deposition (CVD) to form equally, and its thickness is in the scope of 50～200 dusts.
Next, as Fig. 1 b, silicon base 10 is implemented a heat treatment, for example use traditional tempering boiler tube (annealing furnace) method or Rapid Thermal temper (rapid thermal annealing, RTA), make nickle atom and cobalt atom in a nickel metal layer 12 and the cobalt metal level 14 diffuse in the silicon base 10, on silicon base 10, to form one cobalt/nickel double-level-metal silicide 19.Herein, cobalt/nickel double-level-metal silicide 19 comprises a nickel metal silicified layer 16, is positioned at silicon base 10 tops, and a cobalt metal silicified layer 18, is positioned at nickel metal silicified layer 16 tops.Moreover, be formed with a cobalt nickel silicide layer (not illustrating) in the interface of nickel metal silicified layer 16 and cobalt metal silicified layer 18.
In the present embodiment, be that silicon base 10 is implemented the Rapid Thermal temper, to form cobalt/nickel double-level-metal silicide 19, wherein, the temperature of Rapid Thermal temper is 350～550 ℃ scope, and the time of Rapid Thermal temper was 10～60 seconds scope.Under this tempered condition, in the cobalt metal silicified layer 18 cobalt silicide (CoSi) and silication two cobalt (Co
2-Si) two-phase coexistent.Therefore, its sheet resistor value is higher, but does not have the phenomenon generation of agglomerateization (agglomeration).
Compared to nickle atom, cobalt atom is difficult for producing bond with fluorine atom.Therefore; the formed cobalt metal silicified layer 18 in nickel metal silicified layer 16 tops can be used as a protective layer; avoid in follow-up fluorine-containing plasma manufacture; fluorine atom directly with nickel metal silicified layer 16 in nickle atom generation bond and produce amorphous phase on its surface, cause the sheet resistor value of nickel metal silicified layer 16 to rise and make the contact resistance increase.
Simultaneously, for the sheet resistor value that makes whole cobalt/nickel double-level-metal silicide 19 reduces, in the present embodiment, the thickness of cobalt metal silicified layer 18 be cobalt/nickel double-level-metal silicide 19 thickness 5%～30%.Preferably, the thickness of cobalt metal silicified layer 18 be cobalt/nickel double-level-metal silicide 19 thickness 15%.
Similarly, please refer to Fig. 1 b, it shows the metal silication double-decker generalized section according to first embodiment of the invention.It comprises a silicon base 10 and one cobalt/nickel double-level-metal silicide 19.Cobalt/nickel double-level-metal silicide 19 is arranged on the silicon base 10.It comprises that a nickel metal silicified layer 16 is positioned at silicon base 10 tops and a cobalt metal silicified layer 18 is positioned at nickel metal silicified layer 16 tops.In the present embodiment, the thickness of cobalt metal silicified layer 18 be cobalt/nickel double-level-metal silicide 19 thickness 5%～30%, and be preferably 15%.
Compared to individual layer titanium, cobalt, the nickel metal silicide of prior art, cobalt of the present invention/nickel double-level-metal silicide, because the temperature of temper is lower than 700 ℃, the cobalt metal silication thin layer that is positioned at the upper strata does not have the phenomenon of agglomerateization.Simultaneously, can protect the nickel metal silicified layer to be subjected to the infringement that fluorine-containing electricity is starched, and the sheet resistor value of cobalt/nickel double-level-metal silicide integral body can not increase too much.That is, possess low contact resistance.Moreover, be positioned at the nickel metal silication thick-layer of lower floor, as described in the prior art, the phenomenon that can avoid the caused sheet resistor of narrow linewidth effect to raise up.
Below cooperate Fig. 2 a to have the method for the double-deck semiconductor device of autoregistration (self-aligned) metal silication in formation to what Fig. 2 d illustrated second embodiment of the invention.
At first, please refer to Fig. 2 a, provide a silicon base 20, for example a Silicon Wafer.The isolation structure 28 that it has an active region and centers on active region, for example fleet plough groove isolation structure.Have the semiconductor assembly in the active region, a MOS transistor for example, it comprises one source pole district 21, a drain region 23 and a grid structure.Herein, grid structure comprises a gate dielectric 22, a grid 24 and a grid gap wall 26.Wherein, the live width of grid 24 can be below 65nm.
Next as Fig. 2 b, by existing deposition technique, for example physical vapor deposition (PVD) or chemical vapor deposition (CVD) deposit to compliance a nickel metal layer 30 and a cobalt metal level 32 in regular turn on source area 21, drain region 23 and the grid structure of isolation structure 28 and active region.In the present embodiment, nickel metal layer 30 is to utilize chemical vapour deposition (CVD) to form, and its thickness is in the scope of 100～200 dusts.Moreover cobalt metal level 32 utilizes chemical vapour deposition (CVD) to form equally, and its thickness is in the scope of 50～200 dusts.
Next, please refer to Fig. 2 c, silicon base among Fig. 2 b 20 is implemented a heat treatment, for example use traditional tempering boiler tube method or Rapid Thermal temper (RTA), make the grid 24 of source area 21 that nickle atom in a nickel metal layer 30 and the cobalt metal level 32 and cobalt atom diffuse to active region, drain region 23 and grid structure, to form cobalts/nickel double-level-metal silicides 33 and on grid 24, to form cobalt/nickel double-level-metal silicide 35 in source area 21, drain region 23.Herein, cobalt/nickel double-level-metal silicide 33 comprises a nickel metal silicified layer 30b, is positioned at source area 21 and 23 tops, drain region, and a cobalt metal silicified layer 32b, is positioned at nickel metal silicified layer 30b top.Similarly, cobalt/nickel double-level-metal silicide 35 comprises a nickel metal silicified layer 30a, is positioned at source grid 24 tops, and a cobalt metal silicified layer 32a, is positioned at nickel metal silicified layer 30a top.Moreover, be formed with a cobalt nickel silicide layer (not illustrating) in the interface of nickel metal silicified layer 30a and 30b and cobalt metal silicified layer 32a and 32b.Thus, just finish the double-deck semiconductor device of autoregistration metal silication that has of the present invention.
In the present embodiment, be that silicon base 20 is implemented the Rapid Thermal temper, to form cobalt/nickel double-level- metal silicide 33 and 35, wherein, the temperature of Rapid Thermal temper is 350～550 ℃ scope, and the time of Rapid Thermal temper was 10～60 seconds scope.As described in first embodiment, under this tempered condition, the sheet resistor value of cobalt metal silicified layer 18 is higher, but does not have the phenomenon generation of agglomerateization.
Then, by electric paste etching or suitable not the cobalt metal level 32 and the nickel metal layer 30 of silication of solution selective removal isolation structure 28 and grid gap wall 26 tops.In the present embodiment, be to utilize sulfuric acid and hydrogen peroxide mixed liquor (SPM) to remove cobalt metal level 32 and this nickel metal layer 30.
At last, please refer to Fig. 2 d, form a dielectric layer 36 above the silicon base 20 in Fig. 2 c, its material can be: electric slurry oxide silicon, low-k spin-on glasses (SOG), tetraethoxy silex glass (TEOSoxide), phosphorus doping silica, fluorine silex glass (FSG), phosphorosilicate glass (PSG), long-pending undoped silicon glass (HDP-USG), the long-pending silica (HDP-SiO in high-density electric slurry institute Shen in high-density electric slurry institute Shen
2), the long-pending silica in long-pending method (SACVD) institute in inferior pressure chemical gaseous phase Shen Shen and with ozone-tetraethoxysilane (O
3-TEOs) the long-pending silica in institute Shen etc.Then, by existing electric paste etching processing procedure, form in the dielectric layer 36 above source area 21 and drain region 23 in contact hole 37 and the dielectric layer 36 above grid 24 and form contact hole 39 to expose cobalt/nickel double-level- metal silicide 33 and 35.
Since in the electric paste etching processing procedure if contain fluorine, its easily with nickel metal silicified layer 30a and 30b in nickle atom generation bond and its sheet resistor value is risen, the increase contact resistance, as discussed previously.Therefore, nickel metal silication 30a and the 30b formed cobalt metal silicified layer 32a in top and 32b can be used as a protective layer, avoid increasing contact resistance.
Similarly, as described in first embodiment, for the sheet resistor value that makes whole cobalt/nickel double-level- metal silicide 33 and 35 reduces, the thickness of cobalt metal silicified layer 32a and 32b be cobalt/nickel double-level-metal silicide 19 thickness 5%～30%, and be preferably 15%.
Please refer to Fig. 2 c, it shows has a double-deck semiconductor device generalized section of metal silication according to second embodiment of the invention.This semiconductor device comprises a silicon base 20 and cobalt/nickel double-level-metal silicide 33 and 35.Silicon base, a Silicon Wafer for example, it has an active region and around the isolation structure 28 of active region, for example fleet plough groove isolation structure.Have the semiconductor assembly in the active region, a M0S transistor for example, it comprises one source pole district 21, a drain region 23 and a grid structure.Herein, grid structure comprises a gate dielectric 22, a grid 24 and a grid gap wall 26.Cobalt/nickel double-level- metal silicide 35 and 33 is arranged at respectively on grid 24 and source area 21/ drain region 23.Wherein, nickel metal silicified layer 30b and 30a lay respectively at grid 24 and 23 tops, source area 21/ drain region, and cobalt metal silicified layer 32b and 32a then lay respectively at nickel metal silicified layer 30b and 30a top.Herein, the thickness of cobalt metal silicified layer 32b and 32a be respectively cobalt/nickel double-level- metal silicide 33 and 35 thickness 5%～30%, and be preferably 15%.
As described in first embodiment, in cobalt of the present invention/nickel double-level-metal silicide, the cobalt metal silication thin layer that is positioned at the upper strata does not have the phenomenon of agglomerateization.Simultaneously, can protect the nickel metal silicified layer to be subjected to the infringement of fluorine-containing electricity slurry, and possess low contact resistance.Moreover, be positioned at the nickel metal silication thick-layer of lower floor, the phenomenon that can avoid the caused sheet resistor of narrow linewidth effect to raise up.Therefore, can be applicable to the processing procedure of very small live width.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limiting the present invention, anyly has the knack of this skill person, without departing from the spirit and scope of the present invention; when can doing to change and retouching, so protection scope of the present invention is as the criterion when looking accompanying the claim person of defining.
Claims (34)
1. metal silication double-decker comprises:
One silicon base; And
One cobalt/nickel double-level-metal silicide is arranged on this silicon base, and wherein this cobalt/nickel double-level-metal silicide comprises a nickel metal silicified layer, be positioned at this silicon base top, and a cobalt metal silicified layer, be positioned at this nickel metal silicified layer top, and this cobalt metal silicified layer is thin than this nickel metal silicified layer.
2. metal silication double-decker as claimed in claim 1, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 5%～30%.
3. metal silication double-decker as claimed in claim 1, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 15%.
4. metal silication double-decker as claimed in claim 1, wherein this cobalt/nickel double-level-metal silication system forms by simultaneously the nickel on this silicon base/cobalt double-level-metal being implemented a heat treatment.
5. metal silication double-decker as claimed in claim 4, wherein the thickness of this nickel metal layer is in the scope of 100～200 dusts.
6. metal silication double-decker as claimed in claim 4, wherein this cobalt metal layer thickness is in the scope of 50～200 dusts.
7. metal silication double-decker as claimed in claim 4, wherein this heat treated temperature is 350～550 ℃ scope.
8. metal silication double-decker as claimed in claim 4, wherein this heat treatment period was 10～60 seconds scope.
9. one kind forms the double-deck method of metal silication, comprises the following steps:
One silicon base is provided;
Compliance ground deposits a nickel metal layer and a cobalt metal level in regular turn on this silicon base; And
This silicon base is implemented a heat treatment, and to form one cobalt/nickel double-level-metal silicide on this silicon base, wherein this cobalt/nickel double-level-metal silicide comprises a nickel metal silicified layer and a cobalt metal silicified layer, and this cobalt metal silicified layer is thin than this nickel metal silicified layer.
10. the double-deck method of formation metal silication as claimed in claim 9, wherein the thickness of this nickel metal layer is in the scope of 100～200 dusts.
11. the double-deck method of formation metal silication as claimed in claim 9, wherein this cobalt metal layer thickness is in the scope of 50～200 dusts.
12. the double-deck method of formation metal silication as claimed in claim 9, wherein this heat treatment is a Rapid Thermal temper.
13. the double-deck method of formation metal silication as claimed in claim 12, wherein the temperature of this Rapid Thermal temper is 350～550 ℃ scope.
14. the double-deck method of formation metal silication as claimed in claim 12, wherein the time of this Rapid Thermal temper was 10～60 seconds scope.
15. the double-deck method of formation metal silication as claimed in claim 9, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 5%～30%.
16. the double-deck method of formation metal silication as claimed in claim 9, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 15%.
17. one kind has the double-deck semiconductor device of metal silication, comprising:
One silicon base, it has a grid and source; And
One cobalt/nickel double-level-metal silicide, be arranged on this grid and this source/drain regions, wherein this cobalt/nickel double-level-metal silicide comprises a nickel metal silicified layer, be positioned at this grid and this source/drain regions top, an and cobalt metal silicified layer, be positioned at this nickel metal silicified layer top, and this cobalt metal silicified layer is thin than this nickel metal silicified layer.
18. as claimed in claim 17 have a double-deck semiconductor device of metal silication, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 5%～30%.
19. as claimed in claim 17 have a double-deck semiconductor device of metal silication, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 15%.
20. as claimed in claim 17 have a double-deck semiconductor device of metal silication, wherein this cobalt/nickel double-level-metal silication system forms by simultaneously the nickel on this silicon base/cobalt double-level-metal being implemented a heat treatment.
21. as claimed in claim 20 have a double-deck semiconductor device of metal silication, wherein the thickness of this nickel metal layer is in the scope of 100～200 dusts.
22. as claimed in claim 20 have a double-deck semiconductor device of metal silication, wherein this cobalt metal layer thickness is in the scope of 50～200 dusts.
23. as claimed in claim 20 have a double-deck semiconductor device of metal silication, wherein this heat treated temperature is 350～550 ℃ scope.
24. as claimed in claim 20 have a double-deck semiconductor device of metal silication, wherein this heat treatment period was 10～60 seconds scope.
25. a formation has the method for the double-deck semiconductor device of metal silication, comprises the following steps:
One silicon base is provided, and it has a grid and source;
Compliance ground deposits a nickel metal layer and a cobalt metal level in regular turn on this silicon base; And
This silicon base is implemented a heat treatment, on this grid and this source/drain regions, to form one cobalt/nickel double-level-metal silicide, wherein this cobalt/nickel double-level-metal silicide comprises a nickel metal silicified layer and a cobalt metal silicified layer, and this cobalt metal silicified layer is thin than this nickel metal silicified layer.
26. formation as claimed in claim 25 has the method for the double-deck semiconductor device of metal silication, more comprises this cobalt metal level and this nickel metal layer of removing not silication.
27. formation as claimed in claim 26 has the method for the double-deck semiconductor device of metal silication, wherein removes this cobalt metal level and this nickel metal layer by sulfuric acid and hydrogen peroxide mixed liquor (SPM).
28. formation as claimed in claim 25 has the method for the double-deck semiconductor device of metal silication, wherein the thickness of this nickel metal layer is in the scope of 100～200 dusts.
29. formation as claimed in claim 25 has the method for the double-deck semiconductor device of metal silication, wherein this cobalt metal layer thickness is in the scope of 50～200 dusts.
30. formation as claimed in claim 25 has the method for the double-deck semiconductor device of metal silication, wherein this heat treatment is a Rapid Thermal temper.
31. formation as claimed in claim 30 has the method for the double-deck semiconductor device of metal silication, wherein the temperature of this Rapid Thermal temper is 350～550 ℃ scope.
32. formation as claimed in claim 30 has the method for the double-deck semiconductor device of metal silication, wherein the time of this Rapid Thermal temper was 10～60 seconds scope.
33. formation as claimed in claim 25 has the method for the double-deck semiconductor device of metal silication, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 5%～30%.
34. formation as claimed in claim 25 has the method for the double-deck semiconductor device of metal silication, wherein the thickness of this cobalt metal silicified layer be this cobalt/nickel double-level-metal silicide thickness 15%.
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