CN1284254A - Method and appts for switching data between bitstreams of circuit switched time division multiplexed network - Google Patents
Method and appts for switching data between bitstreams of circuit switched time division multiplexed network Download PDFInfo
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Abstract
The present invention relates to a method, an apparatus and a switch for switching data transferred in circuit switched channels between at least three unidirectional multi-channel time division multiplexed bitstreams that are accessed at respective ports of a switch. According to the invention, data is transferred between said ports in circuit switched channels of a switch internal unidirectional multi-channel time division multiplexed bitstream that is accessed by said ports.
Description
Invention field
The present invention relates to a kind of method, a kind of equipment and a kind of switch, be used for exchanging the data that the circuit-switched channel between at least three unidirectional multichannel time division multiplexing bit streams is transmitted, these bit streams are conducted interviews by the corresponding port of switch.
Technical background and prior art
Now developing multiple novel circuit-switched communications net, using synchronous or accurate synchronous time division multiplexing bit stream to carry out message transmission, wherein bit stream is divided into a plurality of cycles, and each cycle is divided into a plurality of time slots respectively.
An example of this network is DTM (dynamic synchronous transfer mode) network, described at article " the DTM gigabit is than network (the DTM Gigabit Network) ", the author ChristerBohm of article etc., be published in Journal of High Speed Networks, the 3rd the 2nd phase of volume, the 109-126 page or leaf, 1994.
The basic topological structure of this type network is preferably a bus of two unidirectional multiple destination optical cables, connects a plurality of network nodes.Yet be noted that this topological form also can be realized by the structure of any other type, for example ring type structure or hub architecture.
The bandwidth of each wavelength on the bus, i.e. each bit stream on every optical fiber be divided into a plurality of cycles of fixed rate, and the cycle is divided into the time slot of fixed size respectively.Therefore, the number of time slot in the one-period depends on the bit rate of network.Time slot is divided into two classes, control time slot and data slot.The control time slot is used for command transmitting information between described node, is used for the built-in function of network.Data slot is used for transmitting data being connected between the described user of different nodes.
Each node is set to, and when receiving information from other node or sending information for other node, gives its corresponding terminal use's dynamic assignment time slot.Consequently, different terminal uses have the write access authority to different data slots.Just can set up many rate circuit exchange channels in this way in a bit stream, each channel is by one group within every frame of bit stream corresponding one or more time slot position definition.
In such network, so-called switch is used for the interchannel swap data at different bit streams.In people's such as the Christer Bohm that mentions in the above the article " the DTM gigabit is than network ", switch in the DTM network has been described, wherein use the parallel ring bus of exchange internal time slot formula, swap data between the port of switch, this switch provide a time slot to each to adjacent port on bus.This advantage of transmitting the solution of data between the port of switch is the ring-like bus design of this time slot formula described above and simple to operate.Yet this prior art problems is, for fear of congested, need carry out the excess design to the capacity of the ring-like bus in inside with respect to the bandwidth of external bit stream, particularly causes the problem of high flow capacity.Another problem is that the control to internal bus resources is very limited, can increase temporary transient congested danger, perhaps produces losing of data because of not adapting to the flow that external bit flows.
Goal of the invention
Therefore, an object of the present invention is to propose a kind of switch, it can improve the control ability of exchange capacity, also can increase the possibility of time-division and empty divided data exchange, divides many orders to broadcast as the effective empty of multi-rate channel.
Another object of the present invention is, proposes simply a kind of and mechanism fast, is used for exchanging between a plurality of inputs and a plurality of output bit flow.
The invention summary
Purpose recited above can realize by defined method and apparatus in the appended claim.
According to the present invention, the data of transmitting in the circuit-switched channel exchange between at least three unidirectional multichannel time division multiplexing bit streams, these bit streams are by the circuit-switched channel of a unidirectional multichannel time division multiplexing bit stream in exchange inside by described port access, are conducted interviews by the corresponding port of a switch.
Therefore idea behind the present invention is, uses internal bit stream to carry out transfer of data between the port of switch, and this bit stream and carry out employed bit stream in the transfer of data between the node of network around has similar characteristic.Owing to use channel foundation, modification and end that the present invention is undertaken by the transfer of data of switch, with channel foundation, modification and end operation in network internal, adopt similar mode, so compared with prior art, the control of exchange resource is significantly improved.
Thereby according to one embodiment of present invention, the channel allocation in described exchange internal bit stream is based on the variation of channel allocation of described two or more bit streams and dynamic adjustments.For example, the channel allocation in the internal bit stream also can be regulated the requirement of exchange capacity based on each channel.
Therefore, the present invention can provide the characteristics that have very much advantage to be, can dynamically change the exchange capacity by the different switching paths of switch along with the change that exchange capacity is required, and promptly distributes to the switching bandwidth of switch different port.
The corresponding relation and the similitude of the transfer of data of this by setting up " outside " (with respect to switch) network and " inside " can be so that switch speed be faster, and compatibility is stronger.
The frame rate of internal bit stream or cycle rate are preferably synchronous with the frame rate of network, or the multiple of network frame rate, thereby can compatible outside network, and simplify the transmission of the circuit-switched channel of passing through switch.
For the simultaneous operation of switch with respect to internal bit stream, different input/output end ports can have in various degree the degree of freedom with respect to internal bit stream.According to a kind of scheme, each port is similar to node in the DTM class network with respect to the class of operation of internal bit stream, promptly each port oneself internally bit stream obtain bit clock, detect the beginning of frame and time slot counted.According to another kind of scheme, the bit clock of internal bit stream is assigned to the different port (mark 150 among the figure that will describe below for example being similar to) of switch by centralized control unit, and with respect to internal bit stream, the beginning of detection frame, the counting of time slot and other characteristic are still handled at each port.According to another kind of scheme, bit clock speed and time slot counting (thereby comprising that also frame begins) are all concentrated distribution by for example described control unit.Under latter event, the time slot counting can carry out separately each port, and at a time promptly, the time slot of second port counting is one (1), and the time slot of first port counting is two (2); Perhaps the time slot counting to all of the port is identical, and at a time promptly, the counting of second port is one (1), and the counting of first port also is one (1).(under latter event, specific time slot counting will be corresponding to the different time-gap position of different port actual frame.) consequently, the time slot mapping table of switch ports themselves must correspondingly be controlled when channel initialization.
If use the internal bit stream that does not have end caps, promptly form the bit stream of a closed loop at intranodal, if the timeslot number (for example a frame comprises 4000 time slots) of a frame, will have problems when loop transmits all required time time slot corresponding numbers (for example a transmission time in week is only corresponding to 3000 time slots) greater than a time slot.In this case, on loop, have at least a position that discovery is had a port or similar unit, when sending the 3000th time slot of 4000 time slot one frames, the 1st time slot that has sent when having received beginning.
Two kinds of good methods have been addressed this problem.A kind of method is buffering that 1000 time slots are provided in described unit (promptly when sending 3001-4000 time slot, in by described unit 1-1000 time slot being delayed, or the like).This is a kind of simple method, unfortunately, has produced unnecessary time-delay by switch.And need to use a frame buffer, be used for shining upon time slot to arbitrarily effective time slot (if any).
According to another kind of method, when setting up channel in the segmentation of the medium of the transmission bit stream that is comprising described unit, a time slot allocation of frame is to a side of described unit, and another time slot allocation of frame is to the opposite side of described unit.According to situation discussed above, if set up a channel, receiver side in described unit is a time slot 1, and the transmitter side in described unit is a time slot 3001, then the time slot data of time slot 1 can be simply directly be transferred to the time slot 3001 of transmission from the time slot one (1) that receives by described unit, rather than need carry out during centre delay.Certainly, make the described time slot position that does not need to reuse other segmentation upper signal channel in this way.Only transmitting a time slot data slice in every frame just needs to use two time slots, rather than a time slot, and this is unnecessary, thereby this method is preferably used with the time slot repeated use scheme that further describes below.
Because at least three ports can be visited same internal bit stream, thereby can obtain optional space many orders broadcast characteristic naturally.As everyone knows, the different output ports that can control switch are the different time-gap of bit stream internally, or the identical time slot of bit stream internally, or in their combination, reads the time slot data, thereby the degree of freedom of exchange is provided.The time slot that receives is to carry out many order broadcasting, broadcasting or point-to-point transmission between different output ports, depends on the time slot mapping instruction of controlling switch ports themselves.Similarly, the exchange of time-domain and spatial domain also can easily realize by the time slot control command of control port.
As everyone knows, the many order broadcasting in space according to the present invention, i.e. time slot exchanges data from least one input port at least two output ports, may relate to the selection of the different single output port that is used for different input time slots, be used for the selection more than an output port of an input time slot, and the selection (broadcasting) that is used for all output ports of described input time slot.
The best way is, provide control device at each input port, each time slot to the one-period of input port corresponding bit stream, whether control is written to described internal bit stream with time slot data thus, if need write, then control which time slot that described time slot data is written to internal bit stream.
Similarly, provide control device at each output port, to each time slot of described internal bit stream, whether control is written to corresponding output bit flow with time slot data thus, if need write, then control which time slot that described time slot data is written to corresponding output bit flow.
As everyone knows, number to the input and output port that is connected to described internal bit stream is hard-core, and each output port also can be used as input port, each input port also can be used as output port, thereby can provide two-way function at each port.
In an optional embodiment, switch comprises more than one internal bit stream, one group of two or more parallel bits stream for example, wherein the port of switch can with described bit stream whole, partly or only a bit stream links to each other.
Similarly in another embodiment, time slot allocation in described internal bit stream can be divided into segmentation, particular time-slot can be used for the communication between first group of port of first of a bit stream transmission medium then, and is used for the communication between another group port of another part of described bit stream transmission medium.Thereby utilized the bit stream bandwidth better.
According to an embodiment, a time slot position in each cycle of described at least one bit stream, comprise the data that need send to described internal bit stream, or the data that receive from described internal bit stream, clearly with each cycle of described shared bits stream in corresponding time slot position connect, described data will send to the there, or receive therefrom.In such embodiments, the mapping of a unique time slot to time slot will be arranged, will need minimum decision-making in case set up this mapping to described time slot.
According to another available embodiment, when a channel by the set of time-slot location definition in each cycle of described at least one bit stream, and corresponding channel is during by one group of time slot corresponding location definition in each cycle of described internal bit stream, the data that any time slot position from described that group time slot position of described at least one bit stream comes, be mapped to the arbitrary time slot position in described that group time slot position of described internal bit stream, or come from the mapping of above-mentioned time slot position, and keep data from described at least one bit stream, to receive simultaneously, or send in described at least one bit stream at the relative position of described that group in time slot, use the time slot relation of this different bit streams based on channel, and do not use strict time slot to be to the advantage of time slot relation, the timing requirement between input and output link/bit stream can be reduced, which specific output time solt will be mapped to because can't determine which particular time-slot in advance.And generation solution finish by channel identification in conjunction with output port, the advantage of doing like this is, between the bit stream of the bit stream of input port and output port, do not need strict timing, but the phase place phase shift at random of other bit stream relatively of one phase place in a plurality of bit stream.Best is, selects next available time slot, and wherein advantage is to wait until the particular time-slot of second bit stream, the substitute is, and data map directly to first time slot that channel can be used, and this time slot is not also inserted the data that will exchange.And, described data are written to a plurality of time slots of described second group of time slot from a plurality of time slots of described first group of time slot, preferably finish with the order that replaces.Needed in these yes many application, when using in this case, switch must can satisfy this requirement.
As everyone knows, term internal bit stream is not to mean, internal bit stream or its corresponding bit stream transmission medium must be physically located at the inside of exchanger circuit or similarly, also can be set to the peripheral hardware of circuit, but still can be used for the transfer of data between the switch different port.
The present invention has superiority in the DTM network especially.But, the invention is not restricted to the DTM network, also can be used for any synchronizing network.Data are wherein transmitted in the circuit-switched channel of unidirectional multichannel time division multiplexing bit stream.
The application is corresponding to one in three Swedish patent application, SE9704738, SE9704739 and SE9704740-1, and these applications are in filing on the same day, and relate to relevant invention thought, this description reference that is cited.
To the embodiment of example and the description of claims, above-mentioned and further feature of the present invention and characteristics will obtain understanding more completely by following.
Brief description of drawings
Embodiment to example of the present invention is described below with reference to appended accompanying drawing, wherein:
Fig. 1 schematically shows the structure of time division multiplexing bit stream;
Fig. 2 schematically shows a switch according to an embodiment of the invention;
Fig. 3 schematically shows an input port of the switch that shows among Fig. 2;
Fig. 4 schematically shows an output port of the switch that shows among Fig. 2;
Fig. 5 a, 5b and 5c represent three additional embodiments according to switch of the present invention.
The detailed description of preferred embodiment
The structure of the unidirectional multichannel time division multiplexing bit stream of circuit switching DTM network will be described with reference to figure 1 below, preferably includes switch of the present invention in the DTM network.As shown in Figure 1, bit stream is divided into the cycle of fixed rate, as 125 μ s cycles, is also referred to as frame.Each cycle is divided into the time slot of fixed size as 64 bits again respectively.Timeslot number in every frame depends on the bit rate of network.Certainly, the time-gap number 1-6 shown in the cycle of the bit stream among Fig. 1 only is exemplary.
Time slot is divided into two classes, control time slot C and data slot D.Control time slot C is used for the signaling between the Control Network node.Data slot D is used for transport payload data between described node.
Except described control time slot and data slot, also comprise one or more synchronization slot S in each cycle, be used for of the simultaneous operation of each node with respect to each cycle.And, can be not overlapping in order to ensure the timeslot number in the one-period with next cycle, after last time slot of the ending in each cycle, also increased a protection bandwidth G.As shown in Figure 2, the cycle of bit stream is to repeat continuously.
Each node that is connected to bit stream can be visited the data slot of at least one control time slot and number could vary.Each node communicates by other node in its control time slot and the network, and data channel is the data slot that distributes some by a node in respective channel, and one group of one or more time slot position of formation are set up in each cycle.Distribute to the data slot number of each node and each channel, depend on the transmission capacity that the respective nodes processing channel is required.If a channel needs bigger transmission capacity, node will distribute the more data time slot for this purpose, and on the contrary, if only need less transmission capacity i in a particular channel, node can limit the number that is assigned to data slot herein.Time slot allocation and data slot to different nodes distribute, and can dynamically regulate along with the variation of offered load.
For data any from bit stream 112 and 122 being exchanged in bit stream 132 and 142 one or both, set up circuit-switched channel on port one 10 and 120 will be in switch 100 the unidirectional bit stream 162 that for example shares an inside on parallel TDM bus 161.Internal bit stream 162 is conducted interviews by whole four ports, thereby is multiple access.Similar with exchange external bit stream, internal bit stream 162 also is divided into a plurality of cycles, and each cycle is divided into time slot again respectively.
When setting up, channel determines that such as supposition first time slot in each cycle of bit stream 112 is used for the time slot position 7 that transmission information arrives each cycle of bit stream 132, and the time slot position 9 that is transferred to each cycle of bit stream 142.A channel comprises a time slot (supposition internal bit stream has identical frame rate with external bit stream) in each cycle of internal bit stream, for example is the 10th time slot, will be allocated for this purpose.Correspondingly, port one 10 is with data the 10th time slot in each cycle of stream 162 from first slot transmission in each cycle of bit stream 112 to internal bit.Correspondingly, port one 30 with data internally the time slot position 10 in each cycle of bit stream 162 read, with described transfer of data to the 7th time slot of bit stream 132.Similarly, port one 40 with data internally the 10th time slot in each cycle of bit stream 162 read, described data are sent to the 9th time slot of bit stream 142.
Time slot allocation/cancellation the function of the management of channel and internal bit stream is by controller 170 controls.For the time slot mapping instruction is provided to port, controller uses special-purpose communication link (shown in the dotted line among Fig. 2), or uses the control time slot of internal bit stream 162, communicates with port.And in the embodiment of example, controller 170 is by internal bit stream 162 other node communication with network.(still, in optional embodiment, port itself can be configured such that with the control time slot of bit stream 162 gets in touch with channel and time slot allocation.)
In Fig. 2, the frame rate of internal bit stream 162 or cycle rate are by 190 controls of frame synchronization unit, and frame synchronization unit 190 is set to the frame rate of internal bit stream 162 is the frame rate of network synchronously, uses bit stream 112 in this case as a reference.And the integral multiple of network frame rate also can be used for internal bit stream.As everyone knows, in optional embodiment, one in the medium access unit can provide the frame synchronization characteristic, as Fig. 5 a, as described in the 5b, 5c.
In the embodiment of Fig. 2, except controller 170 uses the exception of controlling time slot or data slot, telephone net node processing controls time slot and data slot are without any difference.Corresponding with the exchange instruction that controller 170 provides, as long as relate to switch, control time slot and data slot all are provided for the data that exchange.
Below with reference to the input port of Fig. 3 to switch 100, more properly be the port one 10 that links to each other with bit stream 112 among Fig. 2, be described in detail, the input port that links to each other with bit stream 122 has similar structure.Fig. 3 represents the part of the switch 100 that links to each other with the optical fiber 111 of transmission bit stream 112.To the port one 10 that the time slot of bit stream 112 has the read access authority, comprise 115, one the bit clock (not shown) in a medium access unit, a time slot counter 116 and a frame clock (not shown).Bit clock is synchronized with the bit rate of bit stream 112, and is used as the input of time slot counter 116.The time slot position of 116 pairs of optical fiber of time slot counter, 111 transmission is counted, and in the zero hour in each new cycle, is restarted by frame clock cycle property ground.
During channel initialization, controller 170 with information stores in time slot mapping table 117.Each time slot position in the one-period of bit stream 112 all has the input item of a correspondence in described table 117, and each input item of representing a time slot carrying will be by the data of switch exchange, the information that is used for identification time slot position on described internal bit stream 162 is provided, and the time slot data will be delivered to this time slot position.The counting of time slot counter 116 is used for the input item of time slot mapping table 117 is addressed.
For example read time slot position 3 when addressed location 115 in each cycle of bit stream 112, time slot counter 116 will be visited the 3rd input item of time slot mapping table 117.In this input item, positional information is expressed as the 10th position herein, stores by controller 170 when channel initialization.When visiting this 3rd input item, will export the tenth position, be used to control the time slot 10 that the data that read from the time slot 3 of bit stream 112 are written to internal bit stream 162.In visit during next input item, promptly during the 4th of bit stream 112 the time slot, there is not assigned timeslot in the time slot mapping table 117, therefore, the data of the time slot 4 of bit stream 112 will can not be transferred to internal bit stream 162.
Below with reference to Fig. 4 the output port 130 of switch 100 is described in detail.The port that links to each other with bit stream 142 has similar structure.
During channel initialization, controller 170 with information stores in time slot mapping table 137.Each time slot position in the one-period of internal bit stream 162 all has the input item of a correspondence in described table 137, and each input item of representing a time slot position is being carried the data that will exchange to bit stream 132, the information that is used for identification time slot position on described bit stream 132 is provided in table 137, and the time slot data will be delivered to this time slot position.The counting of first time slot counter 136 keeps and follows the tracks of the time slot position that passes through on the internal bit stream 162, is used for the input item of time slot mapping table 137 is addressed.
For example when each cycle of bit stream 162 is read time slot position 10 internally, first time slot counter 136 will be visited the 10th input item of time slot mapping table 137.In this input item, positional information is expressed as the 22nd position herein, stores by controller 170 when channel initialization.When visiting this 10th input item, will export the 22nd position, be used to control the time slot position 22 that data that the time slot 10 of bit stream 162 internally reads are written to output frame buffer 138.In visit the 14th input item for example, promptly during the 14th of bit stream 162 the time slot, there is not assigned timeslot in the time slot mapping table 137, therefore, the data of the time slot 14 of bit stream 162 will can not be written to frame buffer 138.
Port one 30 further comprises 135, one the bit clock (not shown) in a medium access unit, one second time slot counter (not shown) and a frame clock (not shown).Bit clock is synchronized to the bit rate of bit stream 132, and is used as the input of second time slot counter.Second time slot counter is counted the timeslot number of optical fiber 131 transmission, when each new cycle begins, is restarted by frame clock cycle property ground.The counting of second counter is used for the input item of frame buffer 138 is addressed.The transfer of data of storing in described frame buffer zone in specific input item arrives visit unit 135, addressed location 135 writes data into a time slot then, this time slot have corresponding to frame buffer 138 input items the one-period of bit stream 132 in a time slot position.
Below with reference to Fig. 5 a, 5b, the switch embodiment shown in the 5c further illustrates characteristics of the present invention.
According to one embodiment of present invention, the time slot of the internal bit of switch 10 stream is dispensed on the different port in the different segmentations of bit stream transmission medium among Fig. 5 a.For example, as the dotted line among Fig. 5 a schematically shows, a time slot of inner shared bits stream, suppose the time slot 4 in each cycle herein of saying so, be allocated for optional one or more port ones 5,16 and 17 transmission time slot data in the segmentation from port one 1 to the bit stream transmission medium, but be allocated for optional one or more port ones 2,13 and 14 in another segmentation from port one 8 to the bit stream transmission medium (dotted line right-hand) transmission time slot data, thereby can utilize the bandwidth of bit stream better.
In Fig. 5 b,, provide two inner shared bits streams in the switch 20 according to an embodiment provided by the invention.Whole eight port 21-28 of switch 20 have access rights to two bit streams, and two bit streams are by opposite direction transmission, shown in the arrow among Fig. 5 b.Consequently, when a port from switch 20, for example port 27, to another port, when for example port 25 sends data, then can be to having the time slot of short transmission distance between two ports of bit flow distribution, thereby quick exchange can be provided, simultaneously again can be effectively to the time slot segment assignments.
According to another embodiment of the invention, description with reference to figure 5c, in switch 30, two parallel internal bit streams are provided, article two, bit stream is by identical direction transmission, wherein the port of switch is according to the needs of exchange capacity, selectively with two parallel bits streams in one or more linking to each other.This embodiment can be used for the transmission time slot data as an example, and these data are that a bit stream in described two or more bit streams receives as serial data in the mode of time slot, and these serial datas are the part in the parallel data at least.For example, if a time slot of an external bit stream comprises 64 serial data, this time slot can transmit at 64 parallel bits of the inner use of described switch, promptly uses a bit of 64 each bit streams in the parallel internal bit stream; Or use 8 parallel groups, every group of 8 serial data, 8 serial data of each bit stream during promptly 8 parallel internal bit flow.
As everyone knows, as Fig. 5 a, 5b and the described a plurality of embodiment of 5c, and the embodiment described in Fig. 2,3 and 4, can combine alternatively, realize providing best swap operation according to real network.
Although the embodiment of reference example is described the present invention, can make different corrections and combination within the scope of the present invention, scope of the present invention defines in the appended claims.
For example, in embodiment described above, every bit stream is expressed as to be uploaded defeated at corresponding optical fiber with reference to appended accompanying drawing.Yet, in order to improve network capacity, not only can use time division multiplexing mode, also can use wavelength division multiplexing, promptly use different wavelength on an optical fiber, to transmit more than a bit stream.And, switch operation and synchronous control, the interface between for example externally bit stream and one or more internal bit flow, other the different accomplished in many ways of method that can use and obviously describe herein.
Claims (23)
1. method that the data of transmitting in the circuit-switched channel between at least three unidirectional multichannel time division multiplexing bit streams exchange, these bit streams conduct interviews by the corresponding port of switch, and this method may further comprise the steps:
The described data of transmission between the described port in the circuit-switched channel of the inner unidirectional multichannel time division multiplexing bit stream of exchange, described bit stream is conducted interviews by described port.
2. the method for claim 1, in wherein said at least three bit streams one, and described exchange internal bit stream be divided into a plurality of cycles, and the cycle are divided into a plurality of time slots respectively.
3. method as claimed in claim 1 or 2 comprises, based on the variation of channel allocation in described two or more bit streams, dynamically is adjusted in the channel allocation on the described exchange internal bit stream.
4. as claim 1,2 or 3 described methods, comprise step: a channel that uses described exchange internal bit stream, a channel with first bit stream of data from described at least three bit streams, exchange in the channel of second bit stream in described at least three bit streams, and exchange in the channel of the 3rd bit stream in described at least three bit streams.
5. as any the described method in the above-mentioned claim, comprise step: the frame rate that the frame rate of described internal bit stream is synchronized to the one or more bit streams in described at least three bit streams.
6. as any the described method in the above-mentioned claim, transmit between the described port of wherein said data in the circuit-switched channel of the unidirectional multichannel time division multiplexing of two or more inner exchanging bit stream, these bit streams are conducted interviews by described port.
7. method as claimed in claim 6, comprise step: use described two or more exchange internal bit stream, the data that receive as a time slot of serial data in will a bit stream in described at least three bit streams send as a time slot in the part parallel data at least.
8. an equipment is used for the data that circuit-switched channel is transmitted between at least three unidirectional multichannel time division multiplexing bit streams and exchanges, and described bit stream is conducted interviews by the corresponding port of described equipment, and this equipment comprises:
A shared medium is used for the described data of transmission between the described port of the circuit-switched channel of inside unidirectional multichannel time division multiplexing bit stream, and this bit stream transmits in described shared medium, and is conducted interviews by described port.
9. equipment as claimed in claim 8, each bit stream in wherein said at least three bit streams, and described exchange internal bit stream be divided into a plurality of cycles, and the cycle are divided into a plurality of time slots respectively.
10. equipment as claimed in claim 8 or 9 comprises the control device that is used for the distribution of control channel on described internal bit stream.
11. equipment as claimed in claim 10, wherein said control device is set to, and based on the variation in described at least three bit stream channel allocations, dynamically is adjusted in the channel allocation on the described exchange internal bit stream.
12. as any the described equipment among the claim 8-11, wherein, a channel on the described internal bit stream, be used for a channel on first bit stream from described at least three bit streams, with a channel on second bit stream of exchanges data to described at least three bit streams, and a channel on the 3rd bit stream on described at least three bit streams.
13. any the described equipment as among the claim 8-12 comprises:, be synchronized to the device of the frame rate of the one or more bit streams on described at least three bit streams with the frame rate of described internal bit stream.
14. as any the described equipment among the claim 8-13, comprise: the mapping device that is used to control, to each time slot position in the one-period of at least one bit stream on described at least three bit streams, the data whether control will be transmitted herein are written to described internal bit stream, if will write, control is written to described data which time slot position of internal bit stream.
15. equipment as claimed in claim 14, wherein said mapping device is set to, clearly with a particular time-slot position in each cycle in described at least one bit stream, this bit stream comprises the data that need be transferred to described internal bit stream, connect with a corresponding time slot position in each cycle in the described shared bits stream, described data are sent to this position.
16. equipment as claimed in claim 14, one of them channel is by the set of time-slot location definition in each cycle of described at least one bit stream, the channel of a correspondence is by one group of time slot corresponding location definition in each cycle of described internal bit stream, wherein said mapping device is set to, with any time slot position of data from described that group time slot position of described at least one bit stream, be mapped to any time slot position in described that group time slot position of described internal bit stream, and in described that group time slot, keep the relative order of the data that receive from described at least one bit stream simultaneously.
17. as any described equipment among the claim 8-16, comprise the mapping device that at least one bit streams of described relatively at least three bit streams provides, to each time slot in the one-period of described internal bit stream, whether control needs the data of transmission there are written in described at least one bit stream, if will write, control is written to which time slot position in described at least one bit stream with described data.
18. equipment as claimed in claim 17, wherein said mapping device is set to, clearly with a particular time-slot position in each cycle of described internal bit stream, this bit stream comprises the data that need be transferred to described at least one bit stream, connect with a corresponding time slot position in each cycle of described at least one bit stream, described data are sent to this position.
19. equipment as claimed in claim 17, set of time-slot position in each cycle that the described internal bit that is defined as one of them channel flows, the channel of a correspondence is by one group of time slot corresponding location definition in each cycle of described at least one bit stream, wherein said mapping device is set to, with any time slot position of data from described that group time slot position of described internal bit stream, be mapped to any time slot position of described that group in time slot position of described at least one bit stream, and in described that group time slot, keep the relative order of the data that receive from described at least one bit stream simultaneously.
20. as any described equipment among the claim 8-19, wherein said shared medium provides between the described port in the circuit-switched channel of two or more inside unidirectional multichannel time division multiplexing bit stream and has transmitted data, these bit streams transmit in described medium, and are conducted interviews by described port.
21. equipment as claimed in claim 20, wherein use described two or more exchange internal bit stream, the data that receive as a time slot of serial data in will a bit stream in described two or more bit streams send as a time slot in the part parallel data at least.
22. as any the described equipment among the claim 1-21, wherein said channel is a multi-rate channel.
23. a switch is used for swap data between the unidirectional bit stream of at least three multichannels of circuit switching time division multiplex network, wherein:
Each bit stream in the described bit stream is divided into a plurality of cycles, and each cycle in the described cycle is divided into a plurality of time slots;
By dynamic assignment time slot in described bit stream, between the node of network, set up, revise and the end circuit-switched channel;
Use an inside unidirectional multichannel time division multiplexing bit stream, this bit stream is divided into a plurality of cycles, and the cycle is divided into a plurality of time slots respectively, and the time slot data of described bit stream are transmitted between the input and output port of described switch;
By dynamic assignment time slot in described internal bit stream, between two or more ports of telephone net node, set up, revise and the end circuit-switched channel.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE97047385 | 1997-12-18 | ||
| SE9704738A SE9704738D0 (en) | 1997-12-18 | 1997-12-18 | Method and apparatus for switching data between bitstreams of a circuit switched time division multiplexed network |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1284254A true CN1284254A (en) | 2001-02-14 |
Family
ID=20409449
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 98813509 Pending CN1284254A (en) | 1997-12-18 | 1998-12-17 | Method and appts for switching data between bitstreams of circuit switched time division multiplexed network |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP1040721A2 (en) |
| CN (1) | CN1284254A (en) |
| SE (1) | SE9704738D0 (en) |
| WO (1) | WO1999031848A2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SE9902442L (en) * | 1999-06-28 | 2000-12-29 | Net Insight Ab | Method and apparatus in a digital communication system |
| CN1866805B (en) * | 2005-12-05 | 2010-08-11 | 华为技术有限公司 | Mixed rate time-division multiplex switching chip and its data switching method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU623953B2 (en) * | 1988-12-07 | 1992-05-28 | Telstra Corporation Limited | A communications method for a shared-medium communications network |
| FI90173C (en) * | 1992-01-31 | 1993-12-27 | Nokia Telecommunications Oy | Method and apparatus for connecting a computer to a digital telephone network or other digital transmission system |
| SE508889C2 (en) * | 1996-03-25 | 1998-11-16 | Net Insight Ab | Method and apparatus for data transmission with parallel bit streams |
-
1997
- 1997-12-18 SE SE9704738A patent/SE9704738D0/en unknown
-
1998
- 1998-12-17 CN CN 98813509 patent/CN1284254A/en active Pending
- 1998-12-17 WO PCT/SE1998/002358 patent/WO1999031848A2/en not_active Application Discontinuation
- 1998-12-17 EP EP98964623A patent/EP1040721A2/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| WO1999031848A2 (en) | 1999-06-24 |
| SE9704738D0 (en) | 1997-12-18 |
| EP1040721A2 (en) | 2000-10-04 |
| WO1999031848A3 (en) | 1999-08-26 |
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