In the design of existing GSM base station single-carrier-frequency diversity receiver, from the radio frequency to the intermediate frequency to base band, always with analog as effective processing means, comprise mixing, filtering, AGC or high low gain branch road etc., ADC carries out analog-to-digital conversion to baseband I, Q signal, and then is carried out the processing of numeric field by channel decoder.
For the dynamic range that guarantees receiver (GSM900 for-15dBm~-89dB is dynamic altogether for 104dBm, GSM1800 be-23dBm~-81dB is dynamic altogether for 104dBm), common two kinds of schemes of the general employing of receiver design: high low gain branch road scheme and AGC scheme.
High low gain branch road scheme (is seen Page 67, BTS Hardware﹠amp; Functions, AlcatelMobile Communication Deutschland GmbH Systemservice TrainingDivision, February 1st 1995 version 1.0) be by adopting the method for high low gain branch road to enlarge the dynamic range of receiver at intermediate frequency and Base Band Unit.After the A/D exchange, in digital circuit, store I, the Q signal of high low gain branch road, select to satisfy one road I, the Q signal of amplitude requirement then by base band.
The AGC scheme (see 1, Page 6, Transceiver Unit TRX, B6Z465119AE/1.0.0, NORKIA DynaText book 465267A2,1999-08-142, Page8-9, Chapter9, GSM-106-020, Motolola GSM customerDocumentation, September 1998, M-cell 6 Service Manual) adopt real-time AGC to control the dynamic range that realizes receiver.It controls the gain that variable gain amplifier (or variable attenuator) is adjusted receiving element in real time by the AGC control signal, makes the receiver output level remain on the scope of requirement.
More than two kinds of schemes some intrinsic shortcomings are arranged:
1. receiver function is by hard-wired fully, and various parameters are all determined by hardware, if want to change some system parameterss such as filter bandwidht and characteristic etc., must redesign circuit.
2. because high low gain branch road scheme needs identical two branch roads (high-gain branch road and low gain branch road) on the structure, the AGC scheme needs the Gain Automatic control circuit of AGC, and two kinds of schemes all need Simulation with I, Q orthogonal demodulation circuit, circuit more complicated, cost is higher, and reliability reduces.
3. there are imbalance of amplitude and phase inevitably in analog intermediate frequency signal I, Q quadrature demodulation, and two branch roads all can have dc error.
4. because the discreteness of analog component electric parameter, can cause the inconsistent of quality between the product, and because the system configuration complexity increases the debugging amount, maintainable relatively poor.
One of typical scenario in the single-carrier-frequency diversity receiver technology of existing GSM base station is a high low gain branch road scheme shown in Figure 1.In this scheme, two identical branch roads of main diversity are arranged, promptly main collection branch road and diversity branch, two shared one first local oscillators 126 of branch road before the channel-decoding part 125.Each bar branch road can divide for the radio frequency part of being made up of antenna 100, band pass filter 101, low noise amplifier 102 and frequency mixer 103; The intermediate-frequency section of forming by band pass filter 104, intermediate frequency amplifier 105 and band pass filter 106; The reception preprocessing part of forming by splitter 107 and high and low gain branch road.Two branch roads of high and low gain are identical, every branch road comprises 108/117,113/121, two low pass filter 109/118,114/122 of 112, two frequency mixers of a local oscillator, 110/119,115/123, two analog to digital converter 111/120,116/124 of two amplifiers.In this programme, by adopting the method for high low gain branch road to enlarge receiver self dynamic scope at intermediate frequency and baseband portion.Its workflow is: behind the radiofrequency signal process rf filtering and amplification from antenna, be mixed to intermediate frequency, pass through intermediate frequency filtering and amplification again, be divided into high low gain two paths of signals, carry out I, Q quadrature demodulation, analog signal after the demodulation is quantized on base band by ADC, and the digital signal after the quantification selects the road I, the Q that satisfy amplitude requirement to decode by channel decoder, and receiver dynamically is the gain inequality sum of the dynamic and high low gain branch road of ADC like this.If the attainable dynamic range of each ADC is 48dB, the gain inequality of high low gain branch road is 42dB, when radio frequency is input as strong signal, channel decoder selects the low path signal to decode, when radio frequency is input as weak signal, channel decoder selects high road signal to decode, and then the whole dynamic expansion of receiver is 48+42=90dB, thereby satisfies the system dynamics requirement.The shortcoming of high low gain branch road scheme is the circuit more complicated, and cost is higher, and reliability reduces.
Another typical scheme is an AGC scheme shown in Figure 2.The circuit of AGC scheme also is two identical branch roads of main diversity to be arranged, two shared one first local oscillators 218 of branch road before the channel-decoding part.Every branch road can divide for by antenna 201, low noise amplifier 202, the radio frequency part that frequency mixer 204 is formed; The intermediate-frequency section of forming by two band pass filters 205, variable gain amplifier 206, band pass filter 207, RSSI testing circuit 219 and AGC controller 220; Preprocessing part comprises 210,215, two analog to digital converters 211,216 of 209,214, two amplifiers of 208,213, two low pass filters of 212, two frequency mixers of a local oscillator.This programme adopts real-time AGC to control the dynamic range that realizes receiver, and its workflow is: behind the radiofrequency signal process rf filtering and amplification from antenna, be mixed to intermediate frequency, pass through intermediate frequency filtering and amplification again, its intermediate-frequency gain is controlled by agc circuit.Intermediate-freuqncy signal is through I, Q quadrature demodulation, and the analog signal after the demodulation is quantized on base band by ADC, and the digital signal after the quantification is decoded by channel decoder.AGC control signal control variable attenuator (or variable gain amplifier) is adjusted the overall gain of receiving element in real time, makes the receiver output level remain on the scope of requirement.The AGC control signal generally is to enter quick RSSI testing circuit by coupling unit signal in the intermediate-frequency circuit of receiver to produce it to produce the output signal V of RSSI testing circuit
RSSIThe intensity that can reflect the receiver input signal.Control procedure is as follows:
1, determine a suitable received signal level scope at base band ADC input (being used for carrying out to received signal ADC quantizes), promptly effective receive window, and determine its corresponding input signal strength.
2, receiver is to the signal intensity indication signal V of quick RSSI testing circuit output
RSSICarry out ADC and quantize, determine the Control Parameter of the variable attenuator in the receiver then by the method for calculating or table look-up, and, make the output level of received signal drop within effective receive window with the gain of this parameter receiver control.
The shortcoming of AGC scheme is to extract the field intensity index signal from quick RSSI testing circuit to want enough soon to the A/D conversion receiver speed that produces gain control signal of finishing dealing with.
Some common shortcomings of high low gain branch road scheme and AGC scheme as previously mentioned.
Shown in Figure 3 is GSM of the present invention base station single-carrier-frequency diversity receiver block diagram.GSM of the present invention base station single-carrier-frequency diversity receiver comprises the simulation part, receives preprocessing part and channel-decoding part.Described simulation part branch comprises main, two identical branch roads of diversity.Every branch road comprises radio frequency part and intermediate-frequency section.Article two, the shared local oscillator 307 of the radio frequency part of branch road.The radio frequency part of each bar branch road comprises: antenna 300/300 ', broadband filter 301/301 ', low noise amplifier 302/302 ', frequency mixer 303/303 '; Intermediate-frequency section in every branch road comprises: between two band pass filter 304/304 ', 306/306 ', two band pass filters an intermediate frequency amplifier 305/305 ' is arranged.Described preprocessing part comprises: ADC311 is used for intermediate-freuqncy signal is carried out analog-to-digital conversion; DDC 312, are used for digital signal is carried out demodulation, and digital I, Q signal are carried out CIC filtering extraction, FIR filtering extraction and form conversion; CKU 308, are used for producing system clock; CPU 309, are used for finishing with software to the power-up initializing of receiving circuit and receiver parameters is configured or revises; EPLD310 is used for time slot clock that the generation system needs (frame comprises 8 time slots among the GSM, data processing, to transmit with the time slot be that unit carries out) and interrupt signal, for system provides necessary control, addressing and timing signal.
Wherein inside detailed structure such as Fig. 4 of DDC 312, it comprises: plural NCO 401 Hes are used for two-way I, Q signal that the digital signal branch is orthogonal; CIC decimation filter 404 receives two-way I, the Q signal from the quadrature of digital quadrature mixing unit 402,403 outputs, and I, Q signal are carried out CIC filtering and data pick-up; FIR decimation filter 405 receives the output signal of CIC decimation filter 404, and I, Q signal are carried out FIR filtering and data pick-up; Be dateout format conversion unit (Output Format) 406, as required I, Q signal carried out the serial or parallel conversion thereafter.
The Surface Acoustic Wave Filter that band pass filter 304/304 ', 306/306 ' all adopts among the present invention promptly adopts alliteration table filter, and the centre frequency of Surface Acoustic Wave Filter is chosen as 190MHz.Intermediate frequency amplifier 305/305 ' can be selected limiting amplifier for use, also can select variable gain amplifier for use.ADC311 is operated in binary channels, and the sample frequency that two tributary signals of main diversity are sampled is 13MHz, and promptly the sample frequency of each passage is 6.5MHz; The work clock of DDC 312 is the integral multiple of 13MHz, but is no more than the maximum operating frequency of DDC, and general optional 2-5 times, in a specific embodiment, the work clock of choosing DDC 312 is 26MHz.
Among the present invention, the data pick-up rate size of the frequency of plural NCO, DDC 312, work clock, parameters such as fluctuating in the filtering bandwidth of FIR decimation filter 405, the band, passband and resistance-hysteresis characteristic are all disposed by CPU309.
Referring to Fig. 3, after the signal that antenna 300/300 ' receives amplifies by broadband filter 301/301 ' filtering and low noise amplifier 302/302 ', once be mixed to intermediate frequency 70-250MHz by frequency mixer 303/303 ', the present invention adopts 190MHz, directly carries out if sampling by ADC311 after amplifying through alliteration table filter 304/304 ', 306/306 ' intermediate frequency filtering and intermediate frequency amplifier 305/305 '.Compare with the prior art scheme, the present invention is advanced to intermediate frequency with digitlization from base band, saves Simulation with I, Q orthogonal demodulation circuit, and by a slice ADC intermediate-freuqncy signal is sampled and to replace the multi-disc ADC in the prior art that baseband I, Q signal are sampled.ADC311 transforms to digital intermediate frequency with analog if signal, and with-f
Samp/ 2~+ f
Samp/ 2 (f
SampBe ADC single channel sample frequency) the normalization bandwidth.For the simulation GMSK modulation signal of 190MHz, configuration ADC is 13MHz (then the single channel sampling clock is 6.5MHZ) at twin-channel work sampling clock, and the digital intermediate frequency frequency after the sampling is:
190-6.5 * 29=1.5 (MHz) if sampling ADC general-∞~+ ∞ entire spectrum signal all normalizes to-f
Samp/ 2~+ f
Samp/ 2, promptly (3.25M~+ 3.25M).Because of producing some aliasings like this, so we must be clean with the image frequency composition filtering of all desired signals before ADC quantizes.The function of this anti-aliased filtering is mainly finished by two if bandpas filters 304/304 ', 306/306 ', and for the filter effect of obtaining, generally we choose Surface Acoustic Wave Filter.
ADC311 also will provide a processing gain to system except intermediate-freuqncy signal is finished the quantization function, and this will improve the dynamic property of system.Because the GMSK signal bandwidth is 200KHz, according to the Nyquist sampling thheorem, the sample frequency of ADC311 only is required to be 2 times of signal bandwidths, i.e. 400KHz.ADC311 is 6.5MHz in the sampling rate of each passage work in the reality, and the processing gain that this over-sampling a/d C311 can provide is:
Pocess_Gain=10Log(6.5MHz/200KHz)=15dB
Data after the ADC311 sampling are finished mixing, demodulation, extraction and filter function by DDC 312 circuit, export digital baseband I at last, Q signal is decoded to channel decoder.
DDC 312 circuit are key components of the present invention, describe the operation principle of DDC 312 below according to Fig. 4.1. the if sampling data are carried out frequency spectrum shift, finish digital demodulation
The digital medium-frequency signal that is input to DDC 312 is moved base band by plural NCO 401 and digital quadrature mixing unit 402,403.The orthogonal local oscillation output signal of digital medium-frequency signal and plural NCO 401 multiplies each other and can obtain digital I, Q signal.By software the numerical value of plural NCO 401 is carried out different being provided with and the intermediate-freuqncy signal of different frequency can be moved base band.The frequency numerical value (32 plural NCO) of plural number NCO 401 can calculate with following formula:
NCO_FREQ=2
32* mod (f
Ch/ f
Samp) wherein mod represent complementation, f
ChBe analog intermediate frequency signal frequency, f
SampSample frequency for ADC.In the present invention, analog intermediate frequency signal frequency f
ChBe 190MHz, the sample frequency f of ADC
SampBe 6.5MHz.2. digital I, Q signal are carried out the CIC filtering extraction
By I, the Q signal that plural NCO 401 and digital quadrature mixing unit 402,403 obtain, enter CIC decimation filter 404 and carry out CIC filtering and data pick-up.This part is mainly finished when reducing data pass rate and is played anti-aliased effect again.Because the signal rate of DDC output is certain, the input rate of FIR reduces behind the adding CIC, the extraction yield of signal after by FIR just can reduce like this, and the passband of FIR and transition band can be done widelyer, suppresses just can strengthen outside the band like this under the certain situation of FIR progression.3. digital I, Q signal are carried out the FIR filtering extraction
Signal by CIC decimation filter 404 is finished baseband filtering at FIR decimation filter 405.The FIR filter has the irreplaceable function of analog filter, and it is a linear phase filter, its exponent number, and filtering bandwidth rises and falls in the band, and passband and stopband characteristic etc. can be realized by software.Filtered data are again through extracting the code check that obtains 270.833K/S at last.4. data based needs are carried out format conversion, select parallel or serial output
Corresponding to different late-class circuits (the input data format is required different DSP), dateout format conversion unit (Output Format) 406 can be carried out the serial or parallel conversion to I, Q data, 270.833KHz baseband I, Q signal that final output is satisfied the demand.
Be used for the embodiment of GSM900/GSM1800 system at GSM of the present invention base station single-carrier-frequency diversity receiver, its static sensitivity has all reached-111dBm, thus the GSM1800 receiver be-23dBm~-88dB is dynamic altogether for 111dBm; The GSM900 receiver is-15dBm~-96dB is dynamic altogether for 111dBm, all is higher than code requirement.