CN1279595C - Base plate with minitype connection components and its preparation method - Google Patents
Base plate with minitype connection components and its preparation method Download PDFInfo
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- CN1279595C CN1279595C CN 03128997 CN03128997A CN1279595C CN 1279595 C CN1279595 C CN 1279595C CN 03128997 CN03128997 CN 03128997 CN 03128997 A CN03128997 A CN 03128997A CN 1279595 C CN1279595 C CN 1279595C
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Abstract
The present invention relates to a substrate with miniature connecting elements and a manufacture method thereof. The substrate of the present invention can be split into a first substrate with a lead-in hole element and a second substrate with an insertion head element, wherein the lead-in hole element is composed of at least two lead-in hole parts, at least two isolation hole parts and a spacer block part between the lead-in holes and the isolation hole parts; each lead-in hole part is composed of a lead-in straight hole which is perpendicular to the surface of the first substrate, a first bottom wide hole at the lower end of the lead-in straight hole, and a first protrusion part which is arranged at the lower joining place of the bottom wide hole and the lead-in straight hole and extends to the bottom wide hole; the insertion head element comprises at least two insertion head parts, and is composed of an insertion block which is perpendicular to the surface of the second substrate, concave parts at joining places of both sides of the lower end of the insertion block and the surface of the substrate, and a third protrusion part; the insertion head parts are aligned with the lead-in hole parts, the insertion heads are inserted into the lead-in holes, the first protrusion part transversally cross the third protrusion part, and latching connection is realized. The present invention provides a wafer level packaging specification which has the advantages of simple process, low packaging stress and universality of multiple devices.
Description
Technical field
The present invention relates to have miniature autoregistration locking connecting elements substrate, utilize the dynamo-electric process technology of micromechanics to make, can be used for the wafer-level packaging of little-electro-mechanical system (MEMS) device.Belong to the device packaging technique field.
Background technology
Little-the electro-mechanical system (Micro Electro-Mechanical Systems, below be MEMS simply) technical development so far, be used widely at numerous areas such as transducer, optical communication, biochemistry detection, wireless telecommunications, demonstrate the diversity of product and good market prospects.But in the process that transforms to industry; because the MEMS device is in the diversity of aspects such as structure, operation principle, suitable application area; packaging technology to device has also proposed complicated requirement; as to the protection of MEMS movable structure, encapsulation stress/temperature controlling, with the compatibility of other technologies, with being connected of control and signal processing circuit etc.; make that the MEMS encapsulation technology is increasingly sophisticated; and versatility is poor; taken more than half part of development cost, become " bottleneck " that the MEMS technology further develops just day by day.In existing wafer scale (wafer-level) MEMS encapsulation technology, various bonding techniques (waferbonding) are used very extensively, as the solid phase bonding, and the intermediary layer bonding, anode linkage, technology such as eutectic bonding or welding relates to silicon, glass and other multiple material (U.G sele and Q.Y.Tong, " Semiconductor wafer bonding; " Annu.Rev.Mater.Sci., pp.215-241,1998.).Ubiquity bonding package temperature is higher in these technology, needs extra electric field, and the substrate surface complex treatment process is with difficult point such as device making technics poor compatibility, the difficult MEMS encapsulation means that become general usefulness.In addition, someone proposes a kind of localized heating bonding techniques (Y.T.Cheng, Liwei Lin, and Khalil Najafi, " Localized Silicon Fusion and EutecticBonding for MEMS Fabrication and Packaging ", Journal ofMicroelectromechanical Systems, Vol.9, No.1, March 2000), promptly on the substrate around the MEMS functional structure part, prepare the polysilicon heating resistor, by heating resistor with the local heating of substrate to hundreds of degree even more than 1000 degree, but still keep the bulk temperature of substrate not have obvious rising, thus realize the local bonding between substrate, also just realized the MEMS encapsulation of wafer scale.The defective of this technology is that the local stress that local high-temperature gradient causes is bigger.For example, in piezoresistance type acceleration sensor, the stress that bonding causes may reduce the consistency of piezo-resistance, also just the drift characteristic of device, rate of finished products etc. be had adverse influence.
Summary of the invention
The objective of the invention is in order to realize that technology is simple, encapsulation stress is low, to have a kind of substrate that has miniature connecting elements of wafer scale MEMS device package proposition of versatility and preparation method thereof
The objective of the invention is to realize, can be divided into first substrate that has the entrance hole member and second substrate that has the insert head member by the substrate that has autoregistration locking connecting elements.Aforementioned entrance hole member, by at least two entrance hole portions and at least two the clearance hole portions on first substrate, and the spacer block portion between entrance hole portion and the clearance hole portion forms.This entrance hole portion is by the importing straight hole perpendicular to first substrate surface, this imports the importing inclined plane part of the straight hole upper end and the first substrate surface junction, with import the wide hole, first bottom that the straight hole lower end joins, and be positioned at wide hole, this bottom and first jut composition junction, that stretch to this wide hole, bottom that imports the straight hole lower end.Aforementioned clearance hole portion is by the isolation straight hole perpendicular to first substrate surface, the wide hole, second bottom that joins with this isolation straight hole lower end, and be positioned at handing-over, that stretch to this wide hole, second bottom second jut with aforementioned isolation straight hole lower end in this wide hole, second bottom and form.Substrate portion between aforementioned entrance hole portion and the clearance hole portion forms spacer block portion.Aforementioned insert head member comprises two at least and inserts head.This inserts head by the insertion piece perpendicular to second substrate surface, this inserts the insertion inclined-plane at piece top, the recess of the both sides, lower end of this insertions piece and the handing-over of second substrate surface, is positioned at the 3rd jut composition that stretches to second substrate surface of this recess and insertion junction, piece lower end.Aforementioned insertion head is aimed at entrance hole portion, inserted entrance hole portion, form the lateral cross of aforementioned first jut and the 3rd jut, realize that locking connects.
The quantity of aforementioned entrance hole portion is no less than the quantity of aforementioned insertion head.The surface of aforementioned first substrate is to the distance between the top in wide hole, first bottom, and the surface that is not more than second substrate is to the distance between the top of aforementioned recess; Simultaneously, the top in wide hole, first bottom is to the distance between the bottom surface, and the surface that is not less than the insertion head is to the distance between the top of aforementioned recess.The width of aforementioned insert head is greater than aforementioned importing straight hole width.
The manufacture method of first substrate that has the entrance hole member among the present invention is characterized in that may further comprise the steps: a) form on first substrate and import inclined plane part; B) by this is imported the corrosion of the bottom surface of inclined plane part, form the width importing straight hole identical with aforementioned bottom surface width; Simultaneously, form the isolation straight hole; C) form erosion-resisting passivation layer simultaneously in the side and the bottom surface of the surface of first substrate, the side that imports inclined-plane, importing straight hole and bottom surface, isolation straight hole; D) passivation layer of removing aforementioned importing straight hole bottom surface and isolating the straight hole bottom surface; E) form wide hole, aforementioned first bottom and the wide hole of first jut and second bottom and second jut by isotropism and anisotropic etch; Simultaneously, form aforementioned spacing block portion.
The manufacture method of second substrate that has the insert head member among the present invention is characterized in that may further comprise the steps: a) form on second substrate and insert inclined plane part; B) by this is inserted the corrosion of second substrate of inclined plane part both sides, form the width insertion piece identical with the width of aforementioned insertion inclined plane part; C) form erosion-resisting passivation layer on the side of insertion inclined plane part, the side of inserting piece and the surface of both sides second substrate; D) passivation layer on the surface of the aforementioned insertion piece of removal both sides second substrate; E) form aforementioned recess and the 3rd jut.
As mentioned above, effect of the present invention is conspicuous.Can on the monocrystalline silicon piece in (100) crystal orientation, produce first substrate that has the patchhole member and second substrate that has the insert head member according to the present invention, on this first substrate and second substrate, produce the required structure of multiple microdevice more respectively, by patchhole member on first substrate and the insert head member on second substrate, realize the connection encapsulation between substrate.This connection has the autoregistration characteristic, and encapsulation stress is low, applicable to the wafer-level packaging of multiple device.
Description of drawings
Fig. 1 is the decomposition profile diagram that is produced on the optical fiber align location notch structure on the substrate that has autoregistration locking connecting elements.Wherein:
(a) be have the entrance hole member first substrate and on the sectional drawing of first V-shaped groove that is used for fiber orientation;
(b) be have the patchhole member second substrate and on the sectional drawing of second V-shaped groove that is used for fiber orientation;
(c) be the sectional drawing that first substrate and second substrate pass through the fiber orientation structure after the autoregistration locking is connected, put into optical fiber between two substrates.
Fig. 2 be have the entrance hole member first substrate and on the sectional drawing of manufacture craft flow process of first V-shaped groove that is used for fiber orientation.
Fig. 3 be have second substrate that inserts module component and on the sectional drawing of making flow process of second V-shaped groove that is used for fiber orientation
Fig. 4 has the decomposition profile diagram of the miniature piezoresistance type acceleration sensor of making and encapsulating on the substrate of autoregistration locking connecting elements.
Among the figure,
The 1-first silicon chip substrate 2-second silicon chip substrate
The 2a-first bottom surface 3-imports straight hole
4-imports 4a-bottom surface, inclined-plane
Wide hole 6-first jut in 5-first bottom
7-isolates wide hole, straight hole 8-second bottom
The 9-second jut 10-spacing block
The 11-first V-shaped groove 12-inserts piece
13-inserts inclined-plane 14-recess
15-the 3rd jut 16-second V-shaped groove
17-optical fiber
21-photolithographic mask layer 23-passivation layer
The wide hole 26-first V-shaped groove corrosion window in 24-isotropism bottom
The 30-isotropism recess 32-second V-shaped groove corrosion window
41-the 3rd substrate 42-mass
43-beam 44-presser sensor resistance
45-gap 46-groove
Embodiment
Further illustrate substantive distinguishing features of the present invention and marked improvement below by two application examples, but the present invention only is confined to the embodiment that introduces by no means.
Embodiments of the invention 1 relate to have autoregistration locking connecting elements substrate in fiber orientation groove structure and Application in Packaging thereof.
The fiber orientation V-shaped groove structure that relates in the present embodiment is made by the first silicon chip substrate 1 and the second silicon chip substrate 2, is the monocrystalline silicon piece substrate in (100) crystal orientation.The decomposition profile diagram of fiber orientation groove structure as shown in Figure 1.
Shown in Fig. 1 (a), the wide hole 5, first bottom that on the first silicon chip substrate 1, is formed with the importing inclined-plane 4 of importing straight hole 3 perpendicular to this substrate 1 surface, this straight hole 3 and substrate 1 surperficial junction, joins with aforementioned importing straight hole 3 lower ends and be positioned at first jut 6 junction, that stretch to wide hole 5, this bottom of wide hole 5, this bottom and importing straight hole 3 lower ends; And, perpendicular to the isolation straight hole 7 on substrate 1 surface, the wide hole 8, second bottom that joins with these straight hole 7 lower ends and be positioned at second jut 9 junction, that stretch to wide hole 8 of this wide hole 8 and aforementioned isolation straight hole 7 lower ends.More than constitute first substrate 1 that has the entrance hole member.First V-shaped groove 11 that is used for the optical fiber align location that on first substrate 1, is formed with spacer block portion 10 and forms at the central portion of substrate 1.
Shown in Fig. 1 (b), on the second silicon chip substrate 2, be formed with insertion piece 12 perpendicular to substrate 2 surfaces, this inserts the insertion inclined plane part 13 at piece 12 tops, insert piece both sides, 12 lower end and substrate 2 surperficial junctions recess 14, be positioned at the 3rd jut 15 that stretches to substrate 2 surfaces of this recess 14 and insertion junction, piece 12 lower end.More than constitute second substrate 2 that has the insert head member.Be formed for second V-shaped groove 16 of optical fiber align location at the central portion of second substrate 2.
Shown in Fig. 1 (c), first V-shaped groove 11 on the first silicon chip substrate 1 is just relative with second V-shaped groove 16 on the second silicon chip substrate 2, optical fiber 17 is placed between first V-shaped groove 11 and second V-shaped groove 16, simultaneously that the importing straight hole 3 on the substrate 1 is just relative with insertion piece 12 on the substrate 2, to insert piece 12 again inserts in the importing straight hole 3, in the insertion process, elastic bending can take place to isolating straight hole 7 in spacer block portion 10, after inserting end, spacer block portion 10 homings, make first jut 6 and the 3rd jut 15 form lateral cross, realize that first substrate 1 is connected with locking between second substrate 2, simultaneously with fiber orientation between first V-shaped groove 11 and second V-shaped groove 16.
As mentioned above, be to realize by first jut 6 that inserts piece 12 and lower end thereof and the 3rd jut 15 that imports straight hole 3 and lower end thereof that autoregistration locks to be connected between the first silicon chip substrate 1 and the second silicon chip substrate 2.Its alignment precision only depends on the micromachined precision, and the latter can be precisely controlled, this has guaranteed the alignment precision between first V-shaped groove 11 and second V-shaped groove 16, also just guaranteed the accurate location of optical fiber 17 in the space that forms by first V-shaped groove 11 and second V-shaped groove 16, helped reducing in optical transmission process and locate the inaccurate loss that causes each other because of optical fiber.
The fiber orientation V-shaped groove structure that present embodiment relates to and the manufacture method of encapsulating structure thereof, referring to figs. 2 and 3 shown in the technological process sectional drawing describe.
At first, have the manufacture craft of the first silicon chip substrate 1 of entrance hole member, with reference to (a) among the figure 2～(i) describe.(a) form mask layer 21 on the first silicon chip substrate 1, this mask layer 21 is made of the photosensitive resin material usually, is commonly referred to as photoresist, and the figure of mask layer 21 is formed by photoetching technique.(b) utilize alkaline aqueous solution to go out shallow hole, form and import inclined-plane 4 and bottom surface 4a in 1 surface corrosion of first substrate; Subsequently mask layer 21 is removed.(c) form mask layer 21 on first substrate, 1 surface, bottom surface 4a is exposed by photoetching technique.(d) utilize the bottom surface 4a that not masked layer 21 covers on DRIE technology etching first substrate 1, form importing straight hole 3 and isolate straight hole 7; Subsequently mask layer 21 is removed.(e) on first substrate, 1 surface, import inclined-plane 4, import the side of straight hole 3, the side that isolates straight hole 7, bottom surface 4a place formation passivation layer 23 comprehensively.(f) passivation layer that utilizes the RIE technology will import the 4a place, bottom surface of straight hole 3 and isolation straight hole 7 is removed.(g) the 4a place, bottom surface that imports straight hole 3 and isolation straight hole 7 is carried out the isotropic etch technology, form wide hole 24, isotropism bottom.(h) utilize alkaline aqueous solution that anisotropic etch is carried out in wide hole 24, isotropism bottom, form wide hole 5, first bottom, wide hole 8, second bottom, first jut 6 and second jut 9; Simultaneously, form spacer block portion 10; (i) remove passivation layer 23.
By above processing step, form the first silicon chip substrate 1 that has the entrance hole member.
On the first silicon chip substrate 1, make the aligning location V-shaped groove structure that is used for fiber array by following steps (j)～(l) again.(j) on the first silicon chip substrate, 1 surface, import inclined-plane 4, import the side in the side of straight hole 3, the side that isolates straight hole 7, wide hole 5, first bottom and bottom surface, side and bottom surface, the side of first jut 6 and the side of second jut 9 in wide hole 8, second bottom form passivation layer 23 comprehensively.(k) central portion at the first silicon chip substrate 1 forms first V-shaped groove corrosion window 26.(l) utilize alkaline aqueous solution that first V-shaped groove is corroded to desired depth with corrosion window 26, form first V-shaped groove 11; Remove passivation layer 23 subsequently.
Secondly, have the manufacture craft of the second silicon chip substrate 2 that inserts module component, with reference to (a) among the figure 3～(h) describe.(a) mask layer 21 of formation photosensitive resin material (being commonly referred to as photoresist) on the second silicon chip substrate 2, the figure of this mask layer 21 is formed by photoetching technique.(b) utilize alkaline aqueous solution to go out shallow hole, form and insert the inclined-plane 13 and the first bottom surface 2a in 2 surface corrosions of second substrate; Subsequently mask layer 21 is removed.(c) on second substrate 2, form mask layer 21, the first bottom surface 2a is exposed by photoetching technique.(d) utilize the bottom surface 2a that not masked layer 21 covers on DRIE technology etching second substrate 2, form and insert the piece 12 and the first bottom surface 2a; Subsequently mask layer 21 is removed.(e) form passivation layer 23 in the side of the first bottom surface 2a, insertion inclined-plane 13 and insertion piece 12.(f) utilize the RIE technology that the passivation layer at 2b place, second bottom surface is removed.(g) 2a place, first bottom surface is carried out the isotropic etch technology, form isotropism recess 30.(h) utilize alkaline aqueous solution that isotropism recess 30 is carried out anisotropic etch, form recess 14, the 3rd jut 15 and the first bottom surface 2a; Remove passivation layer 23 subsequently.
By above processing step, formation has the second silicon chip substrate 2 that inserts module component.
On the second silicon chip substrate 2, make the aligning location V-shaped groove structure that is used for fiber array by following steps (i)～(k) again.(i) form passivation layer 23 in the side of the 3rd bottom surface 2c, the side of inserting inclined-plane 13, the side of inserting piece 12, recess 14 and bottom surface, the 3rd jut 15.(j) central portion at the 3rd bottom surface 2c forms second V-shaped groove corrosion window 32.(k) utilize alkaline aqueous solution that second V-shaped groove is corroded to desired depth with corrosion window 32 places, form second V-shaped groove 16; Remove passivation layer 23 subsequently.
Embodiments of the invention 2 relate to the encapsulation at miniature piezoresistance type acceleration sensor of the substrate that has autoregistration locking connecting elements.The decomposition profile diagram of this miniature piezoresistance type acceleration sensor is shown in 4.
The miniature piezoresistance type acceleration sensor that relates in the present embodiment is made up of the first silicon chip substrate 1 and the second silicon chip substrate 2 and the 3rd substrate 41.Wherein, first substrate 1 and second substrate 2 are the monocrystalline silicon piece in (100) crystal orientation; The 3rd substrate 41 can adopt the silicon chip substrate, but is not limited to the silicon chip substrate, for example can adopt glass substrate.
Shown in Fig. 4 (a), the wide hole 5, first bottom that on the first silicon chip substrate 1, forms the importing inclined-plane 4 of importing straight hole 3 perpendicular to substrate 1 surface, this straight hole 3 and substrate 1 surperficial junction, joins with aforementioned importing straight hole 3 lower ends and be positioned at first jut 6 junction, that stretch to wide hole 5, this bottom of wide hole 5, this bottom and importing straight hole 3 lower ends; And, perpendicular to the isolation straight hole 7 on substrate 1 surface, the wide hole 8, second bottom that joins with these straight hole 7 lower ends and be positioned at second jut 9 junction, that stretch to wide hole 8 of this wide hole 8 and aforementioned isolation straight hole 7 lower ends, and the spacer block portion 10 that forms simultaneously; Mass 42, and beam 43 and gap 45 between the mass 42 and the first silicon chip substrate 1; And the presser sensor resistance 44 on the beam 43.
Shown in Fig. 4 (b), on the second silicon chip substrate 2, form insertion piece 12 perpendicular to substrate 2 surfaces, this inserts the insertion inclined plane part 13 at piece 12 tops, insert piece both sides, 12 lower end and substrate 2 surperficial junctions recess 14, be positioned at the 3rd jut 15 that stretches to substrate 2 surfaces of this recess 14 and insertion junction, piece 12 lower end; And, the groove 46 that forms at the central portion of substrate 2.Groove 46 provides the space of mass 42, and forms certain air damping.
Behind the first silicon chip substrate 1 and the 3rd substrate 41 bondings, just constituted miniature piezoresistance type acceleration sensor.Importing straight hole 3 on the first silicon chip substrate 1 is just relative with insertion piece 12 on the second silicon chip substrate 2, to insert piece 12 again inserts in the importing straight hole 3, make first jut 6 and the 3rd jut 15 form lateral cross, realize that the first silicon chip substrate 1 is connected with locking between the second silicon chip substrate 2, has finished the encapsulation of miniature piezoresistance type acceleration sensor.
When having acceleration to take place in Y direction, mass 42 is subjected to this acceleration to act on Y direction to move, cause the bending of beam 43, thereby causes the change in resistance of presser sensor resistance 44, changes the size that can converse external acceleration thus.Because being connected by locking with the second silicon chip substrate 2, the first silicon chip substrate 1 realizes the cover plate encapsulation, the stress that causes thus is very little, can greatly reduce characteristic and the conforming influence that cause by encapsulation stress, help guaranteeing reliability, consistency and the long-time stability etc. of device performance presser sensor resistance 44.
Claims (8)
1. substrate that has miniature connecting elements is characterized in that:
1) forms by first substrate that has the entrance hole member and second substrate that has the insert head member;
2) the entrance hole member on described first substrate, by at least two entrance hole portions and at least two the clearance hole portions on first substrate, and the spacer block portion between described entrance hole portion and the clearance hole portion forms; Wherein, entrance hole portion by perpendicular to the importing straight hole of first substrate surface, import the wide hole, first bottom that the straight hole lower end joins, and first jut composition junction, that stretch to this wide hole, bottom that is positioned at wide hole, this bottom and described importing straight hole lower end; Clearance hole portion is by the wide hole, second bottom that joins perpendicular to the isolation straight hole of first substrate surface, with this isolations straight hole lower end, and second jut composition junction, that stretch to this wide hole, second bottom that is positioned at this wide hole, second bottom and described isolation straight hole lower end;
3) the insert head member on described second substrate, at least comprise two and insert heads, it is by forming perpendicular to the recess of the both sides, lower end of the insertion piece of second substrate surface, this insertion piece and substrate surface junction, the 3rd jut that stretches to second substrate surface that is positioned at this recess and junction, described insertion piece lower end.
4) described insertion head is aimed at entrance hole portion, and insert head is inserted entrance hole, forms the lateral cross of described first jut and the 3rd jut, realizes that locking connects.
2. by the described substrate that has miniature connecting elements of claim 1, it is characterized in that the described importing straight hole upper end and the first substrate surface junction are the importing inclined plane part.
3. by the described substrate that has miniature connecting elements of claim 1, it is characterized in that the quantity of entrance hole portion, be no less than the quantity of inserting head; The surface of first substrate in the entrance hole member is to the distance between the top in wide hole, bottom, and the surface that is not more than the insertion head in the insert head member is to the distance between the top of described recess; The width of the insert head of insert head member is greater than the importing straight hole width of described entrance hole member.
4. by claim 1, the 2 or 3 described substrates that have miniature connecting elements, it is characterized in that first substrate and second substrate monocrystalline silicon piece substrate for (100) crystal orientation.
5. make as claim 1, the 2 described methods that have the substrate of miniature connecting elements, it is characterized in that:
1) making step that has first substrate of entrance hole member is:
A) on first substrate, remember the importing inclined plane part before the formation;
B) by preceding note being imported the corrosion of the bottom surface of inclined plane part, form the width importing straight hole identical with described bottom surface width; Simultaneously, form the isolation straight hole;
C) form erosion-resisting passivation layer simultaneously in the side and the bottom surface of the surface of first substrate, the side that imports inclined plane part, the side that imports straight hole and bottom surface, isolation straight hole;
D) passivation layer of removing described entrance hole bottom surface and isolating the straight hole bottom surface;
E) form wide hole, described first bottom and the wide hole of first jut and second bottom and second jut by anisotropic etch; Simultaneously, form described spacing block portion;
2) have the insert head member second substrate making step be:
A) on second substrate, remember the insertion inclined plane part before the formation;
B) corrosion by preceding note is inserted lower edge both sides second substrate of inclined plane part forms the width insertion piece identical with the lower edge width of described insertion inclined plane part;
C) form erosion-resisting passivation layer on the side of insertion inclined plane part, the side of inserting piece and the surface of both sides second substrate;
D) passivation layer on the surface of the described insertion piece of removal both sides second substrate;
E) form preceding note recess and the 3rd jut by anisotropic etch.
6. be used for fiber orientation groove structure and encapsulation by the described substrate that has miniature connecting elements of claim 1, it is characterized in that being formed for first V-shaped groove of optical fiber align location at the central portion of first substrate; Be formed for second V-shaped groove of optical fiber align location at the central portion of second substrate; First V-shaped groove on first substrate is just relative with second V-shaped groove on second substrate, optical fiber is placed between first V-shaped groove and second V-shaped groove.
7. be used for the encapsulation of miniature piezoresistance type acceleration sensor by the described substrate that has miniature connecting elements of claim 1, it is characterized in that on first substrate, forming mass, and beam and gap between the mass and first substrate; And the presser sensor resistance on the beam; The groove that forms at the central portion of second substrate.Behind first substrate and the 3rd substrate bonding, just constituted miniature piezoresistance type acceleration sensor.The importing straight hole of first substrate is just relative with insertion piece on second substrate, to insert piece again inserts in the importing straight hole, make first jut and the 3rd jut form lateral cross, realize that first substrate is connected with locking between second substrate, finishes the encapsulation of miniature piezoresistance type acceleration sensor.
8. be used for the application of the encapsulation of miniature piezoresistance type acceleration sensor by the described substrate that has miniature connecting elements of claim 7, it is characterized in that described the 3rd substrate or for the silicon chip substrate or for glass substrate.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 03128997 CN1279595C (en) | 2003-05-30 | 2003-05-30 | Base plate with minitype connection components and its preparation method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 03128997 CN1279595C (en) | 2003-05-30 | 2003-05-30 | Base plate with minitype connection components and its preparation method |
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| CN1481000A CN1481000A (en) | 2004-03-10 |
| CN1279595C true CN1279595C (en) | 2006-10-11 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9326786B2 (en) | 2010-10-18 | 2016-05-03 | CardioSonic Ltd. | Ultrasound transducer |
| US9566456B2 (en) | 2010-10-18 | 2017-02-14 | CardioSonic Ltd. | Ultrasound transceiver and cooling thereof |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103818876A (en) * | 2014-03-12 | 2014-05-28 | 杭州霆科生物科技有限公司 | Rapid bonding method for micro-fluidic chip |
| CN110672138B (en) * | 2018-07-02 | 2022-09-30 | 宁波舜宇车载光学技术有限公司 | Positioning device and method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9326786B2 (en) | 2010-10-18 | 2016-05-03 | CardioSonic Ltd. | Ultrasound transducer |
| US9566456B2 (en) | 2010-10-18 | 2017-02-14 | CardioSonic Ltd. | Ultrasound transceiver and cooling thereof |
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| CN1481000A (en) | 2004-03-10 |
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