CN1249552C - Method for automatic tracing compensation of frequency and apparatus therefor - Google Patents

Abstract

The present invention relates to a method for automatically tracing the frequency of a compensation time pulse and a relevant device thereof, and is applied to a USB peripheral controller. The device for automatically tracing the frequency of a compensation time pulse receives a data flow, and comprises an oscillator for generating time pulse signals, a time pulse picking up device which generates system time pulse signals according to the data flow and the sampling time pulse signals, a form picking up device which is coupled with the time pulse picking up device so as to pick up multiple forms of the data flow according to the system time pulse signals, a counter which is coupled with the form picking up device to calculate the length of the data flow according to the sampling time pulse signals to generate a count value so as to respond the forms, an arithmetic and logic unit (ALU) which is coupled with the counter and the form picking up device so as to map a setting value according to the count value and a reference value, and a temporary storage device which is coupled with the ALU and the oscillator so as to temporarily store the setting value and to feed the setting value back to the ALU so that the oscillator updates the frequency of the sampling time pulse signals to respond the setting value.

Description

The method and the relevant apparatus thereof of automatic tracking and compensating clock pulse frequency

(1) technical field

The method and the relevant apparatus thereof of the relevant a kind of automatic tracking and compensating clock pulse frequency of the present invention are particularly relevant for a kind of method and relevant apparatus thereof that is applicable to the automatic tracking and compensating clock pulse frequency in the USB peripheral unit.

(2) background technology

USB (universal serial bus) in the personal computer (universal serial bus, being called for short USB) port can be for connecting many kinds of USB devices, for example USB keyboard, USB mouse, USB calculating punch, the carry-on dish of USB, circumscribed USB hard disk, USB printer and USB scanner or the like, the user is provided peripheral very easily connecting interface, data transmission from early stage USB1.1 support 12Mbps evolves to the data transmission that present USB2.0 supports 480Mbps.

Classify from the USB transmission standard, USB1.1 can support low speed (low speed) peripheral unit, and data transmission standard is speed 1.5M (1M=10 ⁶) bps (bit per second), error tolerance be 1.5%, and (full speed) peripheral unit at full speed, message transmission rate is that 12Mbps, error tolerance are 0.25%; USB2.0 can support (high speed) peripheral unit at a high speed, and message transmission rate then can be up to 480Mbps.The low speed peripheral unit similarly is USB keyboard, USB mouse and USB rocking bar or the like, and peripheral unit similarly is the carry-on dish of USB, USB printer and USB scanner or the like at full speed.General USB2.0 on the market can backward compatible USB1.1 specification, also can support low speed, at full speed, peripheral unit at a high speed.

Fig. 1 is the calcspar that shows existing USB low speed controller, USB low speed controller 100 needs a plug-in accurate quartz (controlled) oscillator (crystal oscillator) 120, or ceramic resonator (ceramicresonator), and plug-in big capacitor C 1 and C2, and the vibration auxiliary circuit 101 in the collocation controller 100 produces the running of CLK clock signal for the clock pulse acquisition circuit 102 of low speed controller 100 inside with collaborative vibration, for example, the CLK clock signal is four times of sampling frequencies of 6M hertz (Hz), perhaps, also can be by the quartz (controlled) oscillator 1.5MHz frequency of vibrating, come frequency multiplication to go out this sampling frequency by phase-locked loop (phase lock loop is called for short PLL) again; Pass and receive circuit (Tranceiver) 104 in order to couple the USB port of host side (host), pass and receive circuit 104 in order to pass receipts differential (differential) signal D+/D-, or claim a data stream, the RXD+ that spues when receiving the differential wave D+/D-that transmits by host side, the RXD data-signal of RXD-differential data signal and nrzi encoding is given serial interface engine (serial interface engine, be called for short SIE) 106, also the RXD data-signal of nrzi encoding is given simultaneously clock pulse acquisition circuit 102, clock pulse acquisition circuit 102 utilize the CLK clock signal come to the RXD data-signal carry out oversampling (oversampling) and capture be implied in differential wave 1.5MHz frequency SIECLK clock signal for serial interface engine 106 uses, according to the SIECLK clock signal RXD data-signal correctly is reduced into digital data signal; Otherwise TXD+, TXD-differential data signal that biography receipts circuit 104 reception serial interface engine 106 transmit are driven to host side, and serial interface engine 106 is responsible for the runnings of control biography receipts circuit 104; Plug-in quartz (controlled) oscillator or ceramic resonator are considerable burdens for the manufacturer that produces the USB mouse.

In the USB specification standard various package forms, in order to the execution of various transaction (transaction); The data layout of Fig. 2 show tags package (token packet) 200, marking package 200 has comprised PID field 220, ADDR field 240, ENDP field 240 and CRC5 field 280, typically, PID field 220 is 8 bit wides, in order to indicate the package form, package forms such as IN, OUT, SETUP for example; ADDR field 240 and ENDP field 240 are in order to indicate end-point addresses (endpoint address); CRC5 field 280 then is the Cyclical Redundancy Check sign indicating number of 5 bit wides; Therefore, host side can be by sending the action that marking package 200 tells that end points should read or write, if the transaction of writing then can be sent data packet by host side and be given end points; If the transaction of reading then can be sent data packet by end points and be given host side.

(3) summary of the invention

The method and the device that the purpose of this invention is to provide a kind of automatic tracking and compensating clock pulse frequency.

The device of automatic tracking and compensating clock pulse frequency of the present invention, a kind of device of automatic tracking and compensating clock pulse frequency is applicable to that it receives a data stream, comprises among the USB peripheral controllers: an oscillator, in order to produce a sampling clock signal; One counter and an ALU; Be characterized in also comprising: a clock pulse acquisition device, in order to produce system's clock signal according to this data stream and this sampling clock signal; One pattern acquisition device couples this clock pulse acquisition device, in order to capture a plurality of templates of this data stream according to this system's clock signal; One working storage couples this ALU and this oscillator, also this setting value is fed back to this ALU in order to temporary this setting value; Described counter couples this pattern acquisition device, produces a count value with in response to those templates in order to a length of counting this data stream according to this sampling clock signal; Described ALU couples this counter and this pattern acquisition device, in order to the setting value of videoing according to this count value and a reference value; And wherein, the frequency that this oscillator upgrades this sampling clock signal is with in response to this setting value.

To of the present invention best understanding arranged for making, below enumerate some specific embodiments now, and conjunction with figs. describes.

(4) description of drawings

Fig. 1 is the calcspar that shows existing USB controller;

Fig. 2 is the data layout of show tags package;

Fig. 3 is the automatic track frequency compensating circuit calcspar that shows according to a specific embodiment of the present invention;

Fig. 4 is the electrical communications form that shows complete marking package; And

Fig. 5 is the frequency compensated circuit calcspar that shows according to a specific embodiment of the present invention.

(5) embodiment

Fig. 3 is automatic tracking (auto-tracking) the clock pulse circuit block diagram that shows according to the USB periphery of a specific embodiment of the present invention, is particularly suitable for being implemented among the integrated circuit (IC) chip (integratedcircuit is called for short IC); Produce the CLK clock signal by oscillator 300 vibrations and give clock pulse acquisition device (clock extractor) 310, for example, this oscillator 300 can be made up of resistance and electric capacity, therefore, when producing by wafer factory, what the CLK clock signal was subjected to the processing procedure factor influences meeting drift to some extent, but can suitably compensate by automatic tracking clock pulse circuit of the present invention, this embodiment is an example with USB low speed control IC, and CLK clock signal frequency drops near 6MHz (quadruple of about work time pulse) approximately; Clock pulse acquisition device 310 gets also the clock signal SIECLK that (retrieve) is relevant to data-signal according to the RXD data-signal and the CLK clock signal of the nrzi encoding that host side transmits, and its frequency drops near the 1.5MHz approximately; Pattern acquisition device (pattern extractor) 320 picks out special pattern in the data stream that host side transmits according to the SIECLK clock signal, and this data stream can be received the RXD data-signal that circuit (not shown) be divided into RXD+, RXD-differential data signal and nrzi encoding by the biography of previous stage.

Each package that is transmitted on the USB transmission line foremost all can be by an additional synchronization field (being called for short the SYNC field), carrying out signal Synchronization in order to receiving end uses, least significant end then can add a trailer field (being called for short the EOP field), the end of transmission (EOT) of representing this package, under the general situation, the USB transmission is to be differential wave, but the EOP field then the D+ of USB transmission line and D-are driven the long low level of a bit time or even drive and surpass the long low level of a bit time, then do not drive " J " state that forms.The USB transmission time is to adopt nrzi encoding, that is, just can transition (transition) when data are 0, when being 1, data just stay in original position standard (1evel); Further, when USB transmission standard standard occurs six 1 continuously when data, just force and fill in one 0, carry out transition to force it, avoid the baseline drift effect, this is that (bit stuffing) filled in so-called position.When host side is passed to the device end marking package, pattern acquisition device 320 picks out SYNC field, PID field and EOP field according to the SIECLK clock signal, with respectively via SSYNC signal, SPID signal and SEOP signal controlling counter 330 initial, stop and reset; In this preferred embodiment, when 320 detections of pattern acquisition device put filling in place, by the SSTUFF signal CLK clock signal is suitably shielded (mask) and becomes clock signal CLK ', with the counting of being used as counter 330 with reference to clock pulse, fill the sampling counting error that is produced to eliminate the position, in this embodiment be with CLK clock signal and SSTUFF signal by one or door 340 carry out the logical OR computing and become CLK ' clock signal, during shielding CLK clock signal, the high low level that suspends the CLK clock signal changes, and the counting of time-out counter 330, no matter therefore whether marking package has the position filling all can carry out automatic tracking and compensating by the present invention.

The count results of counter 330 is given ALU 350 computing of videoing via signal 332, pattern acquisition device 320 carries out computing by observing marking package via OPREN signal activation ALU 350, for example, ALU 350 can be compared this count results and reference value V_REF, just can learn how many errors are present oscillator 300 frequencies that of shaking have, give working storage 360 with the operation result of ALU 350 via signal 358 again, working storage 360 is set via 362 pairs of oscillators 300 of signal according to this operation result, and finishes the work of automatic tracking adjustment.Generally speaking, the frequency setting of oscillator 300 is a nonlinear relationship, in this preferred embodiment, ALU 350 comprises subtracter 352, multiplier 354 and totalizer 356, to carry out simple linear mapping computing, slope is 2, also can be by finding a more approaching linear function to estimate this nonlinear relationship, therefore, the logic gate number of ALU 350 can reduce, and multiply by 2 hardware extremely is simplified, only need shift unit just can realize.And working storage 360 via signal 362 feedback adder 356 be can be provided in USB low speed control IC just begin the energising running time, provide earlier default value to oscillator 300 to produce initial vibration output frequency.

Fig. 4 shows in the USB transmission electrical communications form via the marking package 400 of nrzi encoding, it can be considered a data stream 400, comprised SYNC field 410, PID field 420, ADDR field 430, ENDP field 440, CRC5 field 450, and EOP field 460, if do not consider filler, each field is respectively 8,8,7,4,5, and 1 bit time (bit time) long, it should be noted that the USB transmission line comprises D+, D-, PWR, the GND equisignal line, D+, D-is in order to the transmission differential signal, PWR, GND can supply the electric power of the about 500mA of end points, and EOP field 460 is in the D+ of USB transmission line on electric signal, present the long low level SE0 of 1 bit time on the D-simultaneously, be not standard N RZI coding, and in fact USB specification on standard EOP field 460 should surpass or equal a bit time and gets final product.The USB low speed mentioned among the embodiment with Fig. 3 control IC is an example, and desirable CLK clock signal frequency is 6MHz, gets according to CLK clock signal and the data stream that enters that also to go out the SIECLK clock signal be 1.5MHz; Under ideal state, the rising edge of SIECLK clock signal (rising edge) will come across the middle of each bit time, therefore, when pattern acquisition device 320 is sampled to " 0 " of first nrzi encoding of SYNC field 410 according to the SIECLK clock signal, the rising edge of SIECLK clock signal should be positioned at its middle, that is the middle of " 0 " of first nrzi encoding is the counting starting point of whole marking package 400, and when see EOP field 460 low level SE0 draw the long end point of promptly regarding as of a bit time; Suppose under the situation that does not have filler, and take a sample and count that count results should be 130 (=32.5 bit time * 4) with quadruple CLK clock signal accurately.

Consider the poorest situation, if starting point and end point are offset half bit time all in the other direction, and when the filler filling took place, shielding CLK clock signal (quadruple sampling) also caused the counting error of 0.25 bit time length, and total error is:

(±) 3.85% can be considered inherent error (inherent error), and the frequency error tolerance of the low speed transmissions of USB is 1.5%, and supposes that the adjustable frequency scope of oscillator 300 is f, then:

(±)3.85％*f＜(±1.5％)*6MHz

That is (f/6MHz) * (± 3.85%) should be less than (± 1.5%), and maximum adjustable frequency range fmax is about 2.34MHz.

Suppose the embedded oscillator 300 produced by wafer factory, the influence that is subjected to the processing procedure factor drops between the 5.5MHz to 6.5MHz the possible range of CLK clock signal, and promptly Frequency Adjustable rate scope f is 1MHz, and then the inherent error of the poorest situation of correspondence is:

$(1\mathrm{MHz}/6\mathrm{MHz})*(\±3.85\%)\≅\±0.64\%$

Because the frequency error tolerable 1.5% of the low speed transmissions of USB, therefore, adjust CLK clock signal frequency later (=1.5%-0.64%) the error of still can tolerating 0.86%, that is to say, if it is in 0.86% the scope at center that CLK clock signal frequency drops on 6MHz, all can guarantee to meet the low speed transmissions specification of USB:

6MHz*(±0.86％)＝±51.6KHz

So the step frequency when adjusting (step frequency) f _StepBeing 103.2KHz, is in 0.86% the scope at center to guarantee the adjustment of CLK clock signal frequency to be returned with 6MHz, even therefore under the poorest situation, all can guarantee the normal operation of low speed USB control IC, meets the tolerable frequency error of USB low speed transmissions.Therefore, in the design process of low speed USB control IC, as long as frequency range and step frequency f when making embedded oscillator 300 and going out wafer factory _Step, just can compensate adjustment according to marking package by the specific embodiment of Fig. 3 of the present invention, and need not plug-in again quartz (controlled) oscillator.In this specific embodiment, the frequency range when embedded oscillator 300 goes out wafer factory drops between the 5.5MHz to 6.5MHz, formulates the step frequency f _StepBe 100KHz, need 100 to adjust step altogether, as long as just can provide 128 adjustment steps to satisfy design requirement by the working storage 360 of seven bit lengths.Adjusting step for these 100 can be by different resistance, the incompatible realization of capacitance group, and for example, because same naked crystalline substance (die) be when dispatching from the factory, the process conditions above it is all identical, and the ratio of resistance value just can accurately be controlled, so each step frequency f _StepJust can be very accurate.It should be noted that working storage 360 can be latch unit or trigger.

Again with reference to figure 3, it is as follows to be with low speed USB control IC that example further specifies, when just beginning the energising running, working storage 360 utilize via signal 362 provide earlier default value to oscillator 300 to produce initial vibration output frequency, if working storage 360 has 8, then the value of working storage 520 is 0 to FF (hexadecimal expression), and then preferable default value is 7F; When pattern acquisition device 320 is sampled to " 0 " of first nrzi encoding according to the SIECLK clock signal, the running of just initial counter 330; In counting process, pattern acquisition device 320 utilizes the OPREN signal with ALU 350 forbidden energy, does not operate earlier; When pattern acquisition device 320 analyzes the PID field when finding that this package is not marking package, just via SPID signal counter reset 330, and because this section period arithmetic internal logical block 350 by forbidden energy, can not have influence on previous oscillator 300 frequency of shaking and; When pattern acquisition device 320 sees that the low level SE0 of EOP field 460 has drawn a bit time length, just can be by the counting of SEOP signal terminating counter 330, utilize OPREN signal activation ALU 350 to carry out computing then with count results according to counter 330, as previously mentioned, in this specific embodiment, reference value V_REF is 130, and via the previous setting value of signal 362 references, and obtain at present preferable setting value in order to adjustment oscillator 300 to reach the purpose of automatic tracking work time pulse, wherein, whether the low level SE0 that desire is observed EOP field 460 draws a bit time length, for example, can at first see RXD+ by rising edge in the SIECLK clock signal, the RXD-differential data signal presents after the low level SE0, then sees low level SE0 once more and confirms the end point of whole counting process in its falling edge that continues (fallingedge) again.

In the above specific embodiment, be that RXD+, RXD-differential data signal are directly imported pattern acquisition device 320 as explaining orally example, be for ease of illustrating technology contents of the present invention and technological means, desire is not arrested limit category of the present invention, person skilled in the art person is when thinking and various possible variation, and escape spirit of the present invention not, for example, can utilize the RXD data-signal of nrzi encoding or take directly that RXD+, RXD-differential data signal come identification SYNC field 410 and PID field 420 or the like and during the decision counting; It should be noted that, the differentiation of marking package, can be apace by wherein " xx01 " decision, that is to say, with the sequencing on the time shaft among Fig. 4, according to the accurate value in the position of SIECLK clock signal oversampling package, whether two position PID0, the PID1 that observe the PID field judge for " 1 " reaches " 0 " whether present package is marking package in regular turn, make not accurately in the oversampling process, still can correctly determine the PID field, that is to say the present invention judges with the eigenwert of each field whether present package is marking package; The starting point of counter also can become " 1 " of nrzi encoding and activates from " J " state-transition by detecting RXD+, RXD-differential data signal among Fig. 4; Perhaps can also change frequency multiplication relation and lifting frequency relation between CLK clock signal and the CLK ' clock signal; The suitably front and back change of the starting point of counting and end point, the just accuracy of meeting affects adjustment.According to announcement of the present invention, even the frequency shift (FS) of CLK clock signal reaches 20%, as long as embedded oscillator 300 provides suitable step frequency f in the design phase _StepAnd enough steps adjustment quantity, just can give automatic tracking and compensating; And, the present invention can also be applied to USB peripheral unit and high speed USB peripheral unit at full speed.

On the other hand, with the USB mouse is example, external environment when the portable apparatus of this class uses can usually change, for example, temperature variation of the temperature of hand, the temperature of field of employment and control IC itself or the like all can cause the drift of oscillator frequency, automatic tracking circuit according to the present invention can utilize each marking package to carry out frequency compensation, more increases its stability.

Perhaps, in another specific embodiment of the present invention, if worrying that the frequency shift (FS) of CLK clock signal is excessive, the producer can't compensate, the present invention also further discloses frequency compensated circuit and method, in order to provide, allow the automatic track frequency compensating circuit of Fig. 3 carry out automatic tracking and compensating again with earlier that the CLK clock signal frequency adjustment of USB control chip is the extremely satisfied scope of manual type.Fig. 5 shows a frequency compensation initialization circuit 500, for example can be implemented in the USB control chip, and compensation making circuit 500 comprises electronics can wipe programmable storage 510, working storage 520, traffic pilot 530 and oscillator 540; When frequency compensation initialization circuit 500 in testing factory's stage, can utilize test_mode_sel pin position to enter test pattern, the tester can utilize working storage 520 to pour into frequency setting data from the outside with attempting, traffic pilot 530 corresponding test patterns and utilize signal 502 that the frequency setting datas in this working storage 520 are offered oscillator 540, oscillator 540 is exported the CLK clock signal according to this frequency setting data, whether the frequency that the tester observes this CLK clock signal meets demand, if not, then utilize working storage 520 to re-enter a class frequency setting data from the outside, to repeat above step, till the frequency of CLK clock signal met demand, the frequency setting data that the tester meets this demand again passed through CLK _DataThe formal burned electronics in clock signal pin position and Data data pin position can be erased among the programmable memory 510, when this frequency compensation initialization circuit 500 in the formal running stage, oscillator 540 just can meet the frequency of the frequency setting data output CLK clock signal of demand according to this; In this embodiment, working storage 520 has the output of n position, if n is 8, then the value of working storage 520 is 0 to FF (hexadecimal expression); Signal 362 expressions have the m position from Fig. 3 working storage 360, in test pattern, oscillator 540 utilizes working storage 360 and setting data that working storage 520 provided to operate and produces the CLK clock signal, preferably, suppose that m, n are all 10, oscillator 540 can be with working storage 360 and overlapping two position of setting data that working storage 520 provided and is become two hyte length and operate, and makes automatic track frequency compensating circuit can partly compensate previous artificial setting; Above circuit is for convenience of description, person skilled in the art person is when thinking and various possible variation, and escape spirit of the present invention not, for example, in test pattern, the mode that the tester utilizes working storage 520 to pour into frequency setting data from the outside just can utilize traffic pilot to share CLK _DataAnd Data pin position, perhaps, input and serial input is all possible variation side by side.

Indulge the above, the present invention discloses a kind of device of automatic tracking and compensating clock pulse frequency, is applicable to that among the USB peripheral controllers, it receives a data stream, and the device of tracking and compensating clock pulse frequency comprises an oscillator automatically, in order to produce a sampling clock signal; One clock pulse acquisition device is in order to produce system's clock signal according to this data stream and the clock signal of should taking a sample; One pattern acquisition device couples the clock pulse acquisition device, in order to a plurality of templates according to system's clock signal acquisition data stream; One counter couples the pattern acquisition device, produces count value with in response to this template in order to the length of counting this data stream according to this sampling clock signal; One ALU couples counter and pattern acquisition device, in order to the setting value of videoing according to this count value and reference value; And a working storage, couple ALU and oscillator, in order to temporary this setting value and this setting value is fed back to this ALU; Make frequency that this oscillator upgrades the sampling clock signal with in response to this setting value.

The present invention also discloses a kind of method of automatic tracking and compensating clock pulse frequency, be applicable to the USB peripheral controllers, it receives a data stream, comprise the following step: produce the clock signal and the sampling clock signal that are relevant to this data stream, have first frequency and second frequency respectively, and second frequency is higher than first frequency; According to a plurality of templates in this first frequency acquisition data stream; Produce count value with in response to this template according to the length of sampling clock signal enumeration data stream; According to count value and the reference value setting value of videoing; And according to this setting value compensation first frequency.

The present invention further discloses a kind of clock pulse frequency compensation device, comprise in order to the oscillator that produces clock signal, non-volatility memorizer, working storage, traffic pilot and; Wherein this traffic pilot has two input ends and an output terminal, and input end couples non-volatility memorizer and working storage respectively, and output terminal couples oscillator, in order to select the setting value of an output n position among both from non-volatility memorizer and working storage; And this frequency compensated circuit couples this oscillator, and in order to produce the setting value of m position according to a marking package, wherein, m, n are positive integer, and this oscillator is adjusted the frequency of clock signal according to the setting value of the setting value of this n position and this m position.

The explanation of the above specific embodiment that discloses and graphic is for ease of illustrating technology contents of the present invention and technological means, and desire is arrested limit category of the present invention; For example, it should be noted that EEPROM can be integrated among the controller itself in the circuit block diagram of Fig. 3 and Fig. 4 demonstration.Every all changes of making at structural detail of the present invention, or the equivalent substitution of assembly, displacement, when not breaking away from invention spirit of the present invention and category, its scope will be defined by following claims.

Claims (8)

1. the device of an automatic tracking and compensating clock pulse frequency is applicable to that it receives a data stream, comprises among the USB peripheral controllers:

One oscillator is in order to produce a sampling clock signal; One counter and an ALU;

It is characterized in that also comprising:

One clock pulse acquisition device is in order to produce system's clock signal according to this data stream and this sampling clock signal;

One pattern acquisition device couples this clock pulse acquisition device, in order to capture a plurality of templates of this data stream according to this system's clock signal;

One working storage couples this ALU and this oscillator, also this setting value is fed back to this ALU in order to temporary this setting value;

Described counter couples this pattern acquisition device, produces a count value with in response to those templates in order to a length of counting this data stream according to this sampling clock signal;

Described ALU couples this counter and this pattern acquisition device, in order to the setting value of videoing according to this count value and a reference value; And

Wherein, this oscillator frequency of upgrading this sampling clock signal is with in response to this setting value.

2. device as claimed in claim 1 is characterized in that, this working storage is to be a latch unit.

3. device as claimed in claim 1 is characterized in that, this working storage is to be a trigger.

4. device as claimed in claim 1 is characterized in that, this oscillator comprises resistance and an electric capacity.

5. device as claimed in claim 1, it is characterized in that, also comprise a logic gate, have two input ends and an output terminal, this input end couples this sampling clock signal and this pattern acquisition device respectively, optionally shielding this sampling clock signal, and this output terminal couples this counter, and the length that makes this counter count this data stream according to this sampling clock signal that is optionally shielded produces this count value with in response to this template.

6. device as claimed in claim 5 is characterized in that, this pattern acquisition device shields this sampling clock signal by a filling of this data stream of identification, to suspend this count value.

7. device as claimed in claim 1 is characterized in that, this ALU comprises a subtracter, a shift unit and a totalizer, to carry out a linear mapping computing.

8. the method for an automatic tracking and compensating clock pulse frequency is applicable to a USB peripheral controllers, and it receives a data stream, comprises the following step:

Generation one is relevant to the clock signal and a sampling clock signal of this data stream, have a first frequency and a second frequency respectively, and this second frequency is to be higher than this first frequency;

Capture a plurality of templates in this data stream according to this first frequency;

A length of counting this data stream according to this sampling clock signal produces a count value with in response to this template;

According to this count value and the reference value setting value of videoing; And

Compensate this first frequency according to this setting value.

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