CN1217336C - Method for recovering digital data by using low sampling frequency and related devices - Google Patents
Method for recovering digital data by using low sampling frequency and related devices Download PDFInfo
- Publication number
- CN1217336C CN1217336C CN 02101519 CN02101519A CN1217336C CN 1217336 C CN1217336 C CN 1217336C CN 02101519 CN02101519 CN 02101519 CN 02101519 A CN02101519 A CN 02101519A CN 1217336 C CN1217336 C CN 1217336C
- Authority
- CN
- China
- Prior art keywords
- data
- input signal
- frequency
- control word
- sample period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The present invention provides a data recovery method and an associated circuit thereof, which is used for recovering digital data from an input signal. The input signal expresses the digital data by corresponding to periodical amplitudes of multiple digital data. In the method, multiple control words which are respectively used for estimating the phase difference of a sampling period and the data periods are calculated in the sampling period; according to the control words, and the amplitudes of the input signal in each sampling period, the digital data is recovered, wherein the control words in one sampling period realize that the sampling frequency corresponding to the sampling period is lower than the corresponding frequency of the data period.
Description
Technical field
The present invention provides method and the relevant digital circuit that place's data are recovered, and refers to that especially a kind of sampling frequency is lower than the data reconstruction method and the interlock circuit of data clock pulsed frequency.
Background technology
Along with the progress of electronic information science and technology,, can make abundant information, knowledge be able to correctly propagate fast and exchange through numerical data with electronic signal transmission.For instance, in computer system, be recorded in after data in the CD (digital versatile disc DVD for example says so) read the numerical data that is converted to electronic signal with CD player, just can allow the user handle, integrate, use data in the CD further.Each unit in the computer system (Winchester disk drive of for example saying so via south bridge circuit to central processing unit) also is to see through bus to transmit numerical data with electronic signal.In addition, by the numerical data of transmitting in communication system or the networking, the computer system that is distributed in various places also is able to exchange of information, pass-along message.
Please refer to Fig. 1.Fig. 1 is the synoptic diagram that the original signal 10 of an electronic form is used for carrying the waveform correlation sequential of (carry) numerical data 14; The transverse axis of Fig. 1 is the time.Original signal 10 can be by optical disc machine pick-up head by the original signal that reads out on the CD, or the electronic signal of transmitting in bus, communication system or the networking.Original signal 10 is with its amplitude of wave form after ovennodulation, and cooperates a data clock pulse 12, represents its numerical data that carries 14.Data clock pulse 12 has the cycle data that a plurality of time spans are fixed as T0, and each cycle data is corresponding to the position in the numerical data 14; And the content of this position is promptly decided by the size of this original signal 10 corresponding to the amplitude of wave form of this cycle data.Further specify with the example among Fig. 1, the pulse wave rising edge in each cycle data in the data clock pulse 12 betides time point t1, t2, t3 or the like constantly; Original signal 10 whether greater than a fixing fiduciary level L0 (being zero level usually), has just been represented corresponding numerical data of this moment at these amplitudes of wave form constantly.For instance, at time point t1, the amplitude of wave form overgauge level L0 of original signal 10, just representing the position D1 content in the numerical data is 1.At time point t2, the amplitude of wave form of original signal 10 is overgauge level L0 still, so the content of the corresponding position D2 of time point t2 still is 1.Arrived time point t6, the amplitude of wave form of original signal 10 becomes and is lower than fiduciary level L0, so the position D6 of time point t6 correspondence also becomes 0.In like manner, by the amplitude of wave form of original signal 10 at time point t8, the position D8 that just can know time point t8 correspondence by inference is 0.So, cooperate data clock pulse 12, original signal 10 just can have been represented the every content of numerical data 14 with the size of its amplitude of wave form.
Yet, when reality is implemented utilization, only have the original signal of the numerical data of carrying can supply to utilize, and do not have corresponding data clock pulse.For instance, CD player only has original signal by the data that read out on the CD, does not comprise the data clock pulse.In like manner, in communication system, also only original signal can be transmitted, the data clock pulse can be do not transmitted.Thus, read numerical data, just must use data recovery circuit by correctly separating in the original signal.Please refer to Fig. 2.Fig. 2 is the circuit block diagram of an existing digital data restoring circuit 20.Data recovery circuit 20 is provided with a sampler 22, interpolater (interpolator) 24, control word computing unit 26 and data circuit 28.Because data recovery circuit 20 is digital circuit, so input signal 16 (just original signal 10) can become the sampled signal 23 of discrete time earlier through the sampling of sampler 22; And the sampling frequency of sampler 18 is then decided by sampling clock pulse 18.Since sampling clock pulse 18 can't be corresponding with input signal 16 (being original signal 10) data clock impulsive synchronization (comprising that frequency and phase place can be not synchronously), sampled signal 23 must be calculated in input signal 16 originally numerical data corresponding to the data clock pulse in the mode of weighting interpolation by interpolater 24, and is output as output signal 25.By input signal 16 recover the output signal 25 of coming out just can and the data clock impulsive synchronization of original signal script, represent the numerical data that carries in the original signal.Just can be via data circuit 28 (for example being comparer or chopper) by obtaining the numerical data in input signal originally in the output signal 25.On the other hand, be used for interpolation to recover the interpolater 24 of output signal 25, control the calculating of its interpolation with control word 30; Control word 30 itself then is to be tried to achieve according to the feedback of output signal 25 by control word computing unit 26.
As for the situation of available data restoring circuit 20 work, please further with reference to figure 3.The waveform sequential chart of each coherent signal when Fig. 3 is data recovery circuit 20 runnings; The transverse axis of Fig. 3 is the time.Uppermost waveform is the corresponding originally data clock pulse 12 of numerical data that input signal 26 carries in Fig. 3.But just cross as previously discussed, data recovery circuit 20 must be under the situation that does not have data clock pulse 12, by directly recovering the numerical data that it carries in the input signal 16.The waveform of input signal 16 is promptly represented with dotted line in Fig. 3.As shown in Figure 3, the sampling clock pulse among Fig. 2 18 has a plurality of cycles and is fixed as sample period (so corresponding sampling frequency be 1/Tps) of Tps; Each sample period corresponding to time point ta1, ta2 or the like constantly.Under the triggering of sampling clock pulse 18 control, sampler 22 can become sampled signal 23 with input signal 16 samplings, as among Fig. 3 with solid vertical line and the represented discrete-time signal of hollow initial point.Because data recovery circuit 20 does not have data clock pulse 12 as reference, sampling clock pulse 18 can be not synchronous with data clock pulse 12 yet.And the function of interpolater 24 reverts to output signal 25 with sampled signal 23 interpolation again exactly; And output signal 25 just as among Fig. 3 with vertical dotted line and the represented discrete-time signal of black circle.Each discrete time point (being time point t1, t2 or the like) that please notes output signal 15 is synchronous with data clock pulse 12.Utilize output signal 25, data circuit 28 just can obtain being carried in the numerical data (as the explanation among Fig. 1) in the input signal 16.
In order correctly to recover output signal 25 by sampled signal 23, interpolater 24 must utilize control word 30 to be used as parameter, controls the process of interpolation.In the prior art, have the control word of a correspondence in each sample period; Each control word is used for estimating corresponding sample period and the phase differential between immediate cycle data (being exactly the mistiming in the equivalence).Though data recovery circuit 20 can't be obtained original data clock pulse 12, but control word computing unit 26 still can utilize the feedback of output signal 25 and with phase error detection (phase error detection) and the phase differential during adjusting (OSR adjustment) and estimating sampling clock pulse 18 and 12 corresponding weeks of data clock pulse, and tries to achieve the control word of each sample period of correspondence; The details of this technology has been well known to those of ordinary skill in the art, repeats no more in this.Control word computing unit 26 result calculated, just as shown in Figure 3; Control word mp1 is corresponding to the sample period of time point ta1, promptly is the phase differential that is used for estimating between the cycle data of this sample period and time point t1.In like manner, control word mp2 is used for representing the phase differential between the cycle data of the sample period of time point ta2 and time point t2; In time point ta4, the cycle data near the corresponding sample cycle is the cycle data of time point t3, so control word mp4 is the phase differential that is used for putting estimated time between the cycle data of the sample period of ta4 and time point t3.
Wherein y (t1) represents the amplitude of wave form of output signal 25 at time point t1; (then represent a default weighting function (weighting function), for example be sinc function (being defined as sinc (x)=sin (π x)/(π x)) etc. to w; X (then represents the amplitude of wave form of sampled signal 23; N1, N2 are suitable integer, represent the bound of summation (summation).In other words, output signal 25 is in the value of time point t1, can be multiplied by weighting w (mp1) in the value (being x (ta1)) of time point ta1 by sampled signal 23, add that sampled signal 23 is multiplied by weighting w (mp1-Tps) in the value (being x (ta1+Tps)) of time point ta2, adds that sampled signal 23 calculates at value (x (ta1+2Tps) is multiplied by weighting) w (mp1-2Tps) of time point ta3 or the like and gets.In like manner, the ta1 in the following formula is changed to ta2, mp1 is changed to mp2, just can obtain the value of output signal 25 at time point t2.According to above-mentioned mode, interpolater 24 just can be calculated output signal 25 by sampled signal 23.
Above-mentioned prior art can realize with digital circuit, can utilize the easy modularization of digital circuit, manufacture and design consumption or the like the advantage that all has certain standard and can reduce time resource.Yet, in the prior art, owing to only estimated a control word in a sample period, and control word is the phase differential that is used for estimating between a sample period and immediate cycle data, and this just represents time T ps of sample period continuity must be than the time T 0 short (or equating) of cycle data continuity.If the sample period Tps length more next than a cycle data T0 will be corresponding to more than one cycle data in the sample period; And control word only can estimate the amplitude of output signal 25 corresponding cycle datas, and this can make the excessive data cycle corresponding in this sample period not have corresponding control word.In other words, under above-mentioned situation, interpolater 24 of the prior art can't be intactly recovers out with the amplitude of wave form of corresponding each cycle data in the output signal 25.
Because above-mentioned reason, the sample period must be smaller or equal to cycle data in the prior art; That is to say the height that the sampling frequency of sample period correspondence must be more next than the frequency of cycle data correspondence.Because numerical data zero access transmission requirements, cycle data is also shorter and shorter, and the frequency of cycle data correspondence is also more and more higher.Accordingly, in the prior art, the sampling frequency also frequency than cycle data correspondence is higher, and data recovery circuit of the prior art thus will be subjected to the spinoff of many high frequencies running, similarly is that high-frequency circuit is subject to electromagnetic interference (EMI), is subject to the ghost effect influence running of circuit layout.And high-frequency circuit also must use than complex circuit design, increases the cost that the prior art design is manufactured.
Summary of the invention
Therefore, fundamental purpose of the present invention is to provide a kind of data recovery circuit that can operate with the sampling frequency of low frequency, to solve the above-mentioned shortcoming of prior art.
According to one aspect of the present invention, provide a kind of data reconstruction method, with the numerical data of recovering a correspondence in the waveform of cause one input signal; This numerical data is and a data clock impulsive synchronization; Have a plurality of cycle datas in this data clock pulse, and this input signal is so that the amplitude of wave form in should cycle data is represented this numerical data; This method includes: set one and have the fixing sampling clock pulse of sampling frequency, have a plurality of sample periods in this sampling clock pulse; In each sample period, calculate at least one pair of control word of answering (control word); Each control word is used for estimating the phase differential of this sample period and this cycle data corresponding to a cycle data; And calculate the amplitude of wave form of corresponding each cycle data of this input signal according to this control word and the amplitude of wave form of this corresponding each sample period of input signal, to recover this numerical data; Wherein this sampling frequency is between the frequency of the essence highest frequency of the frequency band of this waveform input signal and this data clock pulse; Make when the frequency band of this waveform input signal is lower than the frequency of this data clock pulse, can calculate the control word of a plurality of correspondences in each sample period, and this sampling frequency is lower than the frequency of this data clock pulse.
According to another aspect of the present invention, provide a kind of data recovery circuit, with the numerical data of recovering a correspondence in the waveform of cause one input signal; This numerical data is and a data clock impulsive synchronization; Have a plurality of cycle datas in this data clock pulse, and this input signal is so that the amplitude of wave form in should cycle data is represented this numerical data; This data recovery circuit includes: a sampler, be used for measuring and export this input signal corresponding to the amplitudes of wave form of a plurality of sample periods, and time span that wherein should the sample period is for fixing and corresponding to a sampling frequency; One computing module is used for calculating at least one pair of control word of answering (control word) in each sample period; Each control word is used for estimating the phase differential of this sample period and this cycle data corresponding to a cycle data; And at least one interpolater, each interpolater is corresponding to a control word, is used for calculating according to this corresponding control word and the output of this sampler the amplitude of wave form of corresponding each cycle data of this input signal, to recover this numerical data; Wherein this sampling frequency is between the frequency of the essence highest frequency of the frequency band of this waveform input signal and this data clock pulse; Make that this computing module can calculate the control word of a plurality of correspondences in each sample period when the frequency band of this waveform input signal is lower than the frequency of this data clock pulse, and this sampling frequency is lower than the frequency of this data clock pulse.
The present invention is under the situation that meets Nyquist (Nyquist) theorem, reasonably sampling frequency is reduced under the frequency of cycle data correspondence, and in each sample period, estimate the control word of a plurality of correspondences, represent a plurality of cycle datas that a sample period is corresponded to.According to a plurality of control words of a sample period, just can calculate the amplitude of wave form of output signal corresponding to the plural number sample period.Under the situation that does not influence the data recovery, the frequency of the present invention's running also is minimized, and the multiple spinoff that high-frequency circuit produced of need not worrying also needn't realize with expensive complicated high-frequency circuit especially, can not only accelerate to research and develop the process of manufacturing, also can reduce cost.
Description of drawings
Fig. 1 carries the waveform sequential synoptic diagram of numerical data for typical original signal.
Fig. 2 is the functional block diagram of an available data restoring circuit.
Fig. 3 is the waveform sequential chart of data recovery circuit each coherent signal of when running among Fig. 2.
Fig. 4 is the synoptic diagram of each coherent signal frequency spectrum in the data recovery procedure.
Fig. 5 is the functional block diagram of data recovery circuit of the present invention.
Fig. 6 is the waveform sequential chart of each coherent signal when data recovery circuit operates among Fig. 5.
Embodiment
Please refer to Fig. 4.Fig. 4 is the spectrum diagram of each coherent signal in the data recovery procedure; The transverse axis of Fig. 4 is that frequency, the longitudinal axis are frequency domain components.Wherein carry the original signal of numerical data, the frequency spectrum of its waveform is shown in the frequency spectrum 10f among Fig. 4; Its frequency span is frequency band BW, and substantial highest frequency is frequency f c.Numerical data in the original signal, the pairing frequency of its cycle data then are frequency f d.As shown in Figure 1, original signal is after the process coded modulation in fact, and it is slow that its wave form varies can be come than the variation of data clock pulse; Between the time point t1 and t2 of picture in Fig. 1, the variation of one-period has been finished in the data clock pulse, but the waveform of original signal 10 just gently rises in fact; This frequency band BW that just represents original signal can be far below the frequency f d of cycle data correspondence.And according to Nyquist's theorem (or taking by weighing the sample theorem), and can recover this signal in the sampling by a signal, the used frequency of taking a sample is greater than the twice of this signal frequency range at least.As shown in Figure 4, the minimum sampling frequency that on behalf of Nyquist's theorem, frequency f N promptly predict, it is the twice of frequency f c.Even so, in practical application, frequency f N still is less than the frequency f d of cycle data correspondence.In the prior art, sampler is subjected to the sampling frequency of sampling clock pulse control must be greater than the frequency f d of cycle data correspondence; Frequency f ps among Fig. 4 just represents the sampling frequency that must use in the prior art.Yet, and can correctly recover output signal by interpolation in the sampled signal, the frequency f N that sampling frequency only will be higher than Nyquist's theorem gets final product, and need not be higher than the frequency f d of cycle data correspondence.The present invention promptly utilizes this principle, employed sampling frequency fs among the present invention (the corresponding sample period is Ts=1/fs) is set between frequency f N and the frequency f d, correctly interpolation goes out output signal, makes the sampling clock pulse and relevant high-frequency circuit that need not use special high frequency among the present invention again.
Please refer to Fig. 5; Fig. 5 is the functional block diagram of data recovery circuit 40 1 embodiment among the present invention.The purpose of data recovery circuit 40 is under the situation that does not have the related data time clock, recovers the numerical data that carries in the input signal 36.Be provided with a sampler 42, one first interpolater 44A, one second interpolater 44B, a data circuit 48, a computing module 46 and a data buffer unit (buffer) 54 in the data recovery circuit 40.In the embodiment of Fig. 5, be provided with one first control word computing unit 50A and one second control word computing unit 50B in the computing module 46.After the input signal 36 that carries numerical data inputs to data recovery circuit 40, can it be sampled as the sampled signal 43 of discrete time by sampler 42; The sampling frequency of sampler 42 then is subjected to sampling clock pulse 38 controls.Next the first interpolater 44A and the second interpolater 44B just can calculate the result of interpolation respectively individually according to sampled signal 43 in the mode of weighting interpolation, transfer to data buffer unit 54 again.The interpolation result that the data buffer unit 54 meeting integration first interpolater 44A and the second interpolater 44B calculate produces output signal 45.According to output signal 45, data circuit 48 just can correctly be separated and read the numerical data that carries in the input signal 36.
Though the operative scenario of above data recovery circuit of the present invention 40 is similar to existing data recovery circuit 20, the present invention is different with the prior art maximum, is the relevant function mode of interpolation.In the prior art, interpolater 24 can calculate the amplitude of wave form in a corresponding data cycle in the output signal 25 according to a control word 30 in each sample period Tps.A plurality of interpolaters among the present invention then can be respectively according to a plurality of different control words in each sample period Tps, to calculate the amplitude of wave form of corresponding a plurality of cycle datas in the output signal 45.Shown in the embodiment among Fig. 5, the first control word computing unit 50A of computing module 46 and the second control word computing unit 50B can produce the first control word 52A and the second control word 52B according to the feedback of output signal 45 respectively.In same sample period Ts, the first interpolater 44A can produce the amplitude of wave form of output signal 45 corresponding cycle datas according to the first control word 52A; The second interpolater 44B then can produce the amplitude of wave form of output signal 45 corresponding another cycle datas according to the second control word 52B, through the buffered of data buffer unit 54, interpolater 44 just can utilize two control words to calculate the amplitude of wave form of output signal 45 corresponding to two data cycles in a sample period.Mode and prior art as for the first control word computing unit 50A and the second control word computing unit 50B calculation control word are similar, not hindering under the disclosed situation of the technology of the present invention, repeat no more.
For further specifying the principle of the present invention's running, please further with reference to figure 6.Fig. 6 is the waveform sequential chart of the present invention's each coherent signal running during data recovery circuit 40 runnings of Fig. 5; The transverse axis of Fig. 6 is the time.For convenience compared with the prior art, hypothesis input signal 36 is identical with input signal 16 (seeing Fig. 2,3) among Fig. 6, all is to cooperate data clock pulse 12 (cycle data is T0) to carry the raw data 10 of numerical data; The waveform of dotted line is input signal 36 among Fig. 6.Under the situation that does not have data clock pulse 12 can supply to utilize, sampler 42 of the present invention can be taken a sample to input signal 36 according to the control triggering of sampling clock pulse 38 (sample period is Ts) and be produced sampled signal 43.Promptly represent the sampled signal amplitude of wave form of 43 corresponding each sample periods (in time point ts1, ts2, ts3 or the like) among Fig. 6 with crossed-circle and solid line.Cross as previously discussed, the sampling frequency fs of sampling clock pulse 38 can be less than the frequency f d of data clock pulse 12 correspondences among the present invention, and therefore the time span of a sample period Ts can be greater than the time span of a data period T 0; In other words, a sample period can correspond to and surpass one cycle data.Corresponding above-mentioned situation, the present invention can calculate a plurality of control words in each sample period and estimate phase differential (being exactly the mistiming in the equivalence) between a sample period and corresponding a plurality of cycle datas.As shown in Figure 6, corresponding to the sample period of time point ts1, the computing module 46 among the present invention can calculate the first control word m1a and the second control word m1b, is used for estimating the phase differential between the cycle data of this sample period and time point t1, t2 respectively.According to the first control word m1a, the first interpolater 44A just can interpolation go out the amplitude of wave form of output signal 45 at time point t1; The second interpolater 44B then can calculate the amplitude of wave form of output signal 45 in time point t2 according to the second control word m1b.In like manner, corresponding to the sample period of time point ts2, then there are the first control word m2a and the second control word m2b to estimate phase differential between the cycle data of this sample period and time point t3, t4 respectively.Arrived the sample period of time point ts5, the first control word m5a of its correspondence and the second control word m5b estimate the phase differential between two control cycles of this sample period and time point t8, t9 respectively; In the sample period of time point ts6, the first control word m6a and the second control word m6b then estimate the phase differential between two control cycles of this sample period and time point t9, t10.Can find that at this two control word m5b, m6a can be used to the amplitude of wave form of estimated output signal 45 corresponding time point t9; In other words, output signal 45 can be calculated according to control word m5b by the second interpolation counter 44B at the amplitude of wave form of time point t9, also can calculate according to control word m6a with the first interpolation counter 44A.In such cases, data buffer unit 54 will determine which interpolation counter to offer interpolater 44 with, to obtain the amplitude of wave form of output signal 45 corresponding to time point t9.According to the present invention in a sample period corresponding a plurality of control words, a plurality of interpolaters just can come interpolation to go out the amplitude of wave form of output signal 45 corresponding to each clock cycle according to a control word with sampled signal 43 respectively.
Though adopted low-frequency sampling clock pulse 38 among the present invention,, still can correctly come interpolation to go out output signal 45 according to the sampled signal 43 after the sampling according to Nyquist's theorem (seeing Fig. 4 and related description for details).Because can corresponding to, low-frequency sampling clock pulse 38 surpasses one cycle data in a sample period; So in each sample period, the present invention promptly with a plurality of control words calculate in a plurality of cycle datas corresponding to this sample period, the amplitude of wave form of output signal 45.As shown in Figure 6, can be synchronous by the discrete time output signal 45 (representing) that the first interpolater 44A, the second interpolater 44B calculate respectively and be combined to form with data clock pulse 12 with black circle and dotted line, and can correctly represent numerical data in the input signal 36.Through data circuit 48, just can separate the numerical data of reading in the input signal 36.In each sample period, calculate the method for output signal as for the first interpolater 44A, the second interpolater 44B, can be described below by numerical expression according to sampled signal 43, first control word and second control word.If will calculate the amplitude of wave form of output signal 45, then corresponding to time point t1, t2 cycle data
Wherein y (t1) represents the amplitude of wave form of output signal 45 at time point t1; Y (t2) represents the amplitude of wave form of output signal 45 at time point t2.W () then represents a default weighting function (weightingfunction); X () then represents the amplitude of wave form of sampled signal 43; N1, N2 are suitable integer, the bound of representative and number (summation).By (formula 1) as can be known, output signal 45 is at the amplitude of wave form of time point t1, can utilize the first control word m1a (because this control word is to be used for putting estimated time the sample period of ts1 and the phase differential between time point t1 cycle data), be multiplied by weighting W (m1a) in the value (being X (ts1)) of time point ts1, add that sampled signal 23 is multiplied by weighting W (m1a-Ts) in the value (being X (ts1+Ts)) of time point ts2, adds that sampled signal 23 is multiplied by weighting W (m1a-2Ts) or the like in the value (being X (ts1+2Ts)) of time point ts3 and calculates and get by sampled signal 43.And the first interpolater 44A can calculate the amplitude of wave form of output signal 45 at time point t1 with (formula 1).In like manner, the phase differential between the cycle data of the sample period of time point ts1 and time point t2 is to estimate with the second control word m1b, so the second interpolater 44B can calculate the amplitude of wave form of output signal 45 at time point t2 by (formula 2); Please note that the weighting in (formula 2) is to be controlled by the second control word m1b.By (formula 1), (formula 2) as can be known, according to resulting two control words in the same sample period, first, second interpolater just can calculate the amplitude of wave form of output signal 45 corresponding to two data cycles accordingly.So, synchronous even sampled signal 43 is failed with data clock pulse 12, but the output signal 45 that the first interpolater 44A, the second interpolater 44B calculate can and data clock pulse 12 synchronous (please refer to Fig. 6); According to output signal 45, data circuit 48 just can be read the numerical data that originally is carried in the input signal 36.Though above-mentioned discussion is at the sample period of time point ts1, by above two formulas, those of ordinary skills should be able to push away to such an extent that how fall into a trap to get it right in other sample periods and answer the amplitude of wave form of output signal easily, so repeat no more in this.As shown in Figure 6, though the present invention produces sampled signal 43 (so sampled signal 43 sampling spots are also fewer) with lower sampling frequency,, still can intactly calculate the amplitude of wave form of output signal 45 corresponding to each cycle data via above-mentioned computation process.
Generally speaking, the present invention is under the situation that meets the Nyquist theorem, reasonably sampling frequency is reduced under the frequency of cycle data correspondence, and in each sample period, estimates the control word of a plurality of correspondences, represent a plurality of cycle datas that a sample period is corresponded to.According to a plurality of control words of a sample period, just can calculate the amplitude of wave form of output signal corresponding to the plural number sample period.Relatively, prior art is only estimated a control word in a sample period, thus only can in this sample period, calculate the amplitude of wave form of the corresponding cycle data of output signal, also thus sampling frequency must be than the height of the frequency of cycle data correspondence.In comparison, the present invention not only is fit to realize with digital circuit, also can operates with the sampling frequency of low frequency.Technology of the present invention can be realized with digital logic block, just can be integrated in the digital control chip in the contemporary information systems easily, and the design of circuit, simulation and the manufacturing also can be continued to use the mode of digital circuit blocksization and be carried out.Further, under the situation that does not influence the data recovery, the frequency of the present invention's running also is minimized, the multiple spinoff that high-frequency circuit produced of need not worrying, also needn't realize with expensive complicated high-frequency circuit especially, can not only accelerate to research and develop the process of manufacturing, also can reduce cost.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (10)
1. data reconstruction method is with the numerical data of recovering a correspondence in the waveform of cause one input signal; This numerical data is and a data clock impulsive synchronization;
Have a plurality of cycle datas in this data clock pulse, and this input signal is so that the amplitude of wave form in should cycle data is represented this numerical data;
This method includes:
Set one and have the fixing sampling clock pulse of sampling frequency, have a plurality of sample periods in this sampling clock pulse;
In each sample period, calculate at least one pair of control word of answering;
Each control word is used for estimating the phase differential of this sample period and this cycle data corresponding to a cycle data; And
Calculate the amplitude of wave form of corresponding each cycle data of this input signal according to this control word and the amplitude of wave form of this corresponding each sample period of input signal, to recover this numerical data;
Wherein this sampling frequency is between the frequency of the highest frequency of the frequency band of this waveform input signal and this data clock pulse;
Make when the frequency band of this waveform input signal is lower than the frequency of this data clock pulse, can calculate the control word of a plurality of correspondences in each sample period, and this sampling frequency is lower than the frequency of this data clock pulse.
2. data reconstruction method as claimed in claim 1, wherein this control word is that amplitude of wave form according to corresponding each sample period of this input signal calculates.
3. data reconstruction method as claimed in claim 1, wherein this input signal is the data that read by a digital multi-purpose CD player.
4. data reconstruction method as claimed in claim 1, it includes in addition: this control word of numerical data correction of utilizing this to recover out.
5. data reconstruction method as claimed in claim 1, it is the amplitude of wave form that calculates corresponding each cycle data of this input signal in the mode of weighting interpolation according to these a plurality of control words and the amplitude of wave form of this corresponding each sample period of input signal.
6. data recovery circuit is with the numerical data of recovering a correspondence in the waveform of cause one input signal; This numerical data is and a data clock impulsive synchronization;
Have a plurality of cycle datas in this data clock pulse, and this input signal is so that the amplitude of wave form in should cycle data is represented this numerical data;
This data recovery circuit includes:
One sampler is used for measuring and export this input signal corresponding to the amplitudes of wave form of a plurality of sample periods, and time span that wherein should the sample period is for fixing and corresponding to a sampling frequency;
One computing module is used for calculating at least one pair of control word of answering in each sample period;
Each control word is used for estimating the phase differential of this sample period and this cycle data corresponding to a cycle data; And
At least two interpolaters, each interpolater are corresponding to a control word, are used for calculating according to this corresponding control word and the output of this sampler the amplitude of wave form of corresponding each cycle data of this input signal, to recover this numerical data;
Wherein this sampling frequency is between the frequency of the highest frequency of the frequency band of this waveform input signal and this data clock pulse;
Make that this computing module can calculate the control word of a plurality of correspondences in each sample period when the frequency band of this waveform input signal is lower than the frequency of this data clock pulse, and this sampling frequency is lower than the frequency of this data clock pulse.
7. data recovery circuit as claimed in claim 6, wherein this control word is that amplitude of wave form according to corresponding each sample period of this input signal calculates.
8. data recovery circuit as claimed in claim 6, it is applied to a digital multi-purpose CD player.
9. data recovery circuit as claimed in claim 6, wherein this computing module is to utilize this numerical data of recovering out, revises this control word.
10. data recovery circuit as claimed in claim 6, wherein this interpolater is the amplitude of wave form that calculates corresponding each cycle data of this input signal in the mode of weighting interpolation according to this corresponding control word and the amplitude of wave form of this corresponding each sample period of input signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02101519 CN1217336C (en) | 2002-01-08 | 2002-01-08 | Method for recovering digital data by using low sampling frequency and related devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02101519 CN1217336C (en) | 2002-01-08 | 2002-01-08 | Method for recovering digital data by using low sampling frequency and related devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1431659A CN1431659A (en) | 2003-07-23 |
| CN1217336C true CN1217336C (en) | 2005-08-31 |
Family
ID=4739554
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 02101519 Expired - Lifetime CN1217336C (en) | 2002-01-08 | 2002-01-08 | Method for recovering digital data by using low sampling frequency and related devices |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1217336C (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1307566C (en) * | 2003-10-29 | 2007-03-28 | 威盛电子股份有限公司 | Timing and data recovery circuit |
| CN100481236C (en) * | 2005-01-26 | 2009-04-22 | 宏阳科技股份有限公司 | Whole digital frequency/phase restoring circuit |
| TWI347092B (en) | 2006-04-11 | 2011-08-11 | Realtek Semiconductor Corp | Methods for adjusting sampling clock of sampling circuit and related apparatuses |
-
2002
- 2002-01-08 CN CN 02101519 patent/CN1217336C/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN1431659A (en) | 2003-07-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4712760B2 (en) | Method and system for efficient and accurate filtering and interpolation | |
| CN1021947C (en) | Jitter compensation circuit for processing jitter components of reproduced video signal | |
| CN101458675B (en) | Frequency synchronizing apparatus and method of general-purpose sequence bus | |
| US20060047494A1 (en) | Circuit analysis method and circuit analysis apparatus | |
| CN1579078A (en) | ZF-based adaptive asynchronous receiver | |
| CN1217336C (en) | Method for recovering digital data by using low sampling frequency and related devices | |
| Feizi et al. | Time-stampless adaptive nonuniform sampling for stochastic signals | |
| JP3790731B2 (en) | Data recovery at relatively low sampling rates using multiple interpolators | |
| Wu et al. | Y-net: A dual path model for high accuracy blind source separation | |
| JP2001136073A (en) | Compression method and device, compression and expansion system, and recording medium | |
| US20050273740A1 (en) | Program, method and apparatus for analyzing transmission signals | |
| CN1286854A (en) | Digital phase discrimination based on frequency sampling | |
| JP2013229839A (en) | Information signal processing system, information signal processing device, information signal processing circuit, and information recording medium | |
| CN114442046A (en) | Method, device, equipment and medium for generating modulation and selection separation radar waveform | |
| CN101175189B (en) | Determining oversampled data to be included in unit intervals | |
| JP4888837B2 (en) | D / A converter | |
| JP2010057174A (en) | Demodulation method and demodulator using pulse edge shift | |
| CN1109229A (en) | Asynchronous digital threshold detector for a digital data storage channel | |
| Karner et al. | Heterogeneous co-simulation platform for the efficient analysis of FlexRay-based automotive distributed embedded systems | |
| US3021062A (en) | Methods and apparatus for differentiating difunction signl trains | |
| CN100442379C (en) | Method and apparatus for detecting synchronous signal of CD reading signals | |
| CN1198281C (en) | Fetch channel device and its method | |
| JP3952534B2 (en) | Synchronous control device and recording / reproducing device | |
| JP3366288B2 (en) | Digital servo control method and digital servo device | |
| US20060122827A1 (en) | Modeling linear and non-linear system response to a pulse train |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20050831 |