CN121663757A - Charging and discharging device and electronic system - Google Patents

Charging and discharging device and electronic system

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Publication number
CN121663757A
CN121663757A CN202411248454.0A CN202411248454A CN121663757A CN 121663757 A CN121663757 A CN 121663757A CN 202411248454 A CN202411248454 A CN 202411248454A CN 121663757 A CN121663757 A CN 121663757A
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China
Prior art keywords
power
conversion circuit
output
bus
power value
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Application number
CN202411248454.0A
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Chinese (zh)
Inventor
赵东升
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN202411248454.0A priority Critical patent/CN121663757A/en
Publication of CN121663757A publication Critical patent/CN121663757A/en
Pending legal-status Critical Current

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Abstract

The application discloses a charge and discharge device and an electronic system, and relates to the technical field of electronic products. The charging and discharging device comprises a first DC-DC conversion circuit, a second DC-DC conversion circuit, an energy storage component and a controller, wherein the controller controls the first DC-DC conversion circuit to charge the energy storage component, and controls the second DC-DC conversion circuit to discharge the energy storage component. Based on the fact that the power of the direct current bus is smaller than or equal to a power threshold, the input power of the input end of the first DC-DC conversion circuit and the output power of the output end of the second DC-DC conversion circuit are controlled, when pulse power occurs to the direct current bus, extra power is supplemented to the direct current bus, the design complexity of the whole system can be reduced, and the reliability is improved. Moreover, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (such as a power grid outputting commercial power), and the reliability of the whole system is further improved.

Description

Charging and discharging device and electronic system
Technical Field
The present application relates to the field of electronic products, and in particular, to a charging and discharging device and an electronic system.
Background
The computation of processor chips (e.g., central processing units (central processing unit, CPU), artificial intelligence (ARTIFICIAL INTELLIGENCE, AI) chips, etc.) in electronic systems sometimes increases suddenly, so that the power required by the processor chips also increases suddenly, and thus the power required by the processor chips has a pulse-like characteristic. Since the power supply is to be kept continuous, the power supply is to be kept stable under the pulse characteristic of the power of the processor chip. In general, a charge and discharge device is provided in an electronic system to supplement a server with power when a pulse of power occurs. However, the current charging and discharging device is usually implemented by adopting a bidirectional direct current-direct current (Direct Curren-Direct Curren, DC-DC) conversion circuit topology, so that charging and discharging cannot be simultaneously carried out, and the charging and discharging time is not well mastered, so that the whole system is complex in design and low in reliability.
Disclosure of Invention
The embodiment of the application provides a charging and discharging device and an electronic system, which are used for simultaneously taking charge and discharge into consideration, and supplementing electricity for the electronic system when pulse occurs to power on the basis of realizing simultaneous charge and discharge, thereby reducing the design complexity of the whole system and improving the reliability.
In a first aspect, an embodiment of the present application provides a charge and discharge device, where the charge and discharge device includes a first DC-DC conversion circuit, a second DC-DC conversion circuit, an energy storage component, and a controller, where an input end of the first DC-DC conversion circuit and an output end of the second DC-DC conversion circuit are connected in parallel to a direct current bus, an output end of the first DC-DC conversion circuit and an input end of the second DC-DC conversion circuit are connected in parallel to the energy storage component, and the controller is connected to the first DC-DC conversion circuit and the second DC-DC conversion circuit, respectively.
And the controller can be used for controlling the first DC-DC conversion circuit and the second DC-DC conversion circuit to work respectively, and when the first DC-DC conversion circuit works, the voltage of the direct current bus can be output to the energy storage component after being converted, so that the energy storage component is charged. When the second DC-DC conversion circuit works, the voltage of the energy storage component can be converted and then output to the direct current bus, and the discharge of the energy storage component is controlled. Thus, the charge/discharge device can be charged and discharged simultaneously.
The controller may be further configured to compare the power of the DC bus with a power threshold during operation of the first DC-DC conversion circuit and the second DC-DC conversion circuit, and in response to the power of the DC bus being less than or equal to the power threshold, to control the input power of the input of the first DC-DC conversion circuit to decrease from the first power value to the second power value and to control the output power of the output of the second DC-DC conversion circuit to increase from the third power value to the fourth power value. And the fourth power value is larger than the second power value, so that the difference value between the fourth power value and the second power value is the power supplied to the direct current bus by the whole charging and discharging device, when pulse power appears on the direct current bus, the discharging power is higher than the charging power by limiting the charging power, the additional power is supplied to the direct current bus, the power requirement of a processor chip is met, the design complexity of the whole system can be reduced, and the reliability is improved. Moreover, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (such as a power grid outputting commercial power), and the reliability of the whole system is further improved.
In some embodiments, the value of the fourth power value minus the second power value may be correlated with the amount of change in the power of the DC bus to adjust the input power at the input of the first DC-DC conversion circuit and the output power at the output of the second DC-DC conversion circuit according to the amount of change in the power of the DC bus. For example, the difference between the value obtained by subtracting the second power value from the fourth power value and the amount of change in the power of the dc bus may be set to satisfy the threshold interval, and thus, not only the power may be supplied to the dc bus, but also the power supplied to the dc bus may be prevented from being excessive, and other devices in the dc bus or the electronic apparatus may be prevented from being damaged.
In some embodiments, the fourth power value may be made larger than the first power value, so that the difference between the fourth power value and the second power value may be further increased, which is beneficial to supplement more power for the dc bus.
In some embodiments, for the process of controlling the input power of the input terminal of the first DC-DC conversion circuit to be reduced from the first power value to the second power value, there may be the following ways:
In a first embodiment, the input power at the input of the first DC-DC conversion circuit is controlled to be gradually reduced from a first power value according to a first power adjustment step size until the input power is reduced to a second power value. Therefore, the input power of the input end of the first DC-DC conversion circuit can be gradually transited from the first power value to the second power value, abrupt change of the input power of the input end of the first DC-DC conversion circuit is reduced, the stability of the power on the direct current bus is improved, and the reliability of the whole system is improved.
The first power adjustment step may be a constant value, so that the input power of the input end of the first DC-DC conversion circuit may be reduced based on the same variation, so that the input power of the input end of the first DC-DC conversion circuit is reduced in an equal gradient, so that the reduction trend of the input power is constant, and the stability of the power on the DC bus is further improved.
For example, as the power value of the input power of the input end of the first DC-DC conversion circuit decreases, the first power adjustment step size also decreases, so that the trend of decreasing the input power of the input end of the first DC-DC conversion circuit changes from fast to slow, and the stability of the power on the DC bus is further improved.
For example, as the power value of the input power of the input end of the first DC-DC conversion circuit decreases, the first power adjustment step size increases accordingly, so that the trend of decreasing the input power of the input end of the first DC-DC conversion circuit changes from slow to fast, and on the basis of improving the stability of the power on the DC bus, the first DC-DC conversion circuit can be prevented from absorbing the power on the DC bus too much, so that the power on the DC bus can be supplied to the electric equipment more.
In a second embodiment, the input power at the input of the first DC-DC conversion circuit is controlled to jump from a first power value to a second power value. Therefore, the jump of the input power of the input end of the first DC-DC conversion circuit can be realized as soon as possible, and the excessive absorption of the power on the direct current bus by the first DC-DC conversion circuit is avoided, so that the power on the direct current bus can be supplied to electric equipment more.
In some embodiments, for controlling the output power of the output terminal of the second DC-DC conversion circuit to rise from the third power value to the fourth power value, there may be the following ways:
in a first embodiment, the output power of the output terminal of the second DC-DC conversion circuit is controlled to rise gradually from the third power value according to the second power adjustment step size until the output power rises to the fourth power value. Therefore, the output power of the output end of the second DC-DC conversion circuit can be gradually transited from the third power value to the fourth power value, abrupt change of the output power of the output end of the second DC-DC conversion circuit is reduced, the stability of the power on the DC bus is improved, and the reliability of the whole system is improved.
The second power adjustment step may be a constant value, so that the output power of the output end of the second DC-DC conversion circuit may be increased based on the same variation, so that the output power of the output end of the second DC-DC conversion circuit is increased in an equal gradient, so that the increasing trend of the input power is constant, and the stability of the power on the DC bus is further improved.
For example, as the power value of the output power of the output end of the second DC-DC conversion circuit increases, the second power adjustment step size may be reduced, so that the trend of increasing the output power of the output end of the second DC-DC conversion circuit changes from fast to slow, and the stability of the power on the DC bus is further improved.
For example, as the power value of the output power of the output end of the second DC-DC conversion circuit increases, the second power adjustment step size also increases, so that the trend of increasing the output power of the output end of the second DC-DC conversion circuit changes from slow to fast, and on the basis of improving the power stability on the DC bus, the power can be supplied to the DC bus as soon as possible, so that the power on the DC bus can be supplied to the electric equipment more.
In a second embodiment, the output power of the output terminal of the second DC-DC conversion circuit is controlled to jump from the third power value to the fourth power value. Therefore, the output power of the output end of the second DC-DC conversion circuit can jump as soon as possible, and power is supplied to the direct current bus as soon as possible, so that the power on the direct current bus can be supplied to electric equipment more.
In some embodiments, if the power of the dc bus is greater than the power threshold, it is indicated that the power of the dc bus is not pulsed or the pulsed power is terminated. Based on this, the controller is further configured to control the input power of the input terminal of the first DC-DC conversion circuit to be a first power value and control the output power of the output terminal of the second DC-DC conversion circuit to be a third power value in response to the power of the DC bus being greater than the power threshold in controlling the operation of the first DC-DC conversion circuit and the second DC-DC conversion circuit. Therefore, only the first DC-DC conversion circuit is required to be controlled to work under the same input power, and the second DC-DC conversion circuit is required to be controlled to work under the same output power, so that the control complexity can be reduced.
In some embodiments, the first DC-DC conversion circuit may boost the voltage of the direct current bus and output the boosted voltage to the energy storage component, so that the energy storage component may be charged in a boost manner.
In other embodiments, the first DC-DC conversion circuit may also buck the voltage of the DC bus and output the voltage to the energy storage component, so that the energy storage component may be charged in a buck manner.
By way of example, the first DC-DC conversion circuit may be configured as a boost (boost) circuit, a buck-boost (buck-boost) circuit, or the like. With this arrangement, a first DC-DC conversion circuit of simple structure can be realized. In practical application, the topology of the boost circuit and the buck-boost circuit is relatively mature, so that the first DC-DC conversion circuit can be relatively simple to realize, the design difficulty is reduced, and the production cost is reduced.
In some embodiments, the second DC-DC conversion circuit may buck the voltage of the energy storage component and output the buck voltage to the DC bus, so that the buck mode may be used to control the discharge of the energy storage component.
In other embodiments, the second DC-DC conversion circuit may boost the voltage of the energy storage component and output the boosted voltage to the DC bus, so as to control the discharge of the energy storage component in a boosting manner.
The second DC-DC conversion circuit may be provided as a buck (buck) circuit, a buck-boost (buck-boost) circuit, or the like, for example. With this arrangement, a second DC-DC conversion circuit of simple structure can be realized. In practical application, the topology of the buck circuit and the buck-boost circuit is relatively mature, so that the second DC-DC conversion circuit can be relatively simple to realize, the design difficulty is reduced, and the production cost is reduced.
In some embodiments, the energy storage component may be configured as a storage capacitor through which energy is carried and supplied.
In some embodiments, the energy storage component may also be configured as an energy storage battery, and the voltage across the energy storage battery is relatively stable, so that an under-voltage or over-voltage phenomenon may be avoided.
In a second aspect, the embodiment of the application also provides a charging and discharging device, which comprises a first direct current-Direct Current (DC) -DC conversion circuit, a second DC-DC conversion circuit, an energy storage component and a controller, wherein the input end of the first DC-DC conversion circuit and the output end of the second DC-DC conversion circuit are connected to a direct current bus in parallel, the output end of the first DC-DC conversion circuit and the input end of the second DC-DC conversion circuit are connected to the energy storage component in parallel, and the controller is respectively connected with the first DC-DC conversion circuit and the second DC-DC conversion circuit.
And the controller is used for respectively controlling the first DC-DC conversion circuit and the second DC-DC conversion circuit to work, and the first DC-DC conversion circuit converts the voltage of the direct current bus and outputs the converted voltage to the energy storage component to charge the energy storage component. And the second DC-DC conversion circuit is used for converting the voltage of the energy storage component and outputting the converted voltage to the direct current bus to control the discharge of the energy storage component. Thus, the charge/discharge device can be charged and discharged simultaneously.
And the controller may be further configured to control the input power of the input terminal of the first DC-DC conversion circuit to be reduced from the first power value to the second power value and the output power of the output terminal of the second DC-DC conversion circuit to be the third power value in response to the power of the DC bus being less than or equal to the power threshold in controlling the operation of the first DC-DC conversion circuit and the second DC-DC conversion circuit. And the third power value is larger than the second power value, so that the difference value between the third power value and the second power value is the power supplied to the direct current bus by the whole charging and discharging device, when pulse power appears on the direct current bus, the discharging power is higher than the charging power by limiting the charging power, the additional power is supplied to the direct current bus, the power requirement of a processor chip is met, the design complexity of the whole system can be reduced, and the reliability is improved. Moreover, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (such as a power grid outputting commercial power), and the reliability of the whole system is further improved.
In addition, the remaining structural operations of the charge-discharge device according to the embodiments in the second aspect may refer to the descriptions of the relevant structures and the operations of the embodiments in the first aspect, which are not described herein in detail. It should be noted that the various embodiments of the second aspect may also be independent of the implementation manner of the first aspect, and may also be other realizable manners, which are not limited herein.
In a third aspect, the embodiment of the application also provides a charging and discharging device, which comprises a first direct current-direct current (DC-DC) -DC conversion circuit, a second DC-DC conversion circuit, an energy storage component and a controller, wherein the input end of the first DC-DC conversion circuit and the output end of the second DC-DC conversion circuit are connected to a direct current bus in parallel, the output end of the first DC-DC conversion circuit and the input end of the second DC-DC conversion circuit are connected to the energy storage component in parallel, and the controller is respectively connected with the first DC-DC conversion circuit and the second DC-DC conversion circuit.
And the controller is used for respectively controlling the first DC-DC conversion circuit and the second DC-DC conversion circuit to work, and the first DC-DC conversion circuit converts the voltage of the direct current bus and outputs the converted voltage to the energy storage component to charge the energy storage component. And the second DC-DC conversion circuit is used for converting the voltage of the energy storage component and outputting the converted voltage to the direct current bus to control the discharge of the energy storage component. Thus, the charge/discharge device can be charged and discharged simultaneously.
And the controller may be further configured to control the input power of the input terminal of the first DC-DC conversion circuit to be a first power value and control the output power of the output terminal of the second DC-DC conversion circuit to be increased from the third power value to a fourth power value in response to the power of the DC bus being less than or equal to the power threshold in controlling the operation of the first DC-DC conversion circuit and the second DC-DC conversion circuit. And the fourth power value is larger than the first power value, so that the difference value between the fourth power value and the first power value is the power supplied to the direct current bus by the whole charging and discharging device, when pulse power appears on the direct current bus, the discharging power is higher than the charging power by limiting the charging power, the additional power is supplied to the direct current bus, the power requirement of a processor chip is met, the design complexity of the whole system can be reduced, and the reliability is improved. Moreover, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (such as a power grid outputting commercial power), and the reliability of the whole system is further improved.
In addition, the operation of the remaining structures of the charge and discharge device according to the embodiments in the third aspect may refer to the description of the related structures and operation of the embodiments in the first aspect, which is not repeated herein. It should be noted that, the various embodiments of the embodiments in the third aspect may also be independent of the implementation manner in the first aspect, and may also be other realizable manners, which are not limited herein.
In a fourth aspect, an embodiment of the present application further provides an electronic system, where the electronic system includes a power supply device, a dc bus, an electric device, and a charging and discharging device, an input end of the power supply device is configured to receive an input voltage, and an output end of the power supply device is connected to the electric device through the dc bus. The charging and discharging device is connected with the direct current bus, and the charging and discharging device is the charging and discharging device in the first aspect of the embodiment or each embodiment of the first aspect of the application, or the charging and discharging device in the second aspect of the embodiment or each embodiment of the second aspect of the embodiment of the application, or the charging and discharging device is the charging and discharging device in the third aspect of the embodiment or each embodiment of the third aspect of the application.
In addition, the technical effects of the corresponding aspects in the fourth aspect may refer to the technical effects that may be obtained by the corresponding aspects in the first aspect to the third aspect, and the details will not be repeated.
Drawings
FIG. 1 is a block diagram of an electronic system in an embodiment of the application;
fig. 2 is a schematic structural diagram of a charge-discharge device according to an embodiment of the present application;
Fig. 3a is a schematic circuit structure diagram of a boost circuit according to an embodiment of the present application;
Fig. 3b is a schematic circuit structure of a buck circuit according to an embodiment of the present application;
FIG. 3c is a schematic diagram of a buck-boost circuit according to an embodiment of the present application;
fig. 4a is a schematic circuit diagram of a charge-discharge device according to an embodiment of the application;
Fig. 4b is a schematic circuit diagram of a charge-discharge device according to an embodiment of the application;
FIG. 5a is a schematic diagram of power relationship in an embodiment of the present application;
FIG. 5b is a schematic diagram of still another relationship between power in an embodiment of the present application;
fig. 5c is a schematic diagram of still another relationship between power in an embodiment of the present application.
Reference numerals:
1-electronic system, 11-power supply equipment, 12-electric equipment, 13-charging and discharging device, 131-first DC-DC conversion circuit, 132-second DC-DC conversion circuit, 133-energy storage component, ces-storage capacitor, BA-energy storage battery, bus+ -positive DC Bus and Bus-negative DC Bus-.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings. The specific methods of operation in the method embodiments may also be applied in the device embodiments or system embodiments. In the description of the present application, "at least one" means one or more, wherein a plurality means two or more. In view of this, the term "plurality" may also be understood as "at least two" in embodiments of the present application. "and/or" describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate that there are three cases of a alone, a and B together, and B alone. The character "/", unless otherwise specified, generally indicates that the associated object is an "or" relationship. And the words "first," "second," and the like, are used solely for distinguishing between the descriptions and not necessarily for indicating or implying a relative importance, nor should it be construed as indicating or implying a sequential order. In addition, "connected" refers to electrical connection, and two electrical components may be directly connected or indirectly connected through an intermediate medium. For example, a may be directly connected to B, or indirectly connected to B through one or more other electrical components, for example, a may be directly connected to B, or directly connected to C, and C may be directly connected to B, where a and B are connected through C.
It should be noted that the same reference numerals in the drawings of the present application denote the same or similar structures, and thus a repetitive description thereof will be omitted. The words expressing the positions and directions described in the present application are described by taking the drawings as an example, but can be changed according to the needs, and all the changes are included in the protection scope of the present application. The drawings of the present application are merely schematic representations of relative positional relationships and are not intended to represent true proportions.
The charge-discharge device in the embodiment of the application can be applied to any electronic system needing DC-DC conversion. For example, the electronic system may be a data center system, and the powered device may be a server in the data center system. Or the electronic system may be a communication system, and the electric device may be a base station in the communication system. Or the electronic system can also be a vehicle-mounted system, and the electric equipment can be a vehicle-mounted power supply in the vehicle-mounted system. Of course, the electronic system may be other systems that require direct current (Direct Curren, DC) voltage conversion, which is not limited herein.
Taking an electronic system as an example of a data center system, the amount of computation of a processor chip (e.g., a central processing unit (central processing unit, CPU), an artificial intelligence (ARTIFICIAL INTELLIGENCE, AI) chip, etc.) in a server is sometimes large or small, so that the power required by the processor chip is sometimes large or small. For example, during the operation of the processor chip, the operation amount of the processor chip may suddenly increase, so that the power required by the processor chip may suddenly increase, thereby providing the pulse-type characteristic to the power required by the processor chip. In general, a power input end of the server is connected to a dc bus, and is powered by the dc bus, so that power on the dc bus is absorbed by the processor chip, and when power required by the processor chip increases suddenly, the power on the dc bus decreases suddenly, so that the power on the dc bus also has a pulse characteristic. Since the power supply is to be kept continuous, the power supply is to be kept stable under the pulse characteristic of the power of the processor chip. In addition, in order to ensure the power supply safety of the point device in the data, it is also necessary to prevent the pulse power from penetrating through the power supply device and reaching the front-stage power supply (for example, the power grid outputting the commercial power). Therefore, it is necessary to provide a charge and discharge device in a data center system based on the pulse characteristics of the power of the processor chip to supplement the power to the system when the power is pulsed, maintain the power supply stability, and prevent the pulsed power from penetrating the front-end power supply device to reach the front-end power supply (e.g., a power grid outputting the utility power). However, the existing charge-discharge device is usually implemented by adopting a bidirectional DC-DC conversion circuit, so that the charge and discharge of the device cannot be simultaneously carried out, and the charge and discharge time is not well mastered, so that the whole system is complex in design and low in reliability.
In order to solve the above problems, the embodiment of the application provides a charging and discharging device, which can simultaneously realize charging and discharging, and supplement power for a direct current bus when the power of the direct current bus is pulsed on the basis of simultaneously realizing charging and discharging, thereby reducing the design complexity of the whole system and improving the reliability. And the risk that the pulse power penetrates through the front-stage power supply equipment can be reduced, the pulse power is prevented from reaching the front-stage power supply (for example, a power grid outputting commercial power), and the reliability of the whole system is further improved.
The structure and operation of the charge and discharge device and the electronic system according to the embodiment of the present application will be described below with reference to the accompanying drawings.
Fig. 1 is a block diagram of an electronic system according to an embodiment of the present application, and referring to fig. 1, the electronic system 1 may include a power supply device 11, a dc Bus (e.g., bus+, bus-) and a powered device 12. The input end of the power supply device 11 is used for receiving input voltage, and the output end of the power supply device 11 is connected with the electric equipment 12 through a direct current Bus (e.g. bus+, bus-). The input voltage may be ac voltage of the mains supply or dc voltage output by the energy storage device, and the power supply device 11 may boost or buck the input voltage to dc voltage, and output the dc voltage to the dc Bus (e.g., bus+, bus-) to output the dc voltage to the electric device 12 through the dc Bus (e.g., bus+, bus-) to supply power to the electric device 12. Also, it will be appreciated by those skilled in the art that the hardware structure of the electronic system 1 shown in fig. 1 does not constitute a limitation of the electronic system 1, and the electronic system 1 provided by the embodiment of the present application may include more or less components than those illustrated, may combine two or more components, or may have different component configurations.
In some examples, powered device 12 may be a load, i.e., directly powered with 48V. Alternatively, powered device 12 may include a first-stage DC-DC converter, an input of which is connected to a DC Bus (e.g., bus+, bus-) and an output of which is connected to an input of a second-stage DC-DC converter, and a load. When the DC-DC converter works, the first post-stage DC-DC converter can perform voltage reduction conversion on the voltage on the DC bus to be a DC voltage and then output the DC voltage to the second post-stage DC-DC converter. The second post-stage DC-DC converter can be used for converting the received direct current voltage into direct current voltage in a step-down mode, outputting the direct current voltage to a load, namely, supplying power to the load after the 48V voltage is reduced.
In some examples, the power supply device 11 may include, but is not limited to, a power supply unit (Power supply unit, PSU). For example, a power factor corrector (Power Factor Corrector, PFC) and a front-end DC-DC converter may be provided in the power supply device 11, wherein an input of the PFC is used for receiving the input voltage, an output of the PFC is connected to an input of the front-end DC-DC converter, and an output of the front-end DC-DC converter is connected to the direct current bus. In operation, the PFC may boost the input voltage to a DC voltage (e.g., 400V, although other voltage values may be used) and output the DC voltage to the pre-DC converter. The pre-stage DC-DC converter may down-convert the received DC voltage into a DC voltage (for example, 48V, of course, other voltage values may be used) and output the DC voltage to the DC bus.
In the embodiment of the present application, with continued reference to fig. 1, the electronic system 1 may further include a charging and discharging device 13, where the charging and discharging device 13 may be connected to a dc Bus (e.g. bus+, bus "), where the dc Bus (e.g. bus+, bus-) has a positive dc Bus bus+ and a negative dc Bus-, and the positive end of the charging and discharging device 13 is connected to the positive dc Bus bus+, and the negative end of the charging and discharging device 13 is connected to the negative dc Bus-. The positive terminal of the power supply device 11 is connected to the positive dc Bus bar+, and the negative terminal of the power supply device 11 is connected to the negative dc Bus bar, that is, the power supply device 11 is connected in parallel to the charging/discharging device 13.
For example, the dc voltage output by the power supply device 11 may be 48V, that is, the power supply device 11 may convert the input voltage into the 48V dc voltage and output the 48V dc voltage to the dc bus to supply the power to the electric device. Based on this, the dc bus in the embodiment of the present application may be a 48V bus, so that the charging and discharging device in the embodiment of the present application is disposed on the 48V bus.
Fig. 2 is a schematic diagram of a charge and discharge device according to an embodiment of the present application, and referring to fig. 2, the charge and discharge device 13 according to an embodiment of the present application may include a first DC-DC conversion circuit 131, a second DC-DC conversion circuit 132, an energy storage component 133, and a controller 134. The input end of the first DC-DC conversion circuit 131 and the output end of the second DC-DC conversion circuit 132 are connected to a direct current Bus (e.g., bus+, bus-) in parallel, and the output end of the first DC-DC conversion circuit 131 and the input end of the second DC-DC conversion circuit 132 are connected to the energy storage component 133 in parallel. Illustratively, the positive terminal of the input terminal of the first DC-DC conversion circuit 131 is connected to the positive DC Bus bus+, the negative terminal of the input terminal of the first DC-DC conversion circuit 131 is connected to the negative DC Bus bus+, the positive terminal of the output terminal of the second DC-DC conversion circuit 132 is connected to the positive DC Bus bus+, the negative terminal of the output terminal of the second DC-DC conversion circuit 132 is connected to the negative DC Bus bus+, and the input terminal of the first DC-DC conversion circuit 131 is connected in parallel to the output terminal of the second DC-DC conversion circuit 132. The positive terminal of the output terminal of the first DC-DC conversion circuit 131 is connected to the positive terminal of the energy storage member 133, the negative terminal of the output terminal of the first DC-DC conversion circuit 131 is connected to the negative terminal of the energy storage member 133, the positive terminal of the input terminal of the second DC-DC conversion circuit 132 is connected to the positive terminal of the energy storage member 133, the negative terminal of the input terminal of the second DC-DC conversion circuit 132 is connected to the negative terminal of the energy storage member 133, and the output terminal of the first DC-DC conversion circuit 131 is connected in parallel to the input terminal of the second DC-DC conversion circuit 132.
The controller 134 is connected to the first DC-DC conversion circuit 131 and the second DC-DC conversion circuit 132, respectively. Illustratively, the controller 134 may be communicatively or physically coupled to the first and second DC-DC conversion circuits 131 and 132. During operation, the controller 134 may control the first DC-DC conversion circuit 131 and the second DC-DC conversion circuit 132 to operate respectively, where, during operation of the first DC-DC conversion circuit 131, the voltage of the direct current Bus (e.g. bus+, bus-) may be converted and then output to the energy storage component 133, so as to charge the energy storage component 133. When the second DC-DC conversion circuit 132 works, the voltage of the energy storage component 133 can be converted and then output to a direct current Bus (e.g. bus+, bus-) to control the discharge of the energy storage component 133. Thus, the charge/discharge device can be charged and discharged simultaneously.
In some embodiments, the first DC-DC conversion circuit 131 may boost-convert the voltage of the direct current Bus (e.g. bus+, bus-) and output the boosted voltage to the energy storage component 133, so that the energy storage component 133 may be charged in a boosting manner. In other embodiments, the first DC-DC conversion circuit 131 may also down-convert the voltage of the direct current Bus (e.g. bus+, bus-) and output the voltage to the energy storage component 133, so that the energy storage component 133 may be charged in a buck manner.
Illustratively, the first DC-DC conversion circuit 131 may be provided as a boost (boost) circuit, a buck-boost (buck-boost) circuit, or the like topology. With this arrangement, a first DC-DC conversion circuit 131 having a simple structure can be realized. In addition, in practical application, the topology of the boost circuit and the buck-boost circuit is relatively mature, so that the first DC-DC conversion circuit 131 can be relatively simple to implement, thereby reducing the design difficulty and the production cost. It should be noted that the foregoing is merely illustrative of a specific topology of the first DC-DC conversion circuit 131, and the specific topology of the first DC-DC conversion circuit 131 is not limited to the above topology provided by the embodiment of the present application, but may be other topologies known to those skilled in the art, and is not limited herein.
In some embodiments, the second DC-DC conversion circuit 132 may buck the voltage of the energy storage component 133 and output the voltage to the DC Bus (e.g., bus+, bus "), so that the voltage of the energy storage component 133 may be controlled to discharge in a buck manner. In other embodiments, the second DC-DC conversion circuit 132 may boost the voltage of the energy storage component 133 and output the boosted voltage to the DC Bus (e.g. bus+, bus "), so that the voltage of the energy storage component 133 may be controlled to discharge in a boosting manner.
Illustratively, the second DC-DC conversion circuit 132 may be configured as a buck (buck) circuit, a buck-boost (buck-boost) circuit, or the like. With this arrangement, a second DC-DC conversion circuit 132 of a simple structure can be realized. In addition, in practical application, the topology of the buck circuit and the buck-boost circuit is relatively mature, so that the second DC-DC conversion circuit 132 can be relatively simple to realize, thereby reducing the design difficulty and the production cost. It should be noted that the foregoing is merely illustrative of a specific topology of the second DC-DC conversion circuit 132, and the specific topology of the second DC-DC conversion circuit 132 is not limited to the above topology provided by the embodiment of the present application, but may be other topologies known to those skilled in the art, and is not limited herein.
Illustratively, the boost circuit has a variety of topologies, and the application is not limited to a particular form of boost circuit topology. The topology of the boost circuit is schematically illustrated below. For example, referring to fig. 3a, fig. 3a is a schematic circuit diagram of a boost circuit according to an embodiment of the present application, the boost circuit 211 includes an inductor L1 and switches S11 and S12, wherein a first end of the inductor L1 is connected to a positive end of an input terminal Vin, a second end of the inductor L1 is connected to a second end of the switch S11 and a second end of the switch S12, respectively, a first end of the switch S11 is connected to a positive end of an output terminal Vout, and a first end of the switch S12 is connected to a negative end of the output terminal Vout. In some examples, when the first DC-DC conversion circuit 131 is set as the boost circuit 211, the input Vin of the boost circuit 211 may be an input of the first DC-DC conversion circuit 131, and the output Vout of the boost circuit 211 may be an output of the first DC-DC conversion circuit 131. The controller 134 may output switching signals to the control terminals of the switches S11 and S12, respectively, and control the on and off of the switches S11 and S12 so that the boost circuit 211 performs boost conversion.
Illustratively, the buck circuit also has a variety of topologies, and the application is not limited to the particular form of buck circuit topology. The topology of the buck circuit is schematically illustrated below. For example, referring to fig. 3b, fig. 3b is a schematic circuit diagram of a buck circuit according to an embodiment of the present application, the buck circuit 212 includes an inductor L2, switches S21 and S22, wherein a first end of the switch S21 is connected to a positive end of the input terminal Vin, a first end of the switch S22 is connected to a negative end of the input terminal Vin and a negative end of the output terminal Vout, a first end of the inductor L2 is connected to a second end of the switch S21 and a second end of the switch S22, respectively, and a second end of the inductor L2 is connected to the positive end of the output terminal Vout. In some examples, when the second DC-DC conversion circuit 132 is configured as the buck circuit 212, the input Vin of the buck circuit 212 may be the input of the second DC-DC conversion circuit 132, and the output Vout of the buck circuit 212 may be the output of the second DC-DC conversion circuit 132. The controller 134 may output switching signals to the control terminals of the switches S21 and S22, respectively, and control the on/off of the switches S21 and S22 so as to enable the buck circuit 212 to implement buck conversion.
Illustratively, the buck-boost circuit also has a variety of topologies, and the application is not limited to the particular form of buck-boost circuit topology. The topology of the buck-boost circuit is schematically illustrated below. For example, referring to fig. 3c, fig. 3c is a schematic circuit diagram of a buck-boost circuit according to an embodiment of the present application, the buck-boost circuit 213 includes an inductor L3, and switches S31 and S32, wherein a first end of the switch S31 is connected to a negative terminal of the input terminal Vin, a first end of the switch S32 is connected to a positive terminal of the output terminal Vout, a first end of the inductor L3 is connected to a second end of the switch S31 and a second end of the switch S32, and a second end of the inductor L3 is connected to the positive terminal of the input terminal Vin and the negative terminal of the output terminal Vout. In some examples, when the first DC-DC conversion circuit 131 is configured as the buck-boost circuit 213, the input Vin of the buck-boost circuit 213 may be the input of the first DC-DC conversion circuit 131, and the output Vout of the buck-boost circuit 213 may be the output of the first DC-DC conversion circuit 131. The controller 134 may output switching signals to the control terminals of the switches S31 and S32, respectively, and control the on/off of the switches S31 and S32 so as to enable the buck-boost circuit 213 to perform boost conversion. In some examples, when the second DC-DC conversion circuit 132 is configured as the buck-boost circuit 213, the input Vin of the buck-boost circuit 213 may be the input of the second DC-DC conversion circuit 132, and the output Vout of the buck-boost circuit 213 may be the output of the second DC-DC conversion circuit 132. The controller 134 may output switching signals to the control terminals of the switches S21 and S22, respectively, and control the on and off of the switches S21 and S22, so as to enable the buck-boost circuit 213 to implement buck conversion.
The switch in the embodiments of the present application may be one or more of various types of switching devices such as a relay, a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), a bipolar junction transistor (bipolar junction transistor, BJT), an insulated gate bipolar transistor (insulated gate bipolar transistor, IGBT), a silicon carbide (SiC) MOSFET, a GaN semiconductor device, a schottky diode, and the like, which are not further listed in the embodiments of the present application. And, each switch may include a first end, a second end, and a control end, wherein the control end is used for controlling the on or off of the switch. When the switch is closed, current may be transferred between the first and second ends of the switch. When the switch is open, no current can be transferred between the first and second terminals of the switch. Taking a MOSFET as an example, the control terminal of the switch is the gate, the first terminal of the switch may be the source, the second terminal may be the drain, or the first terminal may be the drain, and the second terminal may be the source.
The controller 134 in embodiments of the present application may be a field programmable gate array (field programmable GATE ARRAY, FPGA), a general purpose central processing unit (central processing unit, CPU), a general purpose processor, a Digital Signal Processing (DSP), an Application Specific Integrated Circuit (ASIC), or other programmable logic device, transistor logic device, hardware component, or any combination thereof. Which may implement or perform the various exemplary logic blocks, modules and circuits described in connection with this disclosure. The controller 134 may also be a combination that performs computing functions, including, for example, one or more microprocessor combinations, a combination of a DSP and a microprocessor, etc.
It should be noted that the first DC-DC conversion circuit 131 and the second DC-DC conversion circuit 132 may be implemented with the same topology, so as to reduce the design difficulty and the production cost, and of course, in other embodiments, the first DC-DC conversion circuit 131 and the second DC-DC conversion circuit 132 may be implemented with different topologies, so as to realize diversification of the charging and discharging devices.
In the embodiment of the application, the energy storage component 133 is arranged, so that the energy storage component 133 can bear energy when the first DC-DC conversion circuit 131 works, and the energy storage component 133 can provide energy when the second DC-DC conversion circuit 132 works, thereby ensuring the working stability of the charging and discharging device and improving the reliability of the charging and discharging device.
In some embodiments, the energy storage component may be configured as a storage capacitor through which energy is carried and supplied. For example, referring to fig. 4a, fig. 4a is a schematic circuit diagram of a charge-discharge device according to an embodiment of the present application, the energy storage component 133 is configured as a storage capacitor Ces, wherein the positive end of the output end of the first DC-DC conversion circuit 131 and the positive end of the input end of the second DC-DC conversion circuit 132 are both connected to the first electrode plate of the storage capacitor Ces, and the negative end of the output end of the first DC-DC conversion circuit 131 and the negative end of the input end of the second DC-DC conversion circuit 132 are both connected to the second electrode plate of the storage capacitor Ces.
In other embodiments, the energy storage component may also be configured as an energy storage battery, and the voltage across the energy storage battery is relatively stable, so that an under-voltage or over-voltage phenomenon may be avoided. For example, referring to fig. 4b, fig. 4b is a schematic circuit diagram of a charge-discharge device according to an embodiment of the present application, wherein an energy storage component 133 is configured as an energy storage battery BA, and a positive terminal of an output terminal of a first DC-DC conversion circuit 131 and a positive terminal of an input terminal of a second DC-DC conversion circuit 132 are both connected to a positive terminal of the energy storage battery BA, and a negative terminal of the output terminal of the first DC-DC conversion circuit 131 and a negative terminal of the input terminal of the second DC-DC conversion circuit 132 are both connected to a negative terminal of the energy storage battery BA.
It should be noted that the foregoing is merely illustrative of a specific structure of the energy storage component 133, and the specific structure of the energy storage component 133 is not limited to the topology provided by the embodiments of the present application, but may be other components known to those skilled in the art, and is not limited herein.
Furthermore, fig. 2 to 4b schematically show that the positive terminal is denoted by "+" and the negative terminal is denoted by "-".
For example, with reference to fig. 5a, fig. 5a is a schematic diagram illustrating a relationship between power in an embodiment of the present application, and power on a dc bus is consumed during operation of a processor chip. In the process of the operation of the processor chip, the operation amount of the processor chip is increased suddenly, so that the power required by the processor chip is increased suddenly, and the power required by the processor chip has the pulse characteristic. Since the power on the dc bus is absorbed by the processor chip, when the power required by the processor chip increases suddenly, the power on the dc bus decreases suddenly, so that the power on the dc bus also has a pulse characteristic, that is, the power P bus of the dc bus decreases from the power value P b1 to P b2. Based on this, in the process in which the controller 134 controls the first DC-DC conversion circuit 131 and the second DC-DC conversion circuit 132 to operate, it is determined whether the power of the DC bus has been pulsed by comparing the power of the DC bus with a power threshold.
In some embodiments, if the power of the dc bus is greater than the power threshold, it is indicated that the power of the dc bus is not pulsed or the pulsed power is terminated. Based on this, the controller 134 may control the input power of the input terminal of the first DC-DC conversion circuit 131 to be the first power value in response to the power of the DC bus being greater than the power threshold, so that only the first DC-DC conversion circuit 131 needs to be kept controlled to operate at the same input power, and the control complexity may be reduced. It will be appreciated that, due to limitations of control conditions or other factors, in actual operation, there may be some deviation or error in the specific value of the input power of the first DC-DC conversion circuit 131, so that "the input power of the input terminal of the first DC-DC conversion circuit 131 is the first power value" described above may not be completely accurate, for example, the difference between the specific value of the input power of the first DC-DC conversion circuit 131 and the first power value is within the error allowable range, and the input power of the first DC-DC conversion circuit 131 may be regarded as the first power value.
In addition, the controller 134 may also control the output power of the output terminal of the second DC-DC conversion circuit 132 to be the third power value in response to the power of the DC bus being greater than the power threshold, so that only the second DC-DC conversion circuit 132 needs to be kept controlled to operate at the same output power, and the control complexity may be reduced. It is understood that, due to limitations of control conditions or other factors, in actual operation, there may be some deviation or error in the specific value of the output power of the second DC-DC conversion circuit 132, so that "the output power of the output terminal of the second DC-DC conversion circuit 132 is the third power value" described above may not be completely accurate, for example, the difference between the specific value of the output power of the second DC-DC conversion circuit 132 and the third power value is within the error allowable range, and the output power of the second DC-DC conversion circuit 132 may be regarded as the third power value.
In some embodiments, the first power value and the third power value may be the same, so that the input power and the output power of the whole charging and discharging device are the same, and further, when no pulse power occurs on the dc bus, the power on the dc bus is not consumed as much as possible, so as to maintain the working balance of the whole system and reduce the power consumption of the whole system. It is worth mentioning that due to limitations of the process conditions or other factors, in an actual process, some deviations or errors may exist, resulting in that the above-described "same" may not be exactly exact, e.g. the above-described "same" may be the same as allowed within the tolerance of the errors. Of course, "identical" may be understood as "substantially identical" or "completely identical", and thus the "identical" relationship described above is only required to substantially satisfy the above conditions, and is all included in the protection scope of the present application.
In other embodiments, the first power value may be greater than the third power value, and based on this, the input power of the whole charging and discharging device may be higher than the output power, so that when no pulse power occurs on the dc bus, the standby power consumption of the whole system is maintained by acquiring power from the dc bus, and the working balance of the whole system is maintained.
It will be appreciated that the first power value may be made smaller than the third power value without affecting the operational balance of the overall system.
In some embodiments, if the power of the dc bus is less than or equal to the power threshold, it indicates that the power of the dc bus is pulsed, and the processor chip needs to absorb more power. Based on this, the controller 134 may control the input power of the input terminal of the first DC-DC conversion circuit 131 and the output power of the output terminal of the second DC-DC conversion circuit 132 in response to the power of the DC bus being less than or equal to the power threshold, so that when the pulse power occurs on the DC bus, additional power may be supplemented to the DC bus, thereby meeting the power requirement of the processor chip, reducing the design complexity of the whole system, and improving the reliability. Moreover, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (such as a power grid outputting commercial power), and the reliability of the whole system is further improved.
For example, the power threshold may be set to a value where the power value P b1-ΔP1,ΔP1 may be zero or greater than zero. When Δp 1 is a value greater than zero, Δp 1 may approach zero, or Δp 1 may be set according to the requirements of the actual application scenario, which is not limited herein.
In the embodiment of the present application, the control process of the input power of the input terminal of the first DC-DC conversion circuit 131 and the output power of the output terminal of the second DC-DC conversion circuit 132 may have various control manners, which will be described in detail below.
The first control mode is as follows:
The magnitude of the input power of the input terminal of the first DC-DC conversion circuit 131 and the magnitude of the output power of the output terminal of the second DC-DC conversion circuit 132 are both adjusted.
Illustratively, in conjunction with fig. 5a, the controller 134 controls the input power P dc1 at the input of the first DC-DC conversion circuit 131 to be reduced from the first power value P 1 to the second power value P 2, so that the power for charging the energy storage component 133 can be reduced on the basis of the first power value P 1. And, the output power P dc2 of the output terminal of the second DC-DC conversion circuit 132 is controlled to rise from the third power value P 3 to the fourth power value P 4, so that the power discharged from the energy storage part 133 can be raised on the basis of the third power value P 3.
And by setting the fourth power value P 4 to be larger than the second power value P 2, the difference value (namely P 4-P2) between the fourth power value P 4 and the second power value P 2 is the power which is supplemented to the direct current bus by the whole charging and discharging device, so that when pulse power appears on the direct current bus, the discharging power is higher than the charging power by limiting the charging power, the additional power is supplemented to the direct current bus, the requirement of a processor chip on the power is met, the design complexity of the whole system can be reduced, and the reliability is improved. Moreover, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (such as a power grid outputting commercial power), and the reliability of the whole system is further improved.
In some embodiments, the value of fourth power value P 4 minus second power value P 2 (i.e., P 4-P2) may be correlated to the amount of change in power of the DC bus (i.e., P b1-Pb2) to adjust the input power at the input of first DC-DC conversion circuit 131 and the output power at the output of second DC-DC conversion circuit 132 according to the amount of change in power of the DC bus (i.e., P b1-Pb2). For example, the difference between the value obtained by subtracting the second power value P 2 from the fourth power value P 4 (i.e., P 4-P2) and the amount of change in the power of the dc bus (i.e., P b1-Pb2) may be set to satisfy the threshold interval [ P b1-Pb2-ΔP2,Pb1-Pb2+ΔP2 ], so that not only the dc bus may be supplemented with power, but also an excessive amount of power may be prevented from being supplemented with the dc bus, and other devices in the dc bus or the electronic apparatus may be damaged. For example, Δp 2 may be set to zero or a value greater than zero, and when Δp 2 is set to a value greater than zero, Δp 2 may be set to a value of 1, 5, 10, or the like, or Δp 2 may be made to approach zero, which is not limited herein.
In some embodiments, fourth power value P 4 may be made greater than first power value P 1, thereby further increasing the difference between fourth power value P 4 and second power value P 2 (i.e., P 4-P2) to facilitate supplementing more power to the dc bus.
In some embodiments, there may be various implementations for controlling the input power of the input terminal of the first DC-DC converting circuit 131 to be reduced from the first power value to the second power value, which will be exemplified below.
In the first embodiment, the input power of the input terminal of the first DC-DC conversion circuit 131 is controlled to be gradually reduced from the first power value P 1 in a first power adjustment step size until being reduced to the second power value P 2. For example, taking the first power adjustment step as Δp b1 as an example, the input power of the input terminal of the first DC-DC conversion circuit 131 may be controlled to be sequentially reduced in the order of P1、P1-ΔPb1、P1-2ΔPb1、P1-3ΔPb1、……P1-n*ΔPb1、P2. Therefore, the input power of the input end of the first DC-DC conversion circuit 131 can be gradually transited from the first power value P 1 to the second power value P 2, the abrupt change of the input power of the input end of the first DC-DC conversion circuit 131 is reduced, the stability of the power on the DC bus is improved, and the reliability of the whole system is improved. Wherein n may be a natural number such as 1,2,3,4, 5,6, etc., and specific numerical values of n may be determined according to requirements of actual application scenarios, which are not limited herein.
Illustratively, the first power adjustment step may be a constant value, so that the input power of the input terminal of the first DC-DC conversion circuit 131 may be reduced based on the same variation, so that the input power of the input terminal of the first DC-DC conversion circuit 131 is reduced in a gradient manner, so that the reduction trend of the input power is constant, and the stability of the power on the DC bus is further improved.
For example, as the power value of the input power at the input end of the first DC-DC conversion circuit 131 decreases, the first power adjustment step size may also decrease, so that the trend of decreasing the input power at the input end of the first DC-DC conversion circuit 131 changes from fast to slow, and the stability of the power on the DC bus is further improved.
For example, as the power value of the input power of the input terminal of the first DC-DC conversion circuit 131 decreases, the first power adjustment step size increases accordingly, so that the trend of decreasing the input power of the input terminal of the first DC-DC conversion circuit 131 changes from slow to fast, and on the basis of improving the stability of the power on the DC bus, the first DC-DC conversion circuit 131 can be prevented from absorbing the power on the DC bus too much, so that the power on the DC bus can be supplied to the electric equipment more.
In a second embodiment, the input power at the input of the first DC-DC converter circuit 131 is controlled to jump from the first power value P 1 to the second power value P 2. Therefore, the input power at the input end of the first DC-DC conversion circuit 131 can jump as soon as possible, so that the first DC-DC conversion circuit 131 can avoid excessive absorption of the power on the DC bus, and the power on the DC bus can be supplied to the electric equipment more.
In some embodiments, there may be various implementations for controlling the output power of the output terminal of the second DC-DC conversion circuit 132 to increase from the third power value to the fourth power value, as will be illustrated below.
In the first embodiment, the output power of the output terminal of the second DC-DC conversion circuit 132 is controlled to rise from the third power value P 3 in steps of the second power adjustment step until rising to the fourth power value P 4. For example, taking the second power adjustment step as Δp b2 as an example, the output power of the output terminal of the second DC-DC conversion circuit 132 may be controlled to sequentially increase in the order of P3、P3+ΔPb2、P3+2ΔPb2、P3+3ΔPb2、……P3+m*ΔPb2、P4. Therefore, the output power of the output end of the second DC-DC conversion circuit 132 can be gradually transited from the third power value P 3 to the fourth power value P 4, the abrupt change of the output power of the output end of the second DC-DC conversion circuit 132 is reduced, the stability of the power on the DC bus is improved, and the reliability of the whole system is improved. Wherein, m can be a natural number of 1,2,3,4, 5,6, etc., and specific numerical values of m can be determined according to requirements of practical application scenes, and are not limited herein.
Illustratively, the second power adjustment step may be a constant value, so that the output power of the output terminal of the second DC-DC conversion circuit 132 may be increased based on the same variation, so that the output power of the output terminal of the second DC-DC conversion circuit 132 is increased in an equal gradient, so that the increasing trend of the input power thereof is constant, and further, the stability of the power on the DC bus is improved.
For example, as the power value of the output power of the output terminal of the second DC-DC conversion circuit 132 increases, the second power adjustment step size may be reduced, so that the trend of increasing the output power of the output terminal of the second DC-DC conversion circuit 132 changes from fast to slow, and the stability of the power on the DC bus is further improved.
For example, as the power value of the output power of the output terminal of the second DC-DC conversion circuit 132 increases, the second power adjustment step size also increases, so that the trend of increasing the output power of the output terminal of the second DC-DC conversion circuit 132 changes from slow to fast, and thus, on the basis of improving the power stability on the DC bus, the power can be supplied to the DC bus as soon as possible, so that the power on the DC bus can be supplied to the electric equipment more.
In a second embodiment, the output power of the output terminal of the second DC-DC conversion circuit 132 is controlled to jump from the third power value P 3 to the fourth power value P 4. Therefore, the output power of the output end of the second DC-DC conversion circuit 132 can jump as soon as possible, and power can be supplied to the DC bus as soon as possible, so that the power on the DC bus can be supplied to the electric equipment more.
It is understood that in practical applications, the different implementation of reducing the input power of the input terminal of the first DC-DC conversion circuit 131 from the first power value to the second power value and the different implementation of increasing the output power of the output terminal of the second DC-DC conversion circuit 132 from the third power value to the fourth power value may be combined two by two. For example, the first power value may be reduced to the second power value in a manner of constant step length based on the first power adjustment, and the third power value may be increased to the fourth power value in a manner of constant step length based on the second power adjustment, so that the difference between the fourth power value P 4 and the second power value P 2 may be increased in an equal gradient, thereby further ensuring the power stability on the dc bus. Or the first power value can be reduced to the second power value based on the mode of increasing the first power adjustment step length, and the third power value can be increased to the fourth power value based on the mode of increasing the second power adjustment step length, so that the difference between the fourth power value P 4 and the second power value P 2 can be increased rapidly, and further, the power can be supplemented to the direct current bus as soon as possible on the basis of ensuring the power stability on the direct current bus. And the rest of the same are the same, and the details are not repeated here.
In practical applications, the pulse power is not always present, and after the pulse power, if the input power of the first DC-DC conversion circuit 131 is controlled to be the second power value P 2 and the output power of the second DC-DC conversion circuit 132 is controlled to be the fourth power value P 4, the power on the DC bus is too high, which affects the reliability of the whole system. Based on this, in the embodiment of the present application, after the input power of the first DC-DC conversion circuit 131 is controlled to be the second power value P 2 and the output power of the second DC-DC conversion circuit 132 is controlled to be the fourth power value P 4, the input power of the first DC-DC conversion circuit 131 and the output power of the second DC-DC conversion circuit 132 may be controlled again according to the magnitude relation between the power of the DC bus and the power threshold, so as to implement the cycle control of the input power of the first DC-DC conversion circuit 131 and the output power of the second DC-DC conversion circuit 132, so that the charge-discharge device may operate with low energy and high efficiency. Based on this, if the power of the DC bus is greater than the power threshold, the controller 134 can re-control the input power of the first DC-DC conversion circuit 131 to rise from the second power value P 2 to the first power value P 1, and re-control the output power of the output terminal of the second DC-DC conversion circuit 132 to drop from the fourth power value P 4 to the third power value P 3, thereby reducing the control complexity.
For example, for the embodiment of controlling the input power of the first DC-DC converting circuit 131 to be increased from the second power value P 2 to the first power value P 1, the operation may be performed based on the opposite trend of the embodiment of controlling the input power of the first DC-DC converting circuit 131 to be decreased from the first power value P 1 to the second power value P 2, which is not described herein in detail.
For example, for the embodiment of controlling the output power of the second DC-DC converting circuit 132 to be reduced from the fourth power value P 4 to the third power value P 3, the operation may be performed based on the opposite trend of the embodiment of controlling the output power of the second DC-DC converting circuit 132 to be increased from the third power value P 3 to the fourth power value P 4, which is not described herein.
The second control mode is as follows:
The magnitude of the input power of the input terminal of the first DC-DC conversion circuit 131 is adjusted, and the magnitude of the output power of the output terminal of the second DC-DC conversion circuit 132 is controlled to be unchanged.
For example, in conjunction with fig. 5b, fig. 5b is a schematic diagram illustrating still another relation of power in the embodiment of the present application, the controller 134 controls the input power P dc1 at the input end of the first DC-DC converting circuit 131 to be reduced from the first power value P 1 to the second power value P 2, so that the power for charging the energy storage component 133 can be reduced based on the first power value P 1. In addition, the embodiment of reducing the input power P dc1 from the first power value P 1 to the second power value P 2 may refer to the related description in the first control manner, which is not described herein in detail.
In addition, the controller 134 further controls the output power of the output end of the second DC-DC converter 132 to be kept at the third power value P 3, and makes the third power value P 3 larger than the second power value P 2, so that the difference between the third power value P 3 and the second power value P 2 (i.e., P 3-P2) is the power supplied to the DC bus by the whole charging and discharging device. Therefore, the output power of the output end of the second DC-DC conversion circuit 132 can be higher than the input power adjusted by the input end of the first DC-DC conversion circuit 131, so that the charging power can be limited, the discharging power is higher than the charging power when the pulse power appears on the DC bus, the power supplementing the DC bus mainly by discharging is realized, the design complexity of the whole system can be reduced, and the reliability can be improved. And the additional power is supplemented to the direct-current bus, so that the power requirement of the processor chip can be met, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (for example, a power grid outputting commercial power), and the reliability of the whole system is further improved.
In some embodiments, after the input power P dc1 of the first DC-DC converting circuit 131 is reduced from the first power value P 1 to the second power value P 2, the controller 134 can control the input power of the first DC-DC converting circuit 131 to be increased from the second power value P 2 to the first power value P 1 again if the power of the DC bus is greater than the power threshold. In addition, for the embodiment of controlling the input power of the first DC-DC conversion circuit 131 to be increased from the second power value P 2 to the first power value P 1, reference may be made to the description related to the first control manner, which is not repeated herein.
Third control mode:
the magnitude of the input power at the input end of the first DC-DC conversion circuit 131 is controlled to be constant, and the magnitude of the output power at the output end of the second DC-DC conversion circuit 132 is adjusted.
For example, in conjunction with fig. 5c, fig. 5c is a schematic diagram illustrating still another relation of power in the embodiment of the present application, the controller 134 controls the output power P dc2 at the output end of the second DC-DC conversion circuit 132 to rise from the third power value P 3 to the fourth power value P 4, so that the power discharged by the energy storage component 133 can be raised on the basis of the third power value P 3. Further, the embodiment in which the output power P dc2 is increased from the third power value P 3 to the fourth power value P 4 may refer to the related description in the first control manner, which is not described herein in detail.
In addition, the controller 134 further controls the input power of the input end of the first DC-DC conversion circuit 131 to be kept at the first power value P 1, and makes the fourth power value P 4 larger than the first power value P 1, so that the difference between the fourth power value P 4 and the first power value P 1 (i.e., P 4-P1) is the power supplied to the DC bus by the whole charging and discharging device. Therefore, the output power of the second DC-DC converter 132 after being adjusted can be higher than the input power of the input end of the first DC-DC converter 131, so as to limit the charging power, so that the discharging power is higher than the charging power when the pulse power occurs on the DC bus, and the power is supplemented to the DC bus mainly by discharging, thereby reducing the design complexity of the whole system and improving the reliability. And the additional power is supplemented to the direct-current bus, so that the power requirement of the processor chip can be met, the risk that the pulse power penetrates through the power supply equipment can be reduced, the pulse power is prevented from reaching a front-stage power supply (for example, a power grid outputting commercial power), and the reliability of the whole system is further improved.
In some embodiments, after the output power P dc2 at the output end of the second DC-DC conversion circuit 132 increases from the third power value P 3 to the fourth power value P 4, if the power of the DC bus is greater than the power threshold, the controller 134 can control the output power P dc2 at the output end of the second DC-DC conversion circuit 132 to decrease from the fourth power value P 4 to the third power value P 3 again. In addition, for the embodiment of controlling the output power P dc2 of the output terminal of the second DC-DC converter 132 to be reduced from the fourth power value P 4 to the third power value P 3, reference may be made to the description related to the first control manner, which is not repeated herein.
It is understood that, in fig. 5a to 5c, the power P b1 before the pulse power P b2 and the power P b1 after the pulse power P b2 in the power P bus of the dc bus are denoted by P b1, but may be the same or different, so that the specific values of the power P b1 before the pulse power P b2 and the power P b1 after the pulse power P b2 may be determined according to the requirements of the practical application scenario.
Furthermore, in some embodiments, the number of charging and discharging devices may be set according to different application requirements. For example, the number of charge and discharge devices can be arbitrarily expanded based on the capability of the electronic system to withstand the pulse power. For example, in some electronic systems, the capacity of the electronic system to withstand the pulse power is better, and in order to match the application requirements, the number of the charge and discharge devices can be set smaller, so that the cost can be reduced on the basis that the whole operation of the electronic system is not affected. In other electronic systems, the capacity of the electronic system for bearing the pulse power is poor, and in order to match application requirements, the number of the charge and discharge devices can be set to be more, so that the capacity of the electronic system for bearing the pulse power can be improved on the basis that the integral operation of the electronic system is not affected, and pulse power waveforms with higher amplitude and longer time can be supported. For example, if one charge and discharge device can raise the pulse power bearing capacity by 1.5 times and 30ms, the capacity of the electronic system for bearing the pulse power can be increased by times by expanding the number of the charge and discharge devices. The whole operation of the system is not affected.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application.

Claims (10)

1. The charging and discharging device is characterized by comprising a first direct current-Direct Current (DC) -DC conversion circuit, a second DC-DC conversion circuit, an energy storage component and a controller;
The input end of the first DC-DC conversion circuit and the output end of the second DC-DC conversion circuit are connected to a direct current bus in parallel, and the output end of the first DC-DC conversion circuit and the input end of the second DC-DC conversion circuit are connected to the energy storage component in parallel;
the controller is respectively connected with the first DC-DC conversion circuit and the second DC-DC conversion circuit;
the controller is used for:
The first DC-DC conversion circuit and the second DC-DC conversion circuit are controlled to work respectively, the voltage of the direct current bus is converted and then output to the energy storage component when the first DC-DC conversion circuit works, and the voltage of the energy storage component is converted and then output to the direct current bus when the second DC-DC conversion circuit works;
In the process of controlling the first DC-DC conversion circuit and the second DC-DC conversion circuit to work, responding to the fact that the power of the direct current bus is smaller than or equal to a power threshold value, controlling the input power of the input end of the first DC-DC conversion circuit to be reduced from a first power value to a second power value, and controlling the output power of the output end of the second DC-DC conversion circuit to be increased from a third power value to a fourth power value, wherein the fourth power value is larger than the second power value.
2. The charging and discharging device is characterized by comprising a first direct current-Direct Current (DC) -DC conversion circuit, a second DC-DC conversion circuit, an energy storage component and a controller;
The input end of the first DC-DC conversion circuit and the output end of the second DC-DC conversion circuit are connected to a direct current bus in parallel, and the output end of the first DC-DC conversion circuit and the input end of the second DC-DC conversion circuit are connected to the energy storage component in parallel;
the controller is respectively connected with the first DC-DC conversion circuit and the second DC-DC conversion circuit;
the controller is used for:
The first DC-DC conversion circuit and the second DC-DC conversion circuit are controlled to work respectively, the voltage of the direct current bus is converted and then output to the energy storage component when the first DC-DC conversion circuit works, and the voltage of the energy storage component is converted and then output to the direct current bus when the second DC-DC conversion circuit works;
In the process of controlling the first DC-DC conversion circuit and the second DC-DC conversion circuit to work, responding to the fact that the power of the direct current bus is smaller than or equal to a power threshold value, controlling the input power of the input end of the first DC-DC conversion circuit to be reduced from a first power value to a second power value, and controlling the output power of the output end of the second DC-DC conversion circuit to be a third power value, wherein the third power value is larger than the second power value.
3. The charge-discharge apparatus according to claim 1 or 2, wherein the controlling of the input power of the input terminal of the first DC-DC conversion circuit from the first power value to the second power value includes:
And controlling the input power of the input end of the first DC-DC conversion circuit to gradually decrease from the first power value according to a first power adjustment step length until the input power is reduced to the second power value.
4. The charging and discharging device is characterized by comprising a first direct current-Direct Current (DC) -DC conversion circuit, a second DC-DC conversion circuit, an energy storage component and a controller;
The input end of the first DC-DC conversion circuit and the output end of the second DC-DC conversion circuit are connected to a direct current bus in parallel, and the output end of the first DC-DC conversion circuit and the input end of the second DC-DC conversion circuit are connected to the energy storage component in parallel;
the controller is respectively connected with the first DC-DC conversion circuit and the second DC-DC conversion circuit;
the controller is used for:
The first DC-DC conversion circuit and the second DC-DC conversion circuit are controlled to work respectively, the voltage of the direct current bus is converted and then output to the energy storage component when the first DC-DC conversion circuit works, and the voltage of the energy storage component is converted and then output to the direct current bus when the second DC-DC conversion circuit works;
In the process of controlling the first DC-DC conversion circuit and the second DC-DC conversion circuit to work, responding to the fact that the power of the direct current bus is smaller than or equal to a power threshold value, controlling the input power of the input end of the first DC-DC conversion circuit to be a first power value, and controlling the output power of the output end of the second DC-DC conversion circuit to be increased from a third power value to a fourth power value, wherein the fourth power value is larger than the first power value.
5. The charge-discharge apparatus according to claim 1 or 4, wherein said controlling the output power of the output terminal of the second DC-DC conversion circuit to rise from the third power value to the fourth power value includes:
And controlling the output power of the output end of the second DC-DC conversion circuit to rise gradually according to a second power adjustment step length from the third power value until the output power rises to the fourth power value.
6. The charge and discharge device of any one of claims 1-5, wherein the controller is further configured to:
in the process of controlling the first DC-DC conversion circuit and the second DC-DC conversion circuit to work, responding to the fact that the power of the direct current bus is larger than the power threshold value, controlling the input power of the input end of the first DC-DC conversion circuit to be the first power value, and controlling the output power of the output end of the second DC-DC conversion circuit to be the third power value.
7. The charging and discharging device according to any one of claims 1 to 6, wherein the converting the voltage of the dc bus and outputting the converted voltage to the energy storage component includes:
And performing boost conversion on the voltage of the direct current bus and outputting the voltage to the energy storage component.
8. The charging and discharging device according to any one of claims 1 to 7, wherein the converting the voltage of the energy storage component and outputting the converted voltage to the dc bus includes:
and performing voltage reduction conversion on the voltage of the energy storage component and outputting the voltage to the direct current bus.
9. The charge and discharge device of any one of claims 1-8, wherein the energy storage component comprises a storage capacitor or an energy storage battery.
10. An electronic system, comprising a power supply device, a dc bus, a consumer, and a charging and discharging device according to any one of claims 1-9, the charging and discharging device being connected to the dc bus;
the input end of the power supply equipment is used for receiving input voltage, and the output end of the power supply equipment is connected with the electric equipment through the direct current bus.
CN202411248454.0A 2024-09-05 2024-09-05 Charging and discharging device and electronic system Pending CN121663757A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202411248454.0A CN121663757A (en) 2024-09-05 2024-09-05 Charging and discharging device and electronic system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411248454.0A CN121663757A (en) 2024-09-05 2024-09-05 Charging and discharging device and electronic system

Publications (1)

Publication Number Publication Date
CN121663757A true CN121663757A (en) 2026-03-13

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Family Applications (1)

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CN202411248454.0A Pending CN121663757A (en) 2024-09-05 2024-09-05 Charging and discharging device and electronic system

Country Status (1)

Country Link
CN (1) CN121663757A (en)

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