CN1213919A - Decision feedback equalizer with intelligently selecting tap coefficient - Google Patents

Abstract

A decision feedback equilizer for intelligent selection of tapping coefficient is composed of synchronous signal separator, digital signal processor (DSP), FIR and IIR. The digital signal is received from input by FIR and then output to IIR that is composed of dicision circuit, delay circuit, electronic switch, sub-channel circuit. The dicision circuit outputs to delay circuit composed of more D-triggers. Said syncrhonous signal separator can separate synchronous signal from input digital signals and send it to DSP which controls the electronic swith in IIR. Several sub-channel circuits are connected to relative D-triggers.

Description

The DFF of intelligently selecting tap coefficient

The present invention relates to a kind of equalizer, relate more specifically to a kind of DFF of intelligently selecting tap coefficient.

In the modern digital communication system, the equalizer parts that are absolutely necessary.Equalizer uses transverse filter structure usually.Transversal filter can constitute FIR and IIR, and these two kinds of structures all are used as equilibrium, i.e. Qian Kui equilibrium and decision feedback equalization.

The advantage of feed forward equalizer is: 1. loop is always stable.2. both can eliminate paying of delay and directly also can eliminate the leading footpath of paying.

Shortcoming is: when 1. disturbing in one pair of footpath of elimination, can produce another pair footpath and disturb.2. eliminate to pay the footpath when disturbing, with signal delay, multiplying factor, be added in the original signal, in this process, noise will increase.

Pay the footpath when disturbing eliminating one, it is that former pair of footpath twice, amplitude are that the multipath in former pair of footpath square disturbs that feed forward equalizer can produce another time delay.This secondary pair footpath is disturbed and also can be eliminated, but will produce the secondary multipath interference that a series of amplitudes diminish gradually.To the end, the secondary disturbances amplitude that new generation is not eliminated becomes very little, is similar to the noise in the signal, can be corrected by error correction coding, or disappear in " quantification " process.And to reach this effect, and require transversal filter quite long, have abundant node and tap coefficient.

The advantage of DFF is: 1. do not produce new multipath when eliminating multipath; If 2. judgement is correct, do not judge by accident, then the noise in the feedback signal has been removed, thereby noise in output signal can not increase.

Its shortcoming is: 1. can only eliminate the multipath of delay, can not eliminate leading multipath; 2. in actual applications, because circuit devcie certainly exists intrinsic delay, DFF not can do with the very short multipath of time delay.And this multipath of amplitude maximum often in actual channel.Therefore, decision feedback equalization can not use separately, must use together with feed forward equalizer.3. there is stability problem in DFF, for guaranteeing system stability, requires channel quality better, and promptly signal to noise ratio height, multipath amplitude are less, to guarantee that the great majority judgement is correct.

Dark channel conditions such as pit occur and compare under the condition of severe in passband, the equalizer performance that has the decision-feedback part obviously is better than linear equalizer (FIR equalizer).

According to the scheme HDTV of U.S. Major Leagues (GA) function prototyping testing result, HDTV channel worst case is:

1. a pair footpath amplitude peak of prolonging (0.18 μ S) in short-term can reach to be led directly-2dB (0.8 times).

2. pair footpath amplitude peak of long delay (3.2 μ S) can reach main footpath-6dB (0.5 times).

3. most strong footpath time delays of paying are no more than 10 μ S.

4. significantly pay the footpath, reach main footpath-10dB (0.3 times), in short and the long time interval, exist.

As seen, the channel of wireless transmission HDTV is quite abominable, tangible pit will occur in the channel passband.

By Computer Simulation, draw the equalizer in the ideal case shown in the following table and tackle the performance of paying the footpath.So-called ideal situation is meant:

1. there is not noise in the channel

2. it is enough high to take advantage of, add operational precision

Equalizer fully convergence table 1 FIR equalizer ideally tackle a performance (equalizer output noise, the wanted to interfering signal ratio) training of paying the footpath and count=49000 points step-length=0.00036 ^*128/TAP

	????D=3				????D=43			????D=125
										????TAP	?A=0.8	?A=0.5	?A=0.3	?A=0.1	?A=0.5	?A=0.3	?A=0.1	?A=0.3	?A=0.1
????10	-30.74	?19.44	?38.32	?76.85	?2.44	?7.34	?16.98	?7.40	?16.98
										????20	?3.55	?38.07	?69.83	＞120	?2.53	?7.42	?17.11	?7.65	?17.20
????30	10.23	?56.02	?99.96	＞120	?2.41	?7.33	?17.08	?7.45	?17.05
										????40	19.01	?80.20	＞120	＞120	?2.63	?7.40	?17.05	?7.43	?16.97
????50	24.97	?97.12	＞120	＞120	?8.80	?17.94	?37.19	?7.33	?16.92
										????60	31.18	＞120	＞120	＞120	?8.76	?17.95	?37.23	?7.31	?16.88
????70	39.21	＞120	＞120	＞120	?8.62	?17.87	?37.16	?7.38	?17.03
										????80	45.33	＞120	＞120	＞120	?8.53	?17.80	?37.08	?7.24	?16.97
????90	51.15	＞120	＞120	＞120	?14.50	?28.17	?57.01	?7.28	?16.99
										????100	58.74	＞120	＞120	＞120	?14.60	?28.23	?57.03	?7.28	?17.01
????110	64.77	＞120	＞120	＞120	?14.52	?28.15	?56.96	?7.36	?17.05
										????120	70.62	＞120	＞120	＞120	?14.55	?28.21	?56.99	?7.33	?17.05
????130	78.45	＞120	＞120	＞120	?20.47	?38.61	?76.91	?17.87	?37.07
										????140	84.28	＞120	＞120	＞120	?20.48	?38.59	?76.88	?17.95	?37.11
????150	90.11	＞120	＞120	＞120	?20.52	?38.62	?76.92	?17.91	?37.09
										????160	97.08	＞120	＞120	＞120	?20.49	?38.59	?76.89	?17.91	?37.08
????170	103.68	＞120	＞120	＞120	?20.47	?38.58	?76.89	?17.89	?37.06
										????180	＞120	＞120	＞120	＞120	?26.48	?49.06	?96.13	?17.98	?37.13
????190	＞120	＞120	＞120	＞120	?26.45	?49.03	?96.06	?17.98	?37.11
										????200	＞120	＞120	＞120	＞120	?26.46	?49.02	?96.08	?17.93	?37.08
????210	＞120	＞120	＞120	＞120	?26.44	?49.01	?96.07	?17.87	?37.01
										????220	＞120	＞120	＞120	＞120	?32.53	?59.50	＞120	?17.79	?36.97
????230	＞120	＞120	＞120	＞120	?32.49	?59.46	＞120	?17.83	?37.00
										????240	＞120	＞120	＞120	＞120	?32.46	?59.45	＞120	?17.90	?37.05
????250	＞120	＞120	＞120	＞120	?32.46	?59.46	＞120	?17.84	?37.03
										????256	＞120	＞120	＞120	＞120			＞120	?28.30	?57.07

In the table, D is for paying the footpath time delay, and A is for paying the amplitude in main relatively footpath, footpath.In the table that provides in the table, D is for paying the footpath time delay, and A is for paying the amplitude in main relatively footpath, footpath.What provide in the table is through balanced back useful signal (S) and remaining intersymbol interference (N ₁) ratio S/N ₁, unit is dB.Table 2 DFE equalizer (31 grades of non-causal FIR+IIR) ideally tackles performance (equalizer output noise, the wanted to interfering signal ratio) training of paying the footpath and counts=49000 points FIR step-length=0.0002, IIR step-length=0.00005 ^*128/TAP

	????D=3				????D=43			????D=125
										?IIR?TAP	?A=0.8	?A=0.5	?A=0.3	?A=0.1	?A=0.5	?A=0.3	?A=0.1	?A=0.3	?A=0.1
????10	?12.79	?30.62	?52.16	?97.60	?6.15	?10.19	?19.55	?10.37	?19.63
										????20	＞120	＞120	＞120	＞120	?6.06	?10.11	?19.45	?10.26	?19.49
????30	＞120	＞120	＞120	＞120	?6.08	?10.09	?19.40	?10.20	?19.44
										????40	＞120	＞120	＞120	＞120	?6.06	?10.09	?19.37	?10.16	?19.41
????50	＞120	＞120	＞120	＞120	＞120	＞120	?86.64	?10.17	?19.40
										????60	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?10.18	?19.42
????70	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?10.19	?19.42
										????80	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?10.22	?19.42
????90	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?10.24	?19.44
										????100	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?10.31	?19.48
????110	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?10.39	?19.56
										????120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?10.44	?19.58
????130	＞120	＞120	＞120	＞120	＞120	＞120	＞120	?93.00	?91.56
										????140	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
????150	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
										????160	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
????170	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
										????180	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
????190	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
										????200	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
????210	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
										????220	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
????230	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
										????240	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
????250	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120
										????256	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120	＞120

Relatively above two tables, according to the transmission characteristic of HDTV terrestrial broadcasting channel, the DFE performance obviously is better than the FIR equalizer, should use DFE under the situation that hardware condition allows.

The structure of traditional DFE as shown in Figure 1.The left side is the FIR part among the figure, and the right is the IIR part, and two parts all are respectively transversal filters.The input of FIR filter is outside input, and the input of iir filter is the court verdict of output signal.Output signal is fed back to the feature that input is an iir filter.Decision circuit is arranged, so claim DFF (DFE) in feedback loop.

The mathematic(al) representation of DFE equalizer operation principle is as follows:

Equalizer input signal is:

r(kT)

Equalizer output signal is: $Z\left(\mathrm{KT}\right)=\underset{n=0}{\overset{N-1}{\mathrm{\Σ}}}\mathrm{Cn}\·Y(\mathrm{KT}-\mathrm{nT})-\underset{m=1}{\overset{M-1}{\mathrm{\Σ}}}{b}_m\hat{X}(\mathrm{KT}-\mathrm{mT})$ Z (KT) is through adjudicating, $\stackrel{\mathrm{\Λ}}{X}\left(\mathrm{KT}\right)$ Error signal is $e\left(\mathrm{KT}\right)=Z\left(\mathrm{KT}\right)-\hat{X}\left(\mathrm{KT}\right)$ C _n(K+1)=C _n(K)-Δ·e(KT)·r(KT-nT) $b_m(K+1)=b_n\left(K\right)+\mathrm{\Δ}\·e\left(\mathrm{KT}\right)\·\stackrel{\mathrm{\Λ}}{X}(\mathrm{KT}-\mathrm{mT})$

In HDTV, because secondary footpath time delay is bigger, DFE equalizer progression is a lot, and the footpath of paying that tackles time delay 10 μ S to 40 μ S needs 100 multistage multistage to 500.This makes hardware configuration complicated unusually, and except making dedicated IC chip, additive method is difficult to realize the DFE equalizer of hundreds of joints.

Even making special chip also has problems: as it is excessive to take area of chip, cost is too high, because operational precision is limited, the tap of hundreds of joints will be introduced sizable additional noise.Therefore, must break through conventional method, the DFE equalizer of exploitation of innovation.

Analyze on time domain, as shown in Figure 2, decision-feedback IIR utilizes the impulse Response Function of output to offset the intersymbol interference of delay one by one, when coefficient bi correctly regulates, can fully eliminate the intersymbol interference that lags behind.Eliminate with first tap coefficient of paying footpath (time delay is the footpath of paying of Ts) dependence iir filter of the main clock cycle of directly being separated by, eliminate with the 2nd tap coefficient paying footpath (time delay is the footpath of paying of 2 * Ts) dependence iir filter of main 2 clock cycle of directly being separated by, eliminate with the 3rd tap coefficient paying footpath (time delay is the footpath of paying of 3 * Ts) dependence iir filter of main 3 clock cycle of directly being separated by ... the rest may be inferred.

Come therefrom and can reach a conclusion: several pairs of footpaths are arranged in the channel, just need the tap coefficient of several iir filters to eliminate; Do not pay the place in footpath in the channel, the iir filter tap coefficient equals zero.

On the other hand, according to the feature of HDTV channel, there is reflection in wireless line-of-sight transmission, and refraction etc. produce and pay the footpath.The number in this pair of footpath is limited several.Canada CRC Communications Research Center shows 3.33 of the multipath number average out to of the transmission signals of transmitted from transmitter to receiver at the measured result of area, Ottawa 201MHz channel.

Therefore, the tap coefficient of IIR part has only limited several non-vanishingly in the DFE equalizer, and all the other overwhelming majority should be zero.Certainly this is to analyze the conclusion that obtains under the muting situation having only multipath.Computer Simulation is found: IIR part tap coefficient is generally a little numerical value, and this is that the coefficient major part that calculates is non-vanishing owing to exist noise effect in the real channel, but some very little numerical value.

In the HDTV system, channel coding/decoding has great error correcting capability.Because the thresholding signal to noise ratio is 15dB, so error correction coding can tackle-noise of 15dB, also can tackle-intersymbol interference of 15dB.Therefore, as long as equalizer is designed to the pay footpath of the amplitude that can do with greater than-15dB.

Consider the feature of HDTV channel, the number in secondary footpath is not a lot.The tap coefficient that therefore can reasonably distribute IIR part in the DFE equalizer by programmable delay circuit, uses limited several tap coefficients to be distributed in the position that secondary footpath occurs, and can eliminate secondary footpath most effectively.Like this, limited several tap coefficients can be offset the very long secondary footpath of time delay.Compare with the DFE of traditional structure, reach effect same in the HDTV channel, chip area reduces more than ten times.

Based on above-mentioned analysis, the purpose of this invention is to provide a kind of DFF of intelligently selecting tap coefficient.

According to the DFF of intelligently selecting tap coefficient of the present invention, it is characterized in that it comprises: sync separator circuit, digital signal processor (DSP), FIR part and IIR part; The FIR part is from the input of input receiving digital signals, and through after the delay of each d type flip flop, with stack again after the multiplication, the IIR part is delivered in its output; IIR partly has decision circuit, delay line, electronic switch and pays footpath circuit etc., the input of the delay line of being made up of a plurality of d type flip flops is delivered in the output of decision circuit, and the output of each d type flip flop is connected with several pairs footpath circuit by electronic switch; Said sync separator circuit is isolated synchronizing signal from supplied with digital signal, it is outputed to said digital signal processor, electronic switch in said digital signal processor (DSP) the control IIR part is with will above-mentioned several pairs footpath circuit and several corresponding d type flip flops connections.

Embodiments of the present invention is described in detail below in conjunction with accompanying drawing.

Fig. 1 is the principle assumption diagram of DFE equalizer.

Fig. 2 explains that equalizer utilization master footpath signal offsets the fundamental diagram of intersymbol interference one by one.

Fig. 3 is according to the DFF principle assumption diagram of intelligently selecting tap coefficient of the present invention.

As shown in Figure 3, the DFF of intelligently selecting tap coefficient of the present invention comprises: sync separator circuit, digital signal processor (DSP), FIR part and IIR part.The FIR part is from the input of input receiving digital signals, and through after the delay of each d type flip flop, with stack again after the multiplication, the IIR part is delivered in its output; IIR partly has decision circuit, delay line, electronic switch and pays footpath circuit etc., the input of the delay line of being made up of a plurality of d type flip flops is delivered in the output of decision circuit, the output of each d type flip flop by electronic switch and plurality of nodes tap (in the present embodiment, a node tap is one and pays the footpath circuit, shown among the figure that 3 are paid the footpath circuits) be connected, each is paid the footpath circuit and comprises that a cover is taken advantage of and add circuit; Said sync separator circuit is isolated synchronizing signal from supplied with digital signal, it is outputed to said digital signal processor, electronic switch in said digital signal processor (DSP) the control IIR part, this switching circuit is assigned to limited several IIR tap coefficients on the position in these First Officer footpaths, is about to above-mentioned several pairs of footpath circuits and corresponding several d type flip flops connections.

Digital Signal Processing (DSP) is used as an independently equalizer.Because to do equalizer input code flow speed very slow for DSP, so this " independently equalizer " synchronizing signal in can only the deal with data code stream.Synchronizing signal is known at receiving terminal, is used as training sequence in equalizer.Synchronizing signal accounts for one of about three percentages of total data code stream." independently equalizer " according to the size of its tap coefficient, detects the big position of paying the footpath (promptly in the corresponding coefficient of using DSP to calculate, the coefficient positions that numerical value is bigger).Use switching circuit that limited several IIR tap coefficients are assigned on the position in these First Officer footpaths.

As shown in Figure 3.The left side is the FIR part among the figure, and the right is the IIR part that can distribute tap coefficient.Compared to Figure 1, general DFE equalizer is a stationary nodes, and the corresponding cover of d type flip flop is taken advantage of and added circuit.And improved circuit is that the node tap coefficient is assignable, and d type flip flop is a lot; Take advantage of that to add circuit few, distribute as required by switch.Because take advantage of to add the circuit scale and be far longer than d type flip flop, so this improvement can be saved a lot of chip areas.

Because the tap coefficient (node of equalizer) of IIR part is only having place, the footpath of paying to occur.Even being arranged, long time delay significantly pays the footpath, for improved DFE equalizer, only increase the delay progression of delay circuit, i.e. the number of d type flip flop, and needn't increase the progression of equalizer, promptly needn't increase the interstitial content of the equalizer that constitutes by multiplication and add circuit.

With respect to the fixing equalizer of progression, distribute progression to make hardware size much littler able to programmely.The small numbers of taps coefficient just can tackle very big the paying directly of time delay.For example, can occur the footpath of paying of 40 microsecond time delays among the HDTV under extreme case, use the DFE of traditional structure, it is 500 multistage that joint number is wanted at least, more than 500 adder and multiplier, and this can not accomplish when hardware is realized.Use is optimized structure, and the front is not paid the footpath and located not distribution coefficient, does not promptly dispose to take advantage of to add circuit, has only d type flip flop, and distribute a tap coefficient in the place of paying the footpath of time delay 500 more pieces, and promptly one is taken advantage of to add circuit and be attached to more than the 500th d type flip flop with switch, just can deal with problems.

Finally, the HDTV receiver will be made dedicated IC chip.When doing chip, can adopt structure flexibly fully, make a long delay circuit (comprising a lot of d type flip flops), increase tap coefficient distributor circuit (variable connector) again at chip internal.Like this, about 16 assignable tap coefficients just can replace more than 500 fixing tap coefficient.The chip area of DFE equalizer can reduce more than ten times; And the node number of taps that reduces the traditional structure equalizer can also reduce noise, improves equalizer performance.

Claims (3)

1, a kind of DFF of intelligently selecting tap coefficient is characterized in that it comprises: sync separator circuit, digital signal processor (DSP), FIR part and IIR part; The FIR part is from the input of input receiving digital signals, and through after the delay of each d type flip flop, with stack again after the multiplication, the IIR part is delivered in its output; IIR partly has decision circuit, delay line, electronic switch and pays footpath circuit etc., the input of the delay line of being made up of a plurality of d type flip flops is delivered in the output of decision circuit, and the output of each d type flip flop is connected with several pairs footpath circuit by electronic switch; Said sync separator circuit is isolated synchronizing signal from supplied with digital signal, it is outputed to said digital signal processor, electronic switch in said digital signal processor (DSP) the control IIR part is with will above-mentioned several pairs footpath circuit and several corresponding d type flip flops connections.

2, according to the DFF of claim 1 intelligently selecting tap coefficient, it is characterized in that said several pairs footpath circuit is 3.

3, according to the DFF of claim 1 intelligently selecting tap coefficient, it is characterized in that said digital signal processor (DSP) is the TMS320C31 chip.

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