CN1206164A - Computer display card-based special speed-up chip for digital video decoding system - Google Patents
Computer display card-based special speed-up chip for digital video decoding system Download PDFInfo
- Publication number
- CN1206164A CN1206164A CN 97112544 CN97112544A CN1206164A CN 1206164 A CN1206164 A CN 1206164A CN 97112544 CN97112544 CN 97112544 CN 97112544 A CN97112544 A CN 97112544A CN 1206164 A CN1206164 A CN 1206164A
- Authority
- CN
- China
- Prior art keywords
- mpeg2
- chip
- video
- mvac
- speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Compression Or Coding Systems Of Tv Signals (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
In the present invention, MPEG2 image decoding uses combined software and hardware scheme, and this reduce greatly the requirement to the performance of system including CPU and memory and the cost. The present invention makes it possible for the user to enjoy images of MPEG2 format in high and middle-grade PC computer. The present invention adopts standard DRAM interface and thus has excellent versatility and expandability and it may be widely used in various MPEG2 image decoding fields.
Description
The present invention designs a video decode speed-up chip based on the computer display card speed-up chip.Make the video of MPEG2 form can on middle and high performance PC, realize handling in real time (separating agate, demonstration).
In the present invention, the MPEG2 picture decoding has adopted solution soft, combination of hardware.Separate the major part work of agate and finish, but the compensation of moving image and reconstruct will be finished by hardware by software.This part work is owing to relating to lot of data access and calculating, if finish and will take a large amount of CPU time with software.But this part operation algorithm is simple, is fit to very much be finished by hardware.We have designed the circuit of following structure.
In this design, main frame is directly write the register of MVAC inside with motion vector (Moving Vector), error amount and corresponding decoding parametric by the DirectDraw mode.MVAC will finish the reconstruct of moving image macro block and write among the DRAM by the YUV2 form.Other demonstration work will be finished by the speed-up chip S3 on the display card.The present invention has caused certain time-delay, so this system is higher to the rate request of DRAM owing to inserted MVAC.
MVAC finishes following mode the reconstruct of moving image macro block (Moving Picture Macro-Block):
1) by the error block data of S3 reception, from DRAM, reads corresponding reference frame data simultaneously from main frame.
2) the corresponding decoding parametric of basis calculates the predicted value of this macro block
3) error block data and the addition of prediction blocks of data, produce final moving image macro block data through threshold value judgement back.
4) under the control of software, final moving image macro block data is write DRAM by the YUV2 form.
When MVAC does not work (software does not start), MVAC only shows as a delay unit.It can not influence any operation of main frame.S3 can directly carry out read-write operation to DRAM.When MVAC was in running order, MVAC only handled the data of particular address.For other data of main frame and S3, MVAC shows as a delay unit equally.
The MPEG2 decoding technique that the present invention has adopted software to engage with hardware so just greatly reduces the requirement of software to system performance (CPU, Memory).Simultaneously since hardware device simple-only the VRAM interface on display card inserts a chip (MVAC), makes the user can enjoy the image of MPEG2 form with extremely low cost on middle and high performance PC.The DRAM interface of standard has been adopted in this invention, makes it have good versatility and extendability.
Claims (3)
- (1) having adopted MPEG2 picture decoding method soft, combination of hardware is a patent of invention that belongs to computing machine and image processing.It is used on middle and high performance PC the image of MPEG2 form being decoded.It is characterized in that designing a kind of MPEG2 video decode speed-up chip of special use, this chip is finished the calculating and the data transmission of motion compensation in the MPEG2 decoding.
- (2) adopted MPEG2 picture decoding method soft, combination of hardware according to claim (1) is described, it is characterized in that DRAM general-purpose interface based on video-stream processor, will speed up that chip MVAC places video-stream processor and the DRAM that is used to show between.
- (3) adopted MPEG2 picture decoding method soft, combination of hardware according to claim (1) is described, it is characterized in that utilizing the addressing space of video-stream processor, control by the software that operates on the main frame, speed-up chip MVAC is passive to carry out data processing and transmission, thereby finishes the MPEG2 image decoding.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 97112544 CN1206164A (en) | 1997-07-22 | 1997-07-22 | Computer display card-based special speed-up chip for digital video decoding system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 97112544 CN1206164A (en) | 1997-07-22 | 1997-07-22 | Computer display card-based special speed-up chip for digital video decoding system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1206164A true CN1206164A (en) | 1999-01-27 |
Family
ID=5172337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 97112544 Pending CN1206164A (en) | 1997-07-22 | 1997-07-22 | Computer display card-based special speed-up chip for digital video decoding system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1206164A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7646817B2 (en) | 2003-03-28 | 2010-01-12 | Microsoft Corporation | Accelerating video decoding using a graphics processing unit |
-
1997
- 1997-07-22 CN CN 97112544 patent/CN1206164A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7646817B2 (en) | 2003-03-28 | 2010-01-12 | Microsoft Corporation | Accelerating video decoding using a graphics processing unit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100405853C (en) | Moving image encoding apparatus and moving image processing apparatus | |
| US7983342B2 (en) | Macro-block level parallel video decoder | |
| JP2002506251A (en) | Multiprocessor device having shared memory | |
| JPH0759084A (en) | Picture processing system | |
| CA2164751A1 (en) | Video Transmission Rate Matching for Multimedia Communication Systems | |
| CN101193306A (en) | Motion vector detecting apparatus and motion vector detecting method | |
| EP0602642B1 (en) | Moving picture decoding system | |
| US6175594B1 (en) | Method and apparatus for decoding compressed video | |
| JP2888288B2 (en) | Image coding device | |
| CA2192532A1 (en) | Hybrid software/hardware video decoder for personal computer | |
| KR100917067B1 (en) | Video processing | |
| CN101340588B (en) | Motion estimation method, apparatus and multimedia processor | |
| US7706377B2 (en) | Video processing circuit and method of video processing | |
| RU2225035C1 (en) | Method for encoding coordinates of video image moving on computer monitor screen, device for decoding visual object encoded by this method, and system designed for visualizing active video by means of this device | |
| CN1206164A (en) | Computer display card-based special speed-up chip for digital video decoding system | |
| JP4702967B2 (en) | Image decoding method and image processing apparatus | |
| US6356317B1 (en) | Image processor | |
| US6035322A (en) | Image processing apparatus | |
| JPH11215509A (en) | Motion compensation processing method and recording medium with its processing program stored therein | |
| US20130127887A1 (en) | Method for storing interpolation data | |
| US5987190A (en) | Image processing system including a processor side memory and a display side memory | |
| Purcell et al. | C-Cube MPEG video processor | |
| JPH07131786A (en) | Data processing unit | |
| Chen et al. | Memory performance optimizations for real-time software HDTV decoding | |
| KR100450844B1 (en) | Video CODEC processor architecture |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |