CN120181251A - Quantum computing method and quantum computing device based on partition architecture - Google Patents
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Abstract
本申请提出一种基于分区架构的量子计算方法和量子计算装置，所述分区架构包括储存区和作用区，所述量子计算方法包括：响应于量子计算指令，将原始线路映射到所述存储区，得到由多个量子门组成的量子电路；将需要参与所述量子电路的量子门计算的中性原子移动到所述作用区，以进行量子计算；将执行完量子计算且不参与下一个量子门计算的中性原子移动到所述存储区，并将需要参与所述下一个量子门计算的中性原子保留在所述作用区。根据本申请的实施例，通过采用分区架构，将量子门计算的量子比特限定在作用区，未参与量子门计算的量子比特限定在存储区，从而降低了里德堡全局光束对未参与计算的量子比特影响。
The present application proposes a quantum computing method and a quantum computing device based on a partitioned architecture, wherein the partitioned architecture includes a storage area and an action area, and the quantum computing method includes: in response to a quantum computing instruction, mapping the original circuit to the storage area to obtain a quantum circuit composed of multiple quantum gates; moving the neutral atoms that need to participate in the quantum gate calculation of the quantum circuit to the action area to perform quantum computing; moving the neutral atoms that have completed the quantum computing and do not participate in the next quantum gate calculation to the storage area, and retaining the neutral atoms that need to participate in the next quantum gate calculation in the action area. According to an embodiment of the present application, by adopting a partitioned architecture, the quantum bits of quantum gate calculation are confined to the action area, and the quantum bits that do not participate in the quantum gate calculation are confined to the storage area, thereby reducing the influence of the Rydberg global beam on the quantum bits that do not participate in the calculation.
Description
Technical Field
The present application relates to the field of quantum computing, and in particular, to a quantum computing method and a quantum computing device based on a partition architecture, an electronic device, and a non-transitory computer readable storage medium.
Background
In recent years, the development of quantum computation of neutral atoms, particularly of the reed burg atoms, has greatly advanced thanks to the development of laser control technology and magneto-optical trap confinement technology, and has been increasingly focused by researchers and the quantum computing industry. Neutral atoms are taken as quantum bits by uncharged atoms bound by optical tweezers, interaction is realized among the quantum bits by exciting the atoms to a Redburg state, information exchange among the quantum bits is realized, and therefore, universal quantum computation can be realized in the neutral atoms. The atoms are regarded as qubits, and the characteristics of high homography, long qubit service life, high operability and interaction among the Redberg states of the atoms enable the atoms to have high parallelism. The neutral atoms are generally subjected to qubit manipulation in a two-dimensional array mode, so that the neutral atoms have great advantages in expansibility compared with other hardware platforms such as superconducting quantum computing, ion trap quantum computing platforms and the like, and under the existing laser power, the confinement and manipulation of six thousands of Redberg atom qubits are realized, and the great potential of the Redberg atoms as quantum computing is shown.
The quantum algorithm can be effectively combined with the hardware control platform through compiling, so that the advantage of quantum computing force is truly exerted, and one important characteristic of the Redburg atomic platform is that quantum bits can be moved in a space controlled manner, so that connectivity and parallelism of the quantum bits in the Redburg atomic platform are continuously changed along with execution of a quantum circuit line.
The inventor of the application discovers how to realize efficient compiling and running work of a quantum algorithm on a neutral atomic quantum computing platform, and reduces the influence of a Redberg global beam on a quantum gate which does not participate in computation, which is a problem to be solved currently.
Disclosure of Invention
The application aims to provide a quantum computing method and a quantum computing device based on a partition architecture, electronic equipment and a non-transitory computer readable storage medium, so as to solve the problem of influence of a Redberg global beam on a quantum gate which does not participate in computation.
According to one aspect of the application, a quantum computing method based on a partition architecture is provided, wherein the partition architecture comprises a storage area and an action area, the quantum computing method comprises the steps of responding to a quantum computing instruction, mapping an original circuit to the storage area to obtain a quantum circuit composed of a plurality of quantum gates, moving neutral atoms needing to participate in quantum gate computation of the quantum circuit to the action area for quantum computation, moving neutral atoms which are used for quantum computation and do not participate in next quantum gate computation to the storage area, and keeping the neutral atoms needing to participate in the next quantum gate computation in the action area.
According to some embodiments, moving neutral atoms needed to participate in quantum gate computation of the quantum circuit to the active region for quantum computation includes moving neutral atoms needed to participate in the quantum gate computation to the active region and quantum computation by an SLM array and an AOD array.
According to some embodiments, the neutral atoms involved in the quantum gate computation include a first neutral atom and a second neutral atom, moving the neutral atoms needed to participate in the quantum gate computation to the active region and performing quantum computation through an SLM array and an AOD array, including mapping the first neutral atom and the second neutral atom into the SLM array, moving the first neutral atom from the SLM array into the AOD array, and moving the first neutral atom to a second neutral atom adjacent position in the SLM array with the AOD array for quantum computation.
According to some embodiments, before moving neutral atoms that are required to participate in quantum gate computation of the quantum circuit to the region of action for quantum computation, determining an order of action of a plurality of quantum gates in the quantum circuit is further included.
According to some embodiments, determining the order of action of a plurality of quantum gates in the quantum circuit includes determining the order of action of a plurality of quantum gates in the quantum circuit in a manner that performs quantum gate operation as early as possible so as to minimize the total quantum gate execution time.
According to some embodiments, before mapping the first neutral atoms and the second neutral atoms into the SLM array, moving neutral atoms that are required to participate in the quantum gate computation to the active region and performing quantum computation by the SLM array and the AOD array, further comprising determining an arrangement of neutral atoms that are required to participate in the quantum gate computation in the active region using a simulated annealing algorithm.
According to some embodiments, before moving the neutral atoms which have completed quantum computation and do not participate in the next quantum gate computation to the storage area and retaining the neutral atoms which need to participate in the next quantum gate computation in the action area, the method further comprises determining the arrangement of the neutral atoms which currently participate in quantum computation by using a simulated annealing algorithm, moving the neutral atoms which have completed quantum computation and do not participate in the next quantum gate computation to the storage area according to the determined arrangement, and retaining the neutral atoms which need to participate in the next quantum gate computation in the action area.
According to one aspect of the application, a quantum computing device based on a partition architecture is provided, wherein the partition architecture comprises a storage area and an action area, the quantum computing device comprises a mapping unit, a quantum computing unit and a moving unit, wherein the mapping unit is used for mapping an original circuit to the storage area in response to a quantum computing instruction to obtain a quantum circuit composed of a plurality of quantum gates, the quantum computing unit is used for moving neutral atoms which need to participate in quantum gate computation of the quantum circuit to the action area for quantum computation, and the moving unit is used for moving the neutral atoms which complete quantum computation and do not participate in next quantum gate computation to the storage area and keeping the neutral atoms which need to participate in the next quantum gate computation in the action area.
According to an aspect of the application, an electronic device is proposed, comprising a processor, and a memory storing a computer program which, when executed by the processor, causes the processor to perform the quantum computing method as described in any of the previous embodiments.
According to an aspect of the application, a non-transitory computer-readable storage medium is presented, on which computer-readable instructions are stored, which, when executed by a processor, cause the processor to perform the quantum computing method as described in any of the previous embodiments.
According to the embodiment of the application, the quantum bits which do not participate in the quantum gate calculation are limited in the active area by adopting the partition architecture, and the quantum bits which do not participate in the quantum gate calculation are limited in the storage area, so that the influence of the Redberg global beam on the quantum bits which do not participate in the calculation is reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application as claimed.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the description of the embodiments will be briefly described below. The above and other objects, features and advantages of the present application will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
Fig. 1 shows a quantum computing method flow diagram based on a partition architecture according to an example embodiment of the application.
FIG. 2 shows a schematic diagram of an SLM array according to an example embodiment of the application.
Fig. 3 shows a schematic diagram of a method of photosite movement in an AOD array according to an example embodiment of the present application.
Fig. 4 is a schematic diagram of a pseudo code implementation process for determining the order of action of a plurality of quantum gates in a quantum circuit, according to one manner of operation of executing quantum gates as early as possible, according to an example embodiment of the present application.
FIG. 5 illustrates a pseudo-code implementation process for determining the arrangement of neutral atoms in an active region that are needed to participate in quantum gate calculations using a simulated annealing algorithm according to an exemplary embodiment of the present application.
Fig. 6 shows a block diagram of a quantum computing device based on a partition architecture according to an example embodiment of the application.
Fig. 7 illustrates an electronic device according to an exemplary embodiment of the present application.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein, but rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same drawing figures in the drawings show the same or similar parts, and thus a repetitive description thereof will be omitted.
The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the disclosed aspects may be practiced without one or more of the specific details, or with other methods, components, materials, devices, operations, etc. In these instances, well-known structures, methods, devices, implementations, materials, or operations are not shown or described in detail.
The flow diagrams depicted in the figures are exemplary only, and do not necessarily include all of the elements and operations/steps, nor must they be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the order of actual execution may be changed according to actual situations.
The terms first, second and the like in the description and in the claims and in the above-described figures are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Before describing embodiments of the present application, terms appearing in the present application will be explained first.
Quantum compiling, namely mapping the steps required to be executed according to the logic tasks of the quantum algorithm to physical bits, and performing corresponding physical operations to realize corresponding logic operations.
Neutral atoms, uncharged super-cooled atoms.
And the atom array is a neutral atom which is orderly arranged according to a certain rule.
SLM (SPATIAL LIGHT Modulator ) is a device used to create an array of optical tweezers. The laser can generate a plurality of optical tweezers points on a two-dimensional plane through the spatial light modulator, the number of the optical tweezers points is controllable, the positions of the optical tweezers points are not overlapped and are not movable, and the optical tweezers points are not limited at all.
AOD (Acousto Optical Deflectors, acousto-optic deflector for short), a device for producing an array of optical tweezers. The laser generates an optical tweezers point position array with a grid structure on a two-dimensional plane through the acousto-optic deflector, the number of the optical tweezers points is the number of rows and the number of columns, each row (column) of the optical tweezers array can move independently, but one row (column) cannot pass through the other row (column) when moving.
Routing, in performing quantum algorithm and quantum circuit tasks, positions or arrangements of the qubits are adjusted to meet physical limitations of quantum computer hardware, particularly limited by direct connections or interactions between the qubits.
Specific embodiments according to the present application will be described in detail below with reference to the accompanying drawings.
Fig. 1 shows a flowchart of a quantum computing method based on a partition architecture according to an exemplary embodiment of the present application, and the quantum computing method shown in fig. 1 includes steps S101, S103, and S105. A quantum computing method based on a partition architecture according to an exemplary embodiment of the present application will be described in detail with reference to fig. 1.
According to an embodiment of the present application, a partition architecture includes a storage area and an active area. The embodiment of the application is realized in a neutral atomic quantum computing platform.
As shown in fig. 1, in step S101, in response to a quantum computation instruction, an original line is mapped to a storage area, resulting in a quantum circuit composed of a plurality of quantum gates.
Since any single-qubit gate can be operated alone by a laser, other multi-bit quantum gates can be converted into single-quantum gates and/or combinations of two-quantum bit gates. Thus, in embodiments of the present application, any two qubit gates in the original line are converted to CZ gates in the neutral atomic quantum computing platform that neutral atoms can execute natively, resulting in a quantum circuit with only two qubit gates.
In step S103, the neutral atoms required to participate in quantum gate calculation of the quantum circuit are moved to the action region to perform quantum calculation.
According to an embodiment of the present application, before step S103, it is also necessary to determine the order of action of a plurality of quantum gates in the quantum circuit, and divide the quantum gates operated simultaneously into a group in the order of execution, which is referred to as a stage.
In a specific embodiment, the operation mode of executing the quantum gates as early as possible is adopted to determine the action sequence of a plurality of quantum gates in the quantum circuit so as to minimize the execution time of the total quantum gates.
According to an embodiment of the present application, in step S103, neutral atoms that are required to participate in the quantum gate calculation are moved to the active region, and quantum calculation is performed through the SLM array and the AOD array.
In a neutral atom platform, qubits can be flexibly transferred between different optical arrays, and one optical tweezer point can only accommodate one atom at most. The optical tweezer point location can be generated by two devices, one is a spatial light modulator and the other is an acousto-optic deflector.
The optical tweezers points generated by the spatial light modulator may be at any position on the two-dimensional plane, but these cannot be moved, in this embodiment, the optical tweezers points generated by the plurality of spatial light modulators are referred to as an SLM array, as shown in fig. 2.
The optical tweezers points generated by the acousto-optic deflectors must be in a lattice array structure on a plane, in this embodiment, the optical tweezers points generated by the acousto-optic deflectors are referred to as an AOD array, and the AOD optical tweezers array can be moved, but needs to be moved in whole rows or whole columns, as shown in fig. 3, which is an AOD array of 3 rows and 3 columns, and the AOD must be moved in whole rows or columns together, and fig. 3 shows the movement of the 3 rd row as a whole.
At most, only one set of SLM atomic array and one set of AOD atomic array can be simultaneously arranged in the prior art.
In this embodiment, atoms can be converted between an AOD array and an SLM array. The optical tweezer points in the SLM array can be turned on or off during the calculation process, and the optical tweezer array in the AOD array must be turned on or off in an entire row or column during the calculation process. The ordering of the AOD array during atomic movement needs to be maintained, one row cannot pass over another during movement, and one column cannot pass over another. Any single qubit gate can be operated alone by a laser. Two qubits can only perform a two bit CZ gate if the distance is within the reed-burg blocking radius and at the same time excited by the reed-burg laser. When two qubits perform a two-bit gate, no other atoms can be within the two-atom Redberg blocking radius.
According to an embodiment of the present application, the neutral atoms involved in quantum gate computation include a first neutral atom and a second neutral atom. When performing a two-qubit gate operation between two SLM rows:
first, mapping a first neutral atom and a second neutral atom into an SLM array;
Then, moving the first neutral atom from the SLM array into the AOD array;
finally, the first neutral atom is moved to a second neutral atom adjacent position in the SLM array using the AOD array for quantum computation.
According to some embodiments, before mapping the first neutral atom and the second neutral atom into the SLM array, in step S103, it is further necessary to determine the arrangement of the neutral atoms in the active region, which need to participate in the quantum gate calculation, by using a simulated annealing algorithm, so as to reduce the operation distance and the number of movements of the quantum gate.
In step S105, the neutral atoms that have completed the quantum computation and do not participate in the next quantum gate computation are moved to the storage region, and the neutral atoms that need to participate in the next quantum gate computation are left in the action region.
According to the embodiment of the application, before step S105, the arrangement of neutral atoms which are currently involved in quantum computation is determined by using a simulated annealing algorithm, and according to the determined arrangement, the neutral atoms which are subjected to quantum computation and do not participate in the next quantum gate computation are moved to a storage area, and the neutral atoms which are required to participate in the next quantum gate computation are reserved in an action area.
In some embodiments, steps S103 and S105 need to be repeated multiple times until the entire quantum wire execution is completed.
According to the embodiment shown in fig. 1, by adopting a partition architecture, the quantum bits of the quantum gate calculation are limited in the active region, and the quantum bits which do not participate in the quantum gate calculation are limited in the storage region, so that the influence of the reed-solomon global beam on the quantum bits which do not participate in the calculation is reduced.
According to other embodiments, coupling of non-adjacent qubits is achieved by transferring neutral atoms from fixed-position optical tweezer sites to movable optical tweezer sites. And by keeping the neutral atoms which need to participate in the calculation of the next quantum gate in the action area, not only the moving times of the quantum bit are reduced, but also the fidelity brought by the movement is reduced, and the routing overhead executed by the quantum circuit is reduced.
Fig. 4 is a schematic diagram of a pseudo code implementation process for determining the order of action of a plurality of quantum gates in a quantum circuit, according to one manner of operation of executing quantum gates as early as possible, according to an example embodiment of the present application.
As shown in fig. 4, to take advantage of the high parallelism of neutral atoms, an early (As Soon As Possible, ASAP for short) scheduling strategy is employed to divide the quantum circuit into different stages, and all two qubit gates within each stage can be executed in parallel. That is, for any given quantum circuit, quantum gate operations can be arranged as early as possible, minimizing the overall gate execution phase and time.
As shown in fig. 4, first, an empty schedule list_scheduling is initialized for storing the quantum gate operations that need to be performed at each stage.
Then, a list_qubit_stage is initialized for recording the current operation stage of each qubit, and an initial value is set to 0.
Thereafter, all gate operations gate are traversed:
For example, first, the current phases t q0 and t q1 of the two target qubits of the gate operation are fetched, and then the operational phase t g of the current qugate is determined to be the maximum of the two qubit phases to ensure that the operations preceding the two qubits have been completed. If the operational phase t g is not already contained in the schedule list_scheduling, a new operational phase is created.
Thereafter, the index of the current gate is added to the corresponding time slice t g and the operation phases of the two qubits are updated, indicating that they are scheduled to a new operation phase.
Finally, the list_scheduling is returned.
According to the embodiment shown in fig. 4, the quantum circuit is divided into different stages by adopting an early scheduling strategy, and all two quantum bit gates in each stage can be executed in parallel, so that the execution time of the total quantum gate is minimized, and high-parallelism compiling of the quantum bit operation is realized.
FIG. 5 illustrates a pseudo-code implementation process for determining the arrangement of neutral atoms in an active region that are needed to participate in quantum gate calculations using a simulated annealing algorithm according to an exemplary embodiment of the present application.
In the embodiment shown in fig. 5, the cost function is taken as energy EE, the value of which is the weighted sum of the distances between the atoms participating in the two-qubit gate per stage, wherein the weight decreases with increasing stages, and the specific formula is that for each stage the weight is max (1-0.1×stage, 0.1), the distance is the euclidean distance between the qubit mapping positions, and the total energy is the accumulation of the weighted distances of all stages.
The present embodiment uses a simulated annealing method to determine the arrangement of neutral atoms in the region of action that are required to participate in the quantum gate computation, with the goal of minimizing the time of movement and decoherence effects.
As shown in FIG. 5, an initial temperature is set and an initial placement scheme of the qubit is generated, a cost value cost is calculated, and then an iterative optimization process is performed.
In each iteration, where a movement constraint is met (e.g., movement can only be in row or column order), the positions of the two qubits are randomly swapped and the cost of the new placement scheme and the number of parallel movements are calculated. If the new scheme is lower in cost than the current scheme and the number of parallel movements is not increased, the method is directly accepted, and if the new scheme is higher in cost, whether the new scheme is accepted or not is determined according to probability, and the purpose is to explore a larger solution space in an initial stage so as to avoid sinking into local optimum. Then, as the temperature gradually decreases, the search range of the solution space contracts, and the algorithm tends to converge. The whole process gradually converges to a global optimal solution according to a preset cooling plan by continuously reducing the temperature, and finally outputs an optimized quantum bit placement scheme so as to improve the efficiency and the fidelity of quantum computing operation.
According to the embodiment shown in fig. 5, the "cooling" operation in the physical annealing process is simulated to avoid falling into local optimum, so as to find a global optimum solution, so that the global moving distance of atoms is shortest, the consumption time is least, the arrangement mode with relatively high overall fidelity is obtained, the problem of compiling and running the quantum algorithm efficiently on the neutral atomic quantum computing platform is solved, the realization of large-scale quantum algorithm on the neutral atomic quantum computing hardware platform is realized, and a solid foundation is laid for the rapid development of the field.
The embodiments of the present application have been described above mainly from the viewpoint of the method. Those of skill in the art will readily appreciate that the present application may be implemented in hardware or a combination of hardware and computer software, in conjunction with the operations or steps of the examples described in connection with the embodiments disclosed herein. Those skilled in the art may implement the described functionality in varying ways for each particular operation or method, and such implementation should not be considered to be outside the scope of the present application.
An embodiment of the device of the present application is described below. For details not described in the embodiments of the device according to the application, reference is made to the embodiments of the method according to the application.
Fig. 6 shows a block diagram of a quantum computing device based on a partition architecture according to an example embodiment of the present application, the quantum computing device shown in fig. 6 including a mapping unit 601, a quantum computing unit 603, and a mobile unit 605.
According to an embodiment of the present application, a partition architecture includes a storage area and an active area. The mapping unit 601 is used for mapping an original line to the storage area in response to a quantum computing instruction to obtain a quantum circuit composed of a plurality of quantum gates, the quantum computing unit 603 is used for moving neutral atoms which need to participate in quantum gate computation of the quantum circuit to the action area to perform quantum computation, and the moving unit 605 is used for moving neutral atoms which complete quantum computation and do not participate in next quantum gate computation to the storage area and keeping the neutral atoms which need to participate in the next quantum gate computation in the action area.
Fig. 7 illustrates an electronic device according to an exemplary embodiment of the present application. An electronic device 200 according to this embodiment of the application is described below with reference to fig. 7. The electronic device 200 shown in fig. 7 is only an example and should not be construed as limiting the functionality and scope of use of embodiments of the present application.
As shown in fig. 7, the electronic device 200 is in the form of a general purpose computing device. The components of the electronic device 200 may include, but are not limited to, at least one processing unit 210, at least one memory unit 220, a bus 230 connecting the different system components (including the memory unit 220 and the processing unit 210), a display unit 240, and the like.
In which a storage unit stores program code that can be executed by the processing unit 210 such that the processing unit 210 performs the methods according to various exemplary embodiments of the present application described in the present specification. For example, the processing unit 210 may perform the method as shown in fig. 1.
The storage unit 220 may include readable media in the form of volatile storage units, such as Random Access Memory (RAM) 2201 and/or cache memory 2202, and may further include Read Only Memory (ROM) 2203.
The storage unit 220 may also include a program/utility 2204 having a set (at least one) of program modules 2205, such program modules 2205 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment.
Bus 230 may be a bus representing one or more of several types of bus structures including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.
The electronic device 200 may also communicate with one or more external devices 300 (e.g., keyboard, pointing device, bluetooth device, etc.), one or more devices that enable a user to interact with the electronic device 200, and/or any device (e.g., router, modem, etc.) that enables the electronic device 200 to communicate with one or more other computing devices. Such communication may occur through an input/output (I/O) interface 250. Also, the electronic device 200 may communicate with one or more networks such as a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the Internet, through a network adapter 260. Network adapter 260 may communicate with other modules of electronic device 200 via bus 230. It should be appreciated that although not shown, other hardware and/or software modules may be used in connection with electronic device 200, including, but not limited to, microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.
From the above description of embodiments, those skilled in the art will readily appreciate that the example embodiments described herein may be implemented in software, or may be implemented in software in combination with the necessary hardware. The technical solution according to the embodiment of the present application may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (may be a CD-ROM, a usb disk, a mobile hard disk, etc.) or on a network, and includes several instructions to cause a computing device (may be a personal computer, a server, or a network device, etc.) to perform the above-described method according to the embodiment of the present application.
The software product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium can be, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of a readable storage medium include an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The computer readable storage medium may include a data signal propagated in baseband or as part of a carrier wave, with readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A readable storage medium may also be any readable medium that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server. In the case of remote computing devices, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., connected via the Internet using an Internet service provider).
The computer-readable medium carries one or more programs which, when executed by one of the devices, cause the computer-readable medium to perform the aforementioned functions.
Those skilled in the art will appreciate that the modules may be distributed throughout several devices as described in the embodiments, and that corresponding variations may be implemented in one or more devices that are unique to the embodiments. The modules of the above embodiments may be combined into one module, or may be further split into a plurality of sub-modules.
According to an embodiment of the present application, a computer program is presented, comprising a computer program or instructions which, when executed by a processor, can perform the method described above.
The foregoing has outlined rather broadly the more detailed description of embodiments of the application in order that the detailed description of the principles and embodiments of the application may be implemented in conjunction with the detailed description of embodiments of the application that follows. Meanwhile, based on the idea of the present application, those skilled in the art can make changes or modifications on the specific embodiments and application scope of the present application, which belong to the protection scope of the present application. In view of the foregoing, this description should not be construed as limiting the application.
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