CN1198317C - Formation method of oxide film preventing photoresist remover from attacking - Google Patents
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Abstract
Description
技术领域technical field
本发明是有关于一种防止光致抗蚀剂去除液侵蚀的氧化膜的形成方法,特别是有关于半导体组件的在多晶硅上氧化膜形成具有-O-N成分的表层,其-O-N成分的表层可在光致抗蚀剂去除过程中,抵抗光致抗蚀剂去除液中的氢氧化铵侵蚀氧化膜。The present invention relates to a method for forming an oxide film that prevents photoresist remover from being corroded, in particular to forming a surface layer with -O-N composition on the oxide film on polycrystalline silicon of semiconductor components, and the surface layer of the -O-N composition can be During the photoresist removal process, it resists the erosion of the oxide film by the ammonium hydroxide in the photoresist removal solution.
背景技术Background technique
在半导体前段制程(front end process)中,常以低压化学气相沉积法(CVD)沉积氧化膜(以下简称低压氧化膜)于多晶硅层上,来保护多晶硅层。其中,如果氧化膜/多晶硅界面越平坦,氧化膜越会有较佳的低漏电流及高崩溃电压等特性,而以低压化学气相沉积的方式形成低压氧化膜在多晶硅层上,可达到所述氧化膜/多晶硅界面平坦的要求。反之,直接在多晶硅层上以热氧化方式,消耗多晶硅原子所形成的氧化膜,其氧化膜/多晶硅界面粗糙,氧化膜会有高漏电流及低崩溃电压等特性。In the front end process of semiconductors, an oxide film (hereinafter referred to as low-pressure oxide film) is often deposited on the polysilicon layer by low-pressure chemical vapor deposition (CVD) to protect the polysilicon layer. Among them, if the oxide film/polysilicon interface is flatter, the oxide film will have better characteristics such as low leakage current and high breakdown voltage, and the formation of a low-pressure oxide film on the polysilicon layer by low-pressure chemical vapor deposition can achieve the above-mentioned Requirements for flat oxide film/polysilicon interface. On the contrary, if the oxide film formed by thermal oxidation directly on the polysilicon layer consumes polysilicon atoms, the oxide film/polysilicon interface will be rough, and the oxide film will have characteristics such as high leakage current and low breakdown voltage.
其中,特别是在非易失性存储器组件中,多晶硅上氧化膜常是重要的介电材料。为了保持存储器组件储存资料的可靠性,此介电材料必须具有低漏电流(Low Leakage Current)及高崩溃电压(High Breakdown Voltage)等特性。而这些特性又与多晶硅上氧化膜和多晶硅的界面平坦程度有密切的关系。所以一般多晶硅上氧化膜大都使用低压化学气相沉积(LPCVD)方式,以SiH4或TEOS为前驱物(precursor)来沉积低压氧化膜,作为非易失性存储器组件中电容的介电材料。Among them, especially in non-volatile memory components, the oxide film on polysilicon is often an important dielectric material. In order to maintain the reliability of the data stored in the memory device, the dielectric material must have characteristics such as low leakage current and high breakdown voltage. These characteristics are closely related to the flatness of the interface between the oxide film on the polysilicon and the polysilicon. Therefore, low-pressure chemical vapor deposition (LPCVD) is generally used for the oxide film on polysilicon, and SiH 4 or TEOS is used as a precursor to deposit a low-pressure oxide film, which is used as a dielectric material for capacitors in non-volatile memory components.
但是低压氧化膜常在光致抗蚀剂去除过程中,因光致抗蚀剂去除液(stripper)中所含氢氧化铵(NH4OH)的成分,会侵蚀低压氧化膜,甚至进一步移除低压氧化膜,造成多晶硅层曝露。However, the low-pressure oxide film is often removed during the photoresist removal process. Due to the composition of ammonium hydroxide (NH 4 OH) contained in the photoresist stripper (stripper), it will erode the low-pressure oxide film and even further remove it. Low pressure oxide film, resulting in polysilicon layer exposure.
因此,如何在光致抗蚀剂去除时,不会侵蚀或进一步移除多晶硅层上低压氧化膜成为重要课题。其中,可能的解决方案主要有以下两种:Therefore, how to not corrode or further remove the low pressure oxide film on the polysilicon layer during the removal of the photoresist becomes an important issue. Among them, there are mainly two possible solutions:
1、以低压化学气相沉积法(LPCVD)形成氮化硅(以下简称低压氮化硅)代替低压氧化膜,抵抗氢氧化铵侵蚀。1. Silicon nitride (hereinafter referred to as low-pressure silicon nitride) is formed by low-pressure chemical vapor deposition (LPCVD) instead of low-pressure oxide film to resist ammonium hydroxide erosion.
2、以N2O、N2或NH3气体等离子体处理低压氧化膜表层,使低压氧化膜表层形成-O-N成分,以抵抗光致抗蚀剂去除液中的氢氧化铵侵蚀。2. Treat the surface layer of the low-pressure oxide film with N 2 O, N 2 or NH 3 gas plasma, so that the surface layer of the low-pressure oxide film forms -ON components to resist the erosion of ammonium hydroxide in the photoresist removal solution.
但是,低压氮化硅与多晶硅层之间有应力无法匹配,而造成漏电流问题;而以等离子体处理低压氧化膜,表层会有等离子体损害(Plasma damage)问题。However, the stress between the low-voltage silicon nitride and the polysilicon layer cannot be matched, which causes the problem of leakage current; while the low-voltage oxide film is treated with plasma, the surface layer will suffer from plasma damage.
发明内容Contents of the invention
本发明的主要目的是提供一种防止光致抗蚀剂去除液侵蚀的氧化膜的形成方法,通过将含氮元素注入于氧化膜的表层中,使多晶硅上的氧化膜形成具有-O-N成分的表层,在光致抗蚀剂去除过程中,达到抵抗光致抗蚀剂去除液中的氢氧化铵侵蚀的目的。The main purpose of the present invention is to provide a method for forming an oxide film that prevents photoresist removal solution from corroding, by injecting nitrogen-containing elements into the surface layer of the oxide film, the oxide film on polysilicon is formed to have -O-N composition The surface layer, in the photoresist removal process, achieves the purpose of resisting the erosion of ammonium hydroxide in the photoresist removal solution.
本发明的目的是这样实现的:一种防止光致抗蚀剂去除液侵蚀的氧化膜的形成方法,其特征是:它包括以下步骤:The object of the present invention is achieved like this: a kind of formation method of the oxide film that prevents photoresist removal solution from corroding, it is characterized in that: it may further comprise the steps:
(1)提供一基底,所述基底具有多晶硅层;(1) providing a substrate, the substrate has a polysilicon layer;
(2)沉积一氧化膜于所述多晶硅层上;(2) depositing an oxide film on the polysilicon layer;
(3)在含氮元素气体下,回火处理所述氧化膜,于所述氧化膜的表面形成一具有-O-N成分的表层。(3) Tempering the oxide film under a nitrogen-containing gas to form a surface layer with —O—N composition on the surface of the oxide film.
该基底为硅基底。该氧化膜是以化学气相沉积法形成。该含氮元素气体包括N2、NH3或N2O气体。该回火处理的温度为650℃,时间为30-60分钟。The substrate is a silicon substrate. The oxide film is formed by chemical vapor deposition. The nitrogen-containing gas includes N 2 , NH 3 or N 2 O gas. The temperature of the tempering treatment is 650° C., and the time is 30-60 minutes.
本发明还提供一种形成半导体器件的方法,其特征是:它包括以下步骤:The present invention also provides a method for forming a semiconductor device, characterized in that it comprises the following steps:
(1)沉积一氧化膜于具有栅极的基底上;(1) Depositing an oxide film on a substrate with a gate;
(2)在含氮元素气体下,热回火处理所述氧化膜表层,以于所述氧化膜的表面形成一具有-O-N成分的表层;(2) under nitrogen-containing gas, thermally tempering the surface layer of the oxide film to form a surface layer with -O-N composition on the surface of the oxide film;
(3)形成一光致抗蚀剂层图案于所述氧化膜上;(3) forming a photoresist layer pattern on the oxide film;
(4)蚀刻所述氧化膜,定义出补偿侧壁绝缘物于所述栅极表面;(4) etching the oxide film to define a compensation sidewall insulator on the surface of the gate;
(5)使用光致抗蚀剂去除液,移除所述光致抗蚀剂图案。(5) Using a photoresist remover, the photoresist pattern is removed.
在移除所述光致抗蚀剂图案之后,更包括以下步骤:After removing the photoresist pattern, further include the following steps:
A、离子注入于所述基底中,形成源极/漏极延伸区域;A. Ions are implanted into the substrate to form source/drain extension regions;
B、形成一侧壁绝缘物于所述栅极两侧的所述补偿侧壁绝缘物上;B. Forming sidewall insulators on the compensation sidewall insulators on both sides of the gate;
C、离子注入于所述基底中,形成源极/漏极区域。C. Ions are implanted into the substrate to form source/drain regions.
所述基底为硅基底。所述栅极包括多晶硅栅及栅氧化膜。所述氧化膜是以化学气相沉积法形成。所述含氮元素气体包括N2、NH3或N2O气体。所述离子注入是包括磷、砷或硼离子。所述回火处理的温度为650℃及时间为30-60分钟。The substrate is a silicon substrate. The gate includes a polysilicon gate and a gate oxide film. The oxide film is formed by chemical vapor deposition. The nitrogen-containing gas includes N 2 , NH 3 or N 2 O gas. The ion implantation includes phosphorous, arsenic or boron ions. The temperature of the tempering treatment is 650° C. and the time is 30-60 minutes.
本发明的防止光致抗蚀剂去除液侵蚀的氧化膜的形成方法可得到蚀刻速率比未处理的氧化膜的高1.2-1.5倍,且没有因与多晶硅层之间应力无法匹配而造成漏电流问题。The method for forming an oxide film that prevents photoresist removal liquid erosion of the present invention can obtain an etching rate 1.2-1.5 times higher than that of an untreated oxide film, and there is no leakage current caused by the incompatibility of the stress with the polysilicon layer question.
本发明以含氮元素的气体为气氛,对所述氧化膜进行热回火炉管处理,其制程成本较低,并能增进所述氧化膜的蚀刻速率,具有较佳蚀刻选择比。The present invention uses nitrogen-containing gas as an atmosphere to carry out thermal tempering furnace tube treatment on the oxide film, the process cost is low, the etching rate of the oxide film can be increased, and the etching selectivity ratio is better.
下面结合较佳实施例和附图进一步说明Further description below in conjunction with preferred embodiments and accompanying drawings
附图说明Description of drawings
图1-图5为本发明的防止光致抗蚀剂去除液侵蚀的氧化膜的形成方法的示意图。1 to 5 are schematic diagrams of the method for forming an oxide film that prevents photoresist remover from being corroded by the present invention.
具体实施方式Detailed ways
参阅图1-图5所示,本发明的防止光致抗蚀剂去除液侵蚀的氧化膜的形成方法,包括如下步骤:Referring to Fig. 1-shown in Fig. 5, the formation method of the oxide film that prevents photoresist removal liquid from corroding of the present invention, comprises the steps:
参阅图1所示,首先提供一基底10,该基底10上已形成有多晶硅栅11及栅氧化膜12。然后,以TEOS(tetra-ethyl-ortho-silicate)或硅甲烷(SiH4)为前驱物,以低压化学气相沉积(LPCVD)制程形成沉积一氧化膜13(例如氧化硅,厚度约为300埃)于多晶硅栅11上。Referring to FIG. 1 , firstly, a substrate 10 is provided, on which a polysilicon gate 11 and a gate oxide film 12 have been formed. Then, using TEOS (tetra-ethyl-ortho-silicate) or silane (SiH 4 ) as a precursor, a low-pressure chemical vapor deposition (LPCVD) process is used to form a deposited oxide film 13 (such as silicon oxide, with a thickness of about 300 angstroms) on the polysilicon gate 11.
其中栅氧化膜12(gate oxide)通常是在高温如900℃的环境下,以热氧化制程,如干式氧化法来形成,多晶硅栅11以硅甲烷(SiH4)为主反应物,并通过低压化学气相沉积(LPCVD)制程形成,接着依光刻制程和蚀刻技术定义形成栅氧化膜12反多晶硅层栅极11。The gate oxide film 12 is usually formed by a thermal oxidation process, such as a dry oxidation method, at a high temperature such as 900°C. The polysilicon gate 11 uses silane (SiH 4 ) as the main reactant and is passed through It is formed by a low pressure chemical vapor deposition (LPCVD) process, and then the gate oxide film 12 and the polysilicon layer gate 11 are formed according to the definition of the photolithography process and etching technology.
参阅图2所示,针对图1所述的基底10,在含氮元素气体下(例如N2、NH3及N2O)实施热回火(anneling)制程,使氮元素与氧化膜13的氧元素产生化学键结,而使氧化膜形成具有-O-N成分的表层14,其中热回火时间及温度分别约为30-60分钟及650℃Referring to FIG. 2, for the substrate 10 described in FIG. 1, a thermal annealing (anneling) process is implemented under a nitrogen-containing gas (such as N 2 , NH 3 and N 2 O), so that the nitrogen element and the oxide film 13 Oxygen elements produce chemical bonds, so that the oxide film forms a surface layer 14 with -ON composition, and the thermal tempering time and temperature are about 30-60 minutes and 650°C respectively
参阅图3所示,以光刻制程定义一光致抗蚀剂层15的图案在多晶硅栅11上的氧化膜13的表层14上。然后,以光致抗蚀剂层15为掩模(mask),对氧化膜13及表层14实施异方向性蚀刻,形成补偿侧壁绝缘物(offset spacer)16于栅极17表面。Referring to FIG. 3 , a pattern of a photoresist layer 15 is defined on the surface layer 14 of the oxide film 13 on the polysilicon gate 11 by a photolithography process. Then, using the photoresist layer 15 as a mask, anisotropic etching is performed on the oxide film 13 and the surface layer 14 to form a compensation sidewall insulator (offset spacer) 16 on the surface of the gate 17 .
参阅图4所示,接着使用光致抗蚀剂去除液,移除光致抗蚀剂图案。其中,因氧化膜13的表层14具有-O-N成分,可抵抗光致抗蚀剂去除液中氢氧化铵侵蚀。接下来,以补偿侧壁物16为掩模(mask),实施离子注入制程,将砷(As)或磷(P)离子注入于于图3所述的基底10,形成源极/漏极延伸区域18,其中注入的离子浓度不高,主要用来调整栅极的起始电压(thresholdvotage)。Referring to FIG. 4 , the photoresist pattern is then removed using a photoresist remover. Wherein, because the surface layer 14 of the oxide film 13 has -O-N composition, it can resist the erosion of ammonium hydroxide in the photoresist removal solution. Next, the ion implantation process is implemented by using the compensation sidewall material 16 as a mask, and arsenic (As) or phosphorus (P) ions are implanted into the substrate 10 described in FIG. 3 to form source/drain extensions. Region 18, where the concentration of implanted ions is not high, is mainly used to adjust the threshold voltage of the gate.
参阅图5所示,以低压化学气相沉积(LPCVD)制程形成沉积一氧化膜(例如氧化硅,厚度约为300埃)于图4所述的基底10上。之后,对氧化膜实施异方向性蚀刻,去除部分氧化膜及部分补偿侧壁物16,形成侧壁绝缘物19’(spacer)于栅极17两侧的补偿侧壁绝缘物16上,再以离子注入制程,注入砷(As)或磷(P)离子于基底10,形成源极及漏极区域20。Referring to FIG. 5 , an oxide film (such as silicon oxide with a thickness of about 300 angstroms) is deposited on the substrate 10 shown in FIG. 4 by a low pressure chemical vapor deposition (LPCVD) process. Afterwards, anisotropic etching is performed on the oxide film, part of the oxide film and part of the compensation sidewall 16 are removed, and sidewall insulators 19' (spacers) are formed on the compensation sidewall insulators 16 on both sides of the gate 17, and then In the ion implantation process, arsenic (As) or phosphorus (P) ions are implanted into the substrate 10 to form source and drain regions 20 .
虽然本发明已以较佳实施例揭露如上,然其并非用以限定本发明,任何熟习此技艺者,在不脱离本发明的精神和范围内,所作各种的更动与润饰,都属于本发明的保护范围之内。Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any modifications and modifications made by those skilled in the art without departing from the spirit and scope of the present invention belong to the present invention. within the scope of protection of the invention.
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