CN1194714A

CN1194714A - Audio Storing and reproducing apparatus

Info

Publication number: CN1194714A
Application number: CN97190554A
Authority: CN
Inventors: 相原文一
Original assignee: Casio Computer Co Ltd
Current assignee: Casio Computer Co Ltd
Priority date: 1996-05-16
Filing date: 1997-05-09
Publication date: 1998-09-30

Abstract

An audio storing and reproducing apparatus is provided that has a semiconductor chip and a control unit. The semiconductor chip includes a semiconductor memory having a plurality of storage areas, a single storage specifying input terminal, a single reproduce specifying input terminal, and a storage medium controller that controls storing of the audio data to the storage areas and readout of the audio data therefrom in accordance with the signal input to the storage specifying and reproduce specifying input terminals. The control unit includes a single storage area specifying switch, a single storage specifying switch, a single reproduce specifying switch and a control circuit. The control circuit send a storage area specifying signal to the storage specifying input terminal when the storage area specifying switch is operated, generates a storage specifying signal after sending of the storage area specifying signal to the storage specifying input terminal when the storage specifying switch is operated, and sends a reproduce specifying signal to the reproduce specifying input terminal when the reproduce specifying switch. Thus, recording on and reproducing from the plural storage areas of the semiconductor memory is selectively performed in accordance with the signals input to two input terminals-i.e., the storage specifying input terminal and reproduce specifying input terminal.

Description

Audio storage and regenerating unit

Technical field

The present invention relates to the audio storage and the regenerating unit of the voice data of stores audio data and regeneration storage.

Background technology

Existing a kind of audio storage and regenerating unit, the audio-frequency signal coding (A/D conversion) that it supplies with the outside, with resulting signal storage in semiconductor memory such as RAM, parts by operation regenerative switch and so on read encoded signals from RAM, and the signal read of decoding (D/A conversion), provide audio frequency to export thus, as United States Patent (USP) NO.4, disclosed in 368,988.

Utilize traditional audio storage and regenerating unit, when using single semiconductor memory, in record or regenerative operation, carry out addressing since first address as single record and regenerating unit.Yet, if single semiconductor memory is divided into piece, and selects some pieces to write down or regenerate, must begin to carry out addressing from the start address of selected block.For accomplishing this point, must begin to send the data on the selected block start address to the address control section from start address, preset it, and upgrade this address.When coded data is stored in volatile storage, in the time of for example among the RAM, will disappear in battery end of life, the content of storing when changing battery or power fail occurring.For avoiding losing the data of storage, can consider to use nonvolatile memory, for example EEPROM.Yet, compare the exigent driving voltage of EEPROM with the cmos circuit of for example on about 1V, working.Owing to this reason, be operated on the relatively low voltage, be used for controlling recording and regenerative operation circuit and comprise that the circuit of nonvolatile memory has to be made of the chip that separates, their need be controlled by different voltage respectively.As above-mentioned, when assemble main circuit part and the circuit that comprises nonvolatile memory by the chip that separates, and as described above single nonvolatile memory is divided into polylith, and select some pieces to write down and when regenerating, the start address of necessary each piece of directly address, the result needs the input end of a plurality of terminals as address date, and this causes following problem: the chip size that comprises nonvolatile memory becomes very big.

The present invention's general introduction

The purpose of this invention is to provide a kind of audio storage and regenerating unit, it is divided into piece with storer, and can optionally store data playback of data in piece or from piece on the basis of piece, and can not make circuit arrangement complicated.

Above-mentioned purpose realizes that by following audio storage and regenerating unit are provided it comprises: the semiconductor chip, and this chip comprises the semiconductor memory with a plurality of memory blocks; Input end is specified in storage, will specify the memory block specification signal of the memory block that will store or regenerate among a plurality of memory blocks that be used in semiconductor memory and be used for specifying the storage specification signal of stores audio data to input to it; Input end is specified in regeneration, specifies the regeneration specification signal of reproducing audio data to input to it with being used for; And storage medium control device, not only be used for specifying the memory block that to store or to regenerate and voice data being stored in the specified memory, and read the voice data that is stored in designated storage area according to the regeneration specification signal according to the storage specification signal according to the memory block specification signal; And control device, it comprises memory block assigned switch device, record assigned switch device, regeneration assigned switch device and control circuit, control circuit sends to storage with the memory block specification signal and specifies input end when operation store district assigned switch device, control circuit sends to storage with the memory block specification signal and specifies input end when operation note assigned switch device, and specification signal is write down in transmission subsequently, and the specification signal of will regenerating when operation regeneration assigned switch device sends to regeneration appointment input end.

Because the input storage specification signal specifies the regeneration of input end and input regeneration specification signal to specify input end that semi-conductor chip is connected with control circuit with the storage of storage specification signal, audio storage of the present invention and regenerating unit have the following advantages: semiconductor memory can be divided into piece and can select the piece that will write down and regenerate block by block, and can not make circuit arrangement complicated or increase the number of terminals of semi-conductor chip.

Brief description of drawings

Fig. 1 is the block scheme according to the portable electron device of the embodiment of the invention;

Fig. 2 is the concept map of the data structure of RAM9 among Fig. 1;

Fig. 3 is the circuit diagram of control section 20 among Fig. 1;

Fig. 4 is the concept map of relation between record controls signal S1 (256Hz) and the clock  (32Hz) in the key drawing 3;

Fig. 5 is a process flow diagram of explaining main operation;

Fig. 6 is the operational flowchart that key is handled in the key drawing 5;

Fig. 7 is the operational flowchart that key is handled in the key drawing 5;

Fig. 8 is the regeneration mode displayed map on the LCD display 14 among Fig. 1; And

Fig. 9 is the regeneration mode displayed map on the LCD display 14 among Fig. 1.

Implement optimal mode of the present invention

Below, with reference to the accompanying drawings, explain accutron, portable electron device according to embodiments of the invention.

The configuration of A, embodiment

Fig. 1 is the block scheme by the accutron of embodiments of the invention.Among the figure, the accutron of this embodiment has the function of table, computing function, the many names of storage and telephone number data item and other also to show their database function, and record is supplied with from the outside in storer speech and its p.m.entry function of regenerating.Accutron comprises a chip controls integrated circuit 1 and a chip memory control integrated circuit 2, control integrated circuit 1 is by C-MOS device for example and be used for the control device of controlling recording and regeneration speech and form, and the C-MOS device includes the treatment circuit of realizing table function, computing function and database function; And storer control integrated circuit 2 comprises nonvolatile memory, by the instantaneous EEPROM of for example stores audio data and the control device that is used for controlling nonvolatile memory and address form.Control integrated circuit 1 and storer control integrated circuit 2 are worked under different driving voltage, but all are to obtain power supply source from same battery.They are designed to be created in required voltage in the power circuit in each integrated circuit.

At first, explain control integrated circuit 1 and peripheral circuit thereof.The regeneration key 3b and the options button 3c of the voice data that key input part 3 comprises numerical key and the character keys (not shown), the record key 3a that is used for recording audio data that are used for importing various data, be used for regenerative recording, options button are used for selecting from the memory block of the EEPROM25 that will explain subsequently (8) with data storage wherein or from the piece of regeneration wherein.Each key input signal from key input part 3 is sent to control section 7, and it detects the key input then.

Oscillatory circuit 4 produces the reference clock of characteristic frequency and it is offered frequency sharing circuit 5.Frequency sharing circuit 5 produces and output system clock and various timer clock according to reference clock, so that running time holding circuit 6, control section 7 and other each part.From one second signal of the timer clock of frequency sharing circuit 5, promptly be used for the basis of the reference signal of retention time, the time holding circuit 6 pairs of current time (date in date, week, hour, minute, second) timing, and divide 7 with its supply control part.

Control section 7 is a CPU (central processing units), and it is stored in the above-mentioned various functions that specific microprogram among the ROM8 that will explain is subsequently realized accutron by execution.In the present embodiment, especially, the processing procedure of control section through explaining subsequently with audio data recording to by dividing in the piece that the EEPROM25 will explain subsequently obtains and from reproducing audio data wherein.Particularly, control section 7 makes the pieces that write down and regenerate move a piece circularly at every turn when pushing options button 3c, make thus desirable selected.When pushing record key 3a, control section stores in the piece selected the EEPROM voice data from the speech of microphone 5 inputs into.When pushing regeneration key 3b, control section makes the voice data regeneration in the selected piece that is stored among the EEPROM25.When pressing record key 3a and regeneration key 3b simultaneously, control section makes various signs among the RAM9 that will explain below being stored in and date and time data item deleted.

Microprogram and various initial parameter that the ROM8 storage is carried out by control section 7.RAM9 is as register and the workspace of a storage as the resultant various data item of control section 7 executive routines.

Fig. 2 is the concept map of the data structure of RAM9.In Fig. 2, display register is to be used for being stored in the register that the following LCD display (LCD) that will explain goes up the data that show various data item.Register M is used for specifying the register of wanting the designated recorder/reconstituting piece of stores audio data in 8 pieces of EEPROM25.

Mark P is the sign that the expression speech just is being recorded.When sign was in " 1 ", the encoded part of speech (coding circuit) 6 of microphone 5 inputs that will explain from below was accepted, and is stored among the EEPROM25 as voice data.Sign L is the sign that the expression speech just is being reproduced.When this sign is in " 1 ", the loudspeaker 11 that the voice data of reading from EEPROM25 will be explained below the following decoded portion that will explain (decoding circuit) 10 is exported to.

Each register R0, R1 ..., R7 has the district (register T) of the date and time that the stores audio data of being used for is recorded and the sign F whether expression has recorded this piece.Be respectively piece (among the embodiment being 8) among the EEPROM25 provide these registers R0, R1 ... R7.When not having voice data to be recorded, sign F is " 0 ".When recording voice data, sign F is " 1 ".In the present embodiment, because EEPROM25 such as above-mentionedly be divided into 8 pieces, thereby register M specifies that piece that will store and regenerate with 3 piece specific datas.

In Fig. 1, driver 13 shows the voice data of storing from the various data item of relevant time, computational data, name and the telephone number data of control section 7 supplies and EEPROM25 on LCD (liquid crystal) display 14.LCD display 14 comprises dot matrix or segment type electrode.In clock module, LCD display shows date, current time and that piece of having write down.In the record or regeneration of voice data, LCD display shows current time, the piece that just is being recorded and writing time at least, shown in the following demonstration example that will explain.

According to the operation of record key 3a, regeneration key 3b and options button 3c, control section 7 is with following three kinds of mode set or reset flip-flop F1 and F2.

When (1) pushing options button 3c, the set end of control section trigger F1 is set to " 1 " at every turn, and its reset terminal is set to " 1 " then, and the output terminal Q of slave flipflop F1 sends the pulse in one 1/256 cycle (256Hz) thus.In the control section 20 of storer control integrated circuit 2, this pulse is supplied with piece control section 21 as piece specification signal BL, is used for specifying the piece among the EEPROM25.

(2) when pushing record key 3a, at first (256Hz) the lining set of 1/256 cycle and reset flip-flop F1 seven times, control section set end is set to " 1 " then, is " 1 " to force output terminal Q.When decontroling record key 3a, the reset terminal of control section trigger F1 is set to " 1 ", is " 0 " to force output terminal Q.

(3) when pushing regeneration key 3b, at first (256Hz) the lining set of 1/256 cycle and reset flip-flop F2 seven times, control section set end is set to " 1 " then, is " 1 " to force output terminal Q.When decontroling regeneration key 3b, the reset terminal of control section trigger F2 is set to " 1 ", is " 0 " to force output terminal Q.

Each trigger F1 and F2 supply with output Q to the control section 20 of storer control integrated circuit 2, and its output level is opened and closed under the control of control section 7.Power suppling part divides 15 will be converted to the driving voltage that is used to operate control integrated circuit 1 from the voltage supplied of common battery BT, and with above-mentioned each part of drive voltage supply.

Below, will explain storer control integrated circuit 2 and peripheral circuit thereof.On the basis of the output Q that the output Q and the slave flipflop F2 of the supply of the trigger F1 from control integrated circuit 1 supply with, control section 20 produces the regenerated signal of the block signal that is used to specify the piece among the EEPROM25, the tracer signal of representing record, expression regeneration and is used to remove the clear signal of the voice data of record, and, tracer signal, regenerated signal and clear signal are supplied with address control section 22 with block signal and clear signal supply piece control section 21.

Fig. 3 is the circuit diagram of control section 20.Among the figure, OR circuit 20a produces block signal BL, and when the output Q of the output Q of trigger F1 or trigger F2 was " 1 ", this block signal BL became " 1 " and block signal BL is offered piece control section 21.Particularly, when trigger F1 or trigger F2 supplied with OR circuit with a pulse, OR circuit was supplied with piece control section 21 with a pulse packet signal.When the output Q of the output Q of trigger F1 and trigger F2 became " 1 ", "AND" circuit 20b produced a clear signal CL who becomes " 1 ", and this clear signal is supplied with address control section 22.Clear signal CL is reverse by NOT circuit 20c, and this reverse signal is provided for "AND" circuit 20d and 20h.

When clear signal CL is that (1/32 second cycle: during 32Hz) for " 1 ", "AND" circuit 20d supplies with 3 bit shift register 20e with the output Q of trigger F1 for " 0 " and clock .When each "AND" circuit 20d supplied with record controls signal S1,3 bit shift register 20e are the position of mobile storage in proper order, and a position was supplied with the set end S of trigger F3.As a result, when the 4th clock of clock  is supplied with "AND" circuit 20d, 3 bit shift register 20e set flip-flop F3.In other words, when the 4th clock of clock  has been supplied with trigger F3, ability set flip-flop F3.

When from 3 bit shift register 20e when trigger F3 supplies with clock, trigger F3 is set (Q=1).Since when the output Q of trigger F1 becomes " 0 " through NOT circuit 20f to trigger F3 supply reset signal, thereby trigger F3 be reset (Q=0).

Because clock  is defined as 32Hz, even trigger F1 will have the clock in 1/256 cycle and supply with trigger F3 among Fig. 1, trigger F3 can not be set (Q=1) immediately yet, only just is set (Q=1) after 2/32 to 3/32 second.

The output Q of trigger F3 supplies with the input end of "AND" circuit 20g.When the output of trigger F1 and F3 all is " 1 ", just than first among trigger F1 supplies with late 2/32 second to 3/32 second time to time of reset flip-flop F1 time of the clock with 1/256 cycle, by with the output Q of the output Q of trigger F1 and trigger F3 mutually " with ", "AND" circuit 20g produces output " 1 "."AND" circuit will be exported the address control section 22 among " 1 " supply Fig. 1, as record controls signal S1.

As above-mentioned, when pushing record key 3a, control section 7 trigger F1 are set to the open record pattern.In this embodiment, owing to use same trigger F1 to select piece in advance, designated recorder is supplied with piece control section 21 through OR circuit 20a with block signal BL when the open record pattern then, and selected is changed.For avoiding these, in the present embodiment, between 2/32 to 3/32 second after pushing record key 3a, reach specific times (number of piece-1: be 7 times in the present embodiment) by in 1/256 cycle, repeating set and reset flip-flop F1, the piece that is provided with is become be right after the piece before the selected piece in piece control section 21.After this set flip-flop F1.

As a result, trigger F1 is set to the open record pattern makes the record controls signal S1 that is used for the open record pattern be supplied to control section 20, and makes the piece opsition dependent in the piece control section 21 increase by 1, and this makes the piece of selecting in advance be set up again.In this embodiment, because trigger F1 is set in 1/256 cycle and resets, and send record controls signal S1, so as long as repeat set and reset flip-flop F1 does not then send record controls signal S1 at the 4th clock of the clock  in 1/32 cycle (32Hz).Therefore, the use single line can physical block and record.

Below, (1/32 cycle: when 32Hz) being in " 1 ", "AND" circuit 20h supplies with 3 bit shift register 20i with the output Q of trigger F2 when clear signal CL is in " 0 " and clock .When each "AND" circuit 20h supplies with regeneration control signal S2, the position of 3 bit shift register 20i order mobile storage, and with they set end S for trigger F4.As a result, when the 4th clock of clock  supplied with "AND" circuit 20h as shown in Figure 4,3 bit shift register 20i set flip-flop F4.In other words, when the 4th clock of clock  supplied with "AND" circuit 20h, just can set flip-flop F4.

Supply with clock from 3 bit shift register 20i to trigger F4, trigger F4 is set (Q=1).When the output of trigger F2 becomes " 0 ", through NOT circuit 20j reset signal is supplied with trigger F4, thus reset flip-flop F4 (Q=0).Because trigger F4 uses the clock  of 32Hz, have the clock in 1/256 cycle even supply with it from trigger F2 shown in Figure 1, it can not be set (Q=1) at once yet, but is set (Q=1) after 2/32 to 3/32 second.

The output Q of trigger F4 supplies with the input end of "AND" circuit 20k.When the output Q of the output Q of trigger F2 and trigger F4 is " 1 ", just than supplying with late 2/32 second to 3/32 second time time of clock between the time of reset flip-flop F2 to trigger F2 first with 1/256 cycle, "AND" circuit 20k with the output Q of the output Q of trigger F2 and trigger F4 mutually " with ", produce output " 1 " thus."AND" circuit 20k will export " 1 " and supply with address control section 22 as regeneration control signal S2, as shown in Figure 1.

As above-mentioned, when pushing regeneration key 3b, control section 7 set flip-flop F2 are to open regeneration mode.In this embodiment, owing to use same trigger F2 to select piece in advance, specify regeneration then, through OR circuit 20a block signal BL is supplied with piece control section 21 when opening regeneration mode, the piece of Xuan Zeing is changed like this.For avoiding these, in the present embodiment, as at logging mode, between 2/32 second to 3/32 second after pushing record key 3b, reach specific times (number of piece-1: be 7 times among the embodiment) by in 1/256 cycle, repeating set and reset flip-flop F2, the piece that is provided with is become be right after the piece before the selected piece in piece control section 21.After this set flip-flop F2.

The result, as in logging mode, trigger F2 is set to the open record pattern makes the regeneration control signal S2 be used to open regeneration mode be supplied to control section 20, and makes the piece opsition dependent in the piece control section 21 increase by 1, and this makes the piece of selecting in advance be provided with once more again.Also be in this case, because trigger F2 is set in 1/256 cycle and resets, and send regeneration control signal S2 at the 4th clock of the clock  with 1/32 cycle (32Hz), so, then do not send regeneration control signal S2 as long as repeat set and reset flip-flop F2.Therefore, single line enough is used for regenerating.

In Fig. 1, piece control section 21 is one 3 bit registers, it is counted the block signal BL that supplies with from control section 20, and resulting signal is supplied with address control section 22 as piece specific data (3) BD, indicates to record wherein or from the piece of its regeneration.Address control section 22 carries out addressing and visit according to the record controls signal S1, regeneration control signal S2, clear signal CL and the piece specific data BD that supply with from control section 20.Microphone 23 is collected user's speech and sound signal is supplied with coded portion 24.Coded portion 24 comprises amplifier, wave filter, A/D change-over circuit (all not expressing), and sound signal is converted to digital signal (voice data), and the signal of conversion is supplied with EEPROM25.Decoded portion 26 will be converted to simulating signal from the voice data of being supplied with by the memory block of the piece the EEPROM25 of address control section 22 visits, export from loudspeaker 27 as speech then.

EEPROM25 mainly is made up of the volatile storage of about 2 megabits, and it has 8 piece 25a to 25h.Voice data through microphone 23 and coded portion 24 receptions stores in specific according to the access order that is undertaken by address control section 22.Oscillatory circuit 28 produces clock , promptly is used to operate EEPROM25 and other specific clock, and clock is supplied with various piece, comprises control section 20, address control section 22 and EEPROM25.It is the driving voltage that is used for operational store control integrated circuit 2 that power suppling part divides 29 voltage transitions that will supply with from common battery BT, and with the drive voltage supply various piece.

The operation of B, embodiment

Below, will explain the operation of the accutron of present embodiment.Time clock feature, computing function and database function all these functions with traditional accutron are identical, thereby no longer make an explanation.Below, will explain audio data recording to EEPROM25 with from the operating process of EEPROM25 reproducing audio data.

(1) main process

Fig. 5 is a process flow diagram of explaining the main operation of embodiment.

The step S10 of explained later is these steps to S24: determine the key input at key input part 3 places, jump to the step that will carry out according to being with or without the key input, and show various data item on LCD display 14.At step S10, judge whether pushed any key in key input part 3.If pushed arbitrary key, control will enter step S12.At step S12, will carry out the key that to explain subsequently according to the key of pushing (record key 3a, regeneration key 3b, options button 3c, or other key) and handle.If there is not pressing key, then control will enter step S14, and here whether judgement does not have pressing key in the special time time limit.If do not have pressing key in the time limit at this special time, then will remove record mark P and regeneration sign L at step S16, and reset flip-flop F1 and F 2.In the present embodiment, when pushing record key 3a or push regeneration key 3b, write down or regenerate.When RR release record key 3a or regeneration key 3b, stop record or regeneration.Step S16 or S18 stop the process of record or regeneration when being RR release record key 3a or regeneration key 3b.

When the key of completing steps S12 is handled, if if perhaps pushed arbitrary key in the time limit or step S18 stops at step S14 at special time, then control will enter step S20, will judge that here regeneration indicates whether L is " 1 ".When regeneration sign L is " 1 ", promptly be in regeneration mode, control will enter step S22, here will be on LCD display the displayed record date and time, with data storage piece therein and (appointment) piece of selection.Particularly, at regeneration mode, as shown in Figure 8, LCD display shows the numeral 1 to 8 of the piece among the expression EEPROM25 and the rectangle symbol of representing the piece of stores audio data under each numeral at the top.In Fig. 8, the piece of data has been stored in luminous rectangle symbol (first, second among the figure and the 8th piece) expression.The selection piece that rectangle symbol (the 4th piece among the figure) expression of flicker has been stored data and regenerated.And LCD display is presented at the date (3-10) and the time (18:10) of storing among the register R3 in the RAM9, and this is illustrated in the record date and the time of storage speech in the 4th.

When regeneration sign L be " 0 ", just when pattern is not regeneration mode, control will enter step S24, will show current date and time here on LCD display, store the piece and the selection piece of data.Particularly, as shown in Figure 9, on LCD display, the piece of data has been stored in luminous rectangle symbol (second among the figure, the 4th and the 8th) expression, and flicker rectangle symbol (among the figure first) the expression forward piece of record data wherein.And LCD display also shows sky (Sun.), date (3-17) and time (10:58 25) in the week, promptly in current time that time holding circuit 6 obtains.

(2) key processing procedure

Below, will explain above-mentioned key processing procedure.Fig. 6 and 7 is process flow diagrams of explaining the operation of key processing.

2-1. piece selection course

The step S30 of explained later is that determine will be with audio data recording to wherein or from the process of the piece of its reproducing audio data to S36.The first, at step S30, judge and whether pushed options button 3c.If pushed options button 3c, control will enter step S32, will judge here whether record mark P and regeneration sign L are " 0 ".If record mark P and regeneration sign L are " 0 ", just neither logging mode neither regeneration mode the time, control will enter step S34, and here with set and reset flip-flop F1, trigger F1 can send a pulse with 1/256 cycle (256Hz) like this.This makes the output of OR circuit 20a shown in Figure 3 become " 1 ", forces the counting in the piece control section 21 to increase by 1.Below, at step S36, the recording/reproducing piece specific data among the register M of RAM9 increases by 1.Then, mute key is handled.

As above-mentioned, make the piece opsition dependent increase by 1 by each set and reset flip-flop F1.Push options button 3c, movable block in the following order circulates at every turn: 1 → 2 → 3 → ... → 6 → 7 → 8 → 1 → 2 → ...At this moment, because regeneration sign L is " 0 ", when control turns back to master routine shown in Figure 5, at step S24 displayed map shown in Figure 8 will appear.The user selects the piece of wishing by pushing options button 3c up to the piece of arrive wishing.When or record mark P or regeneration sign L when being " 1 ", just when being in logging mode or regeneration mode, be "No" in the judged result of S32, even push options button 3c like this, the piece of appointment can not change yet.

2-2. logging mode

The step S40 of explained later is a recording process to S52: address control section 22 will store into from the voice data of microphone 23 input and conversion coding circuit 24 in the piece by piece specific data BD appointment.At step S30, when not pushing options button 3c, control will enter step S40, will judge here whether record key 3a pushes.If pushed record key 3a, control will enter step S42, will judge here whether regeneration sign L is " 1 ".If regeneration sign L is " 1 ", this means and also push regeneration key 3b when pushing record key 3a.If regeneration sign L is " 0 ", this means the logging mode that is chosen in stores audio data among the EEPROM25.

When step S42 regeneration sign L is " 0 ", this means and do not push regeneration key 3b, so control forwards step S44 to, judge here whether record mark P is " 0 ".If record mark is " 0 ", this means and push the record key, so control will enter step S46.

At step S46, in 1/256 cycle (256Hz), repeat set and reset flip-flop F1 seven times.The reason of doing like this is to change in for record set flip-flop F1 for the piece that prevents to have selected in above-mentioned selection course.Because in the present embodiment, EEPROM25 is divided into eight, by during 1/256 cycle (256Hz), repeating set and reset flip-flop F1 seven times in advance the piece specific data BD in the piece control section 21 just is set in the piece before selecting piece.Below, at step S48, set flip-flop F1.This make must recording audio data piece become the piece of selection.Below, at step S50, the current date and time in the time holding circuit 6 is stored in date and the time district (register T) of relevant block among the RAM9.Simultaneously, corresponding sign F is set to " 1 ".Then, record mark P is set to " 1 ", and stops present procedure.Forcing record mark when record key 3a is pressed is that " 1 " makes that the judged result of step S44 is a "No", so only carries out a step S46 to S52 when pushing record key 3a.

As a result, in storer control integrated circuit 2, record controls signal S1 supplies with address control section 22 from control section 20.And in the piece selection course, 3 piece specific data BD that are arranged in the piece control section 21 are supplied to address control section 22.This makes address control section 22 voice data from microphone 23 input and conversion coding circuit 24 can be stored in the piece by piece specific data BD appointment.At this moment, because regeneration sign L is " 0 ", when control turns back to master routine shown in Figure 5, the display image of Fig. 9 will appear at step S24.

When record key 3a was pressed, voice data was stored among the EEPROM5 continuously.When decontroling record key 3a, remove record mark P (=0) at the step S16 of Fig. 5, then at step S18 reset flip-flop F1, the trigger F3 in this meeting reset diagram 3 stops recording audio data.

2-3. regeneration mode

The step S62 of explained later is a regenerative process to S72, it makes decoding circuit 26 will be stored in by the voice data in the piece among the EbPROM25 of the piece specific data appointment in the address control section 22 when regeneration key 3a is pressed and is converted to simulating signal, and exports speeches by sound signal from loudspeaker 27.When options button 3c or record key 3a are not pressed, control will forward the step S62 among Fig. 7 to by step S30 and step S40, here will judge and push the key 3b that regenerates whether.If pushed regeneration key 3b, control will enter step S64, will judge here whether record mark P is " 1 ".If record mark is " 1 ", this means when pushing regeneration key 3b, also pushed record key 3a.If record mark P is " 0 ", this means and selected regeneration to be stored in the regeneration mode of the voice data among the EEPROM25.

When step S64 record mark P is " 0 ", then do not push record key 3a.Then, control enters step S66.At step S66, judge whether regeneration sign L is " 0 ".If regeneration sign L is " 0 ", this means and push regeneration key 3b, and control will forwards step S68 to.

At step S68, in 1/256 cycle (256Hz), repeat set and reset flip-flop F2 seven times.The reason of doing like this is to prevent from the described set flip-flop F2 of the piece of having selected in the above and send in the process of regeneration control signal S2 to change in above-mentioned selection course.Reach 7 times the piece specific data BD in the piece control section 21 just is set in the piece before selected piece by in 1/256 cycle (256Hz), repeating set and reset flip-flop F2 in advance.Below, at step S70, set flip-flop F2.This make must recording audio data piece become the piece of selection.Below, at step S72, the sign L that regenerates is set to " 1 ", and stops active procedure.Force regeneration to be masked as " 1 " in the regeneration key 3b to make that the judged result of step S66 is a "No", so only when pushing record key 3b, carry out a step S46 pushing to S52.

As a result, in storer control integrated circuit 2, regeneration control signal S2 supplies with address control section 22 from control section 20.And in the piece selection course, 3 piece specific data BD that are arranged on piece control section 21 are supplied to address control section 22.This makes decoding circuit 26 voice data of storing in the piece by the piece specific data BD appointment in the address control section 22 can be converted to simulating signal, then from loudspeaker 27 outputs.At this moment, because regeneration sign L is " 1 ", when control turns back to master routine shown in Figure 5, the display image of Fig. 8 can appear at step S22.

When pushing regeneration key 3b, voice data continues regeneration.When decontroling record key 3b, remove regeneration sign L (=0) at the step S16 of Fig. 5, after this at step S18 reset flip-flop F2, this can stop the reproducing audio data.

2-4. reset procedure

The step S44 of explained later is a reset procedure to S50, promptly deletes various signs and data item when pushing record key 3a and regeneration key 3b simultaneously.Be set under the situation of " 1 " (step S42) at regeneration sign L when pushing record key 3a, or be set under the situation of " 1 " (step S64) step 80 and subsequent reset procedure shown in the execution graph 6 at record mark P when pushing regeneration key 3b.In other words, when pushing record key 3a, pushed regeneration key 3b, perhaps when pushing regeneration key 3b, pushed record key 3a, this means that record key 3a and regeneration key 3b are pressed together, therefore carry out reset procedure.

In step 80, set flip-flop F1, and at step 82 set flip-flop F2.When trigger F1 and two of trigger F2 were set, the output of the "AND" circuit 20b that the control circuit among Fig. 3 is 20 li became " 1 ", and clear signal CL is sent to address control section 22.This makes the voice data in specific be eliminated simultaneously.Below at step S84, reset flip-flop F1 and F2.At step S86, remove recording/reproducing piece specific data M, the record mark P, regeneration sign L, date and time and the sign F that store among the RAM9.Then, stop present procedure.

Though in the present embodiment, block control signal BL is input to control section 20 through the port T1 of input record specification signal, and block control signal can be input to control section 20 through the port T2 of input regeneration specification signal.

Though in the present embodiment, only be an example that applies the present invention to the portable electronic wrist-watch, the present invention also can be applicable to the various piece of the electronic equipment of non-accutron.For example, the present invention can be applicable to massaging device, such as portable phone, pager or electronic memo, or is applied to various non-portable desk-top electronic installations.The storer of stores audio data is not limited to instantaneous EEPROM.Can use the volatile storage or the nonvolatile memory of other types.

Claims

1, a kind of audio storage and regenerating unit comprise:

The semiconductor chip, this chip comprises:

Semiconductor memory with a plurality of memory blocks of stores audio data;

Input end is specified in storage, specifies the memory block specification signal of the memory block that will store and regenerate and be used for specifying the storage specification signal of stores audio data to input to it among a plurality of memory blocks of described semiconductor memory being used for;

Input end is specified in regeneration, specifies the regeneration specification signal of reproducing audio data to input to it with being used for; And

Storage medium control device, not only be used among a plurality of memory blocks of described semiconductor memory, specifying the memory block that to store and to regenerate and voice data being stored into by in the described storage specification signal specified memory, and read the voice data that is stored in by in the described regeneration specification signal specified memory according to described memory block specification signal; And

Control device, this control device comprises:

Memory block assigned switch device;

Record assigned switch device;

Regeneration assigned switch device; And

Control circuit, when operation described memory block assigned switch device, specify input end to send to storage medium control device in the described semi-conductor chip through described storage the memory block specification signal, when the described record assigned switch device of operation, described memory block specification signal is specified input end to send to the storage medium control device in the described semi-conductor chip and sent described storage specification signal subsequently through described storage, and when the described regeneration assigned switch device of operation, specify input end to send to storage medium control device in the described semi-conductor chip through described regeneration described regeneration specification signal.

2, according to the audio storage and the regenerating unit of claim 1, wherein said control circuit sends pulse signal as described memory block specification signal, and a position is moved in the memory block that described storage medium control device will be stored and regenerate when the described pulse signal of each supply.

3, according to the audio storage and the regenerating unit of claim 1, wherein said control circuit sent (memory block number-1) individual pulse signal as the memory block correction signal in a specific period before the designated store or the described voice data of regenerating.

4, according to the audio storage and the regenerating unit of claim 3, wherein said storage medium control device to the major general have greater than the pulse signal in cycle of (specific period * memory block number) and described pulse signal with specific period mutually " with ", and on the result's of logical multiply basis, described storage specification signal or described regeneration specification signal and described memory block specification signal or described memory block correction signal are differentiated.

5, according to the audio storage and the regenerating unit of claim 1, wherein said semiconductor memory comprises nonvolatile memory.

6, according to the audio storage and the regenerating unit of claim 1, wherein said control circuit is operated on the different voltages with described semi-conductor chip.

7, according to the audio storage and the regenerating unit of claim 1, described control circuit wherein is installed, and two semi-conductor chips drive on different voltages on the semiconductor chip different with described semi-conductor chip.

8, a kind of audio storage and regenerating unit comprise:

The semiconductor chip, this chip comprises:

Semiconductor memory with a plurality of memory blocks of stores audio data;

Input end is specified in storage, specifies the storage specification signal of stores audio data to input to it with being used for;

Input end is specified in regeneration, specifies the memory block specification signal of the memory block that will store and regenerate and be used for specifying the regeneration specification signal of reproducing audio data to input to it among a plurality of memory blocks of described semiconductor memory being used for; And

Storage medium control device, not only be used among a plurality of memory blocks of described semiconductor memory, specifying the memory block that to store and to regenerate and voice data being stored in the specific memory section, and read the voice data that is stored in the specific memory section according to described regeneration specification signal according to described storage specification signal according to described memory block specification signal; And

Control device, it comprises:

Memory block assigned switch device;

Record assigned switch device;

Regeneration assigned switch device; And

Control circuit, when operation described memory block assigned switch device, specify input end to send to storage medium control device in the described semi-conductor chip through described regeneration the memory block specification signal, when the described record assigned switch device of operation, specify input end to send described storage specification signal through described storage, and when the described regeneration assigned switch device of operation, specify input end to send to storage medium control device in the described semi-conductor chip through described regeneration described memory block specification signal, and after this send described regeneration specification signal.

9, according to the audio storage and the regenerating unit of claim 8, wherein said control circuit sends pulse signal as described memory block specification signal, and described storage medium control device moves the memory block that will store and regenerate one by one when the described pulse signal of each supply.

10, according to the audio storage and the regenerating unit of claim 8, wherein said control circuit sent (memory block number-1) individual pulse signal as the memory block correction signal in a specific period before the designated store or the described voice data of regenerating.

11, according to the audio storage and the regenerating unit of claim 10, wherein said storage medium control device to the major general have greater than the pulse signal in cycle of (specific period * memory block number) and described pulse signal with specific period mutually " with ", and on the result's of logical multiply basis, described storage specification signal or described regeneration specification signal and described memory block specification signal or described memory block correction signal are differentiated.

12, according to the audio storage and the regenerating unit of claim 8, wherein said semiconductor memory comprises nonvolatile memory.

13, according to the audio storage and the regenerating unit of claim 8, wherein said control circuit is operated on the different voltages with described semi-conductor chip.

14, according to the audio storage and the regenerating unit of claim 8, described control circuit wherein is installed, and two semi-conductor chips drive on different voltages on the semiconductor chip different with described semi-conductor chip.

15, a kind of audio storage and regenerating unit comprise:

The semiconductor chip, this chip comprises that one has the semiconductor memory of a plurality of memory blocks of stores audio data, and storage medium control device, this device not only is used for according to the storage specification signal of designated store voice data voice data being stored in the specific memory section but also according to the regeneration specification signal of specifying the reproducing audio data and reads the voice data that is stored in specific memory section; And control circuit, it sends a memory block specification signal, be used among described a plurality of memory blocks, specifying the memory block that to store or to regenerate, and send described storage specification signal or described regeneration specification signal subsequently, wherein said semi-conductor chip also comprises storage appointment input end, to input to it from described memory block specification signal and the described storage specification signal that described control circuit sends, and input end is specified in regeneration, described regeneration specification signal is inputed to it, and described storage specifies input end and described regeneration to specify input end to link to each other with described control circuit.

16, according to the audio storage and the regenerating unit of claim 15, wherein said control circuit sends pulse signal as described memory block specification signal, and one by one move the memory block that described storage medium control device will be stored and regenerate when the described pulse signal of each supply.

17, according to the audio storage and the regenerating unit of claim 15, wherein said control circuit sent (memory block number-1) individual pulse signal as the memory block correction signal in a specific period before the designated store or the described voice data of regenerating.

18, according to the audio storage and the regenerating unit of claim 17, wherein said storage medium control device to the major general have greater than the pulse signal in cycle of (specific period * memory block number) and described pulse signal with specific period mutually " with ", and on the result's of logical multiply basis, described storage specification signal or described regeneration specification signal and described memory block specification signal or described memory block correction signal are differentiated.

19, according to the audio storage and the regenerating unit of claim 15, wherein said semiconductor memory comprises nonvolatile memory.

20, according to the audio storage and the regenerating unit of claim 15, wherein said control circuit is operated on the different voltages with described semi-conductor chip.

21, according to the audio storage and the regenerating unit of claim 15, described control circuit wherein is installed, and two semi-conductor chips drive on different voltages on the semiconductor chip different with described semi-conductor chip.

22, a kind of audio storage and regenerating unit comprise:

The semiconductor chip, this chip comprises the semiconductor memory of a plurality of memory blocks with stores audio data, input is used for specifying the storage of the storage specification signal of stores audio data to specify input end, input is used for specifying the regeneration of the regeneration specification signal of reproducing audio data to specify input end, and storage medium control device, this device not only is used for storing voice data into specific memory section according to the storage specification signal of specifying input end to import from described storage, and according to specify the regeneration specification signal of input end input to read the voice data that is stored in specific memory section from described regeneration; And

Control circuit, it not only sends by the form with pulse signal with specific period and supplies with described storage and specify the described storage specification signal of input end or supply with described regeneration and specify the described regeneration specification signal of input end to specify the memory block that will store and regenerate described voice data, and sends described storage specification signal or described regeneration specification signal with the form of constant level signal.

23, according to the audio storage and the regenerating unit of claim 22, wherein said control circuit sends pulse signal as described memory block specification signal, and described storage medium control device moves the memory block that will store and regenerate one by one when the described pulse signal of each supply.

24, want 22 audio storage and regenerating unit according to right, wherein said control circuit sent (memory block number-1) individual pulse signal as the memory block correction signal in a specific period before the designated store or the described voice data of regenerating.

25, according to the audio storage and the regenerating unit of claim 24, wherein said storage medium control device to the major general have greater than the pulse signal in cycle of (specific period * memory block number) and described pulse signal with specific period mutually " with ", and on the result's of logical multiply basis, described storage specification signal or described regeneration specification signal and described memory block specification signal or described memory block correction signal are differentiated.

26, according to the audio storage and the regenerating unit of claim 22, wherein said semiconductor memory comprises nonvolatile memory.

27, want 22 audio storage and regenerating unit according to right, wherein said control circuit is operated on the different voltages with described semi-conductor chip.

28, according to the audio storage and the regenerating unit of claim 22, described control circuit wherein is installed, and two semi-conductor chips drive on different voltages on the semiconductor chip different with described semi-conductor chip.