CN1191347A - Method for maintaining memory of computer - Google Patents
Method for maintaining memory of computer Download PDFInfo
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- CN1191347A CN1191347A CN97108834A CN97108834A CN1191347A CN 1191347 A CN1191347 A CN 1191347A CN 97108834 A CN97108834 A CN 97108834A CN 97108834 A CN97108834 A CN 97108834A CN 1191347 A CN1191347 A CN 1191347A
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- 238000000034 method Methods 0.000 title claims abstract description 28
- 238000012423 maintenance Methods 0.000 claims abstract description 4
- 238000001514 detection method Methods 0.000 claims description 97
- 238000000605 extraction Methods 0.000 claims description 3
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 claims 1
- 238000007726 management method Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000004590 computer program Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 230000006386 memory function Effects 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 238000002715 modification method Methods 0.000 description 1
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Abstract
A maintenance method of memory in computer includes setting up a test chain with initial empty value, a momory manage module and an error detecting module. Said momory manage module sets up a test head for each momory block. In the test head a legal flag is set and a test chain is created. Said error detecting module tests the test heads for every memory block by the sequence in test chain to determine if the momory block is operated legally based on the lgel flag in test head. With said method, solftware can be used to determine if logic error "overrun" occurs in memory.
Description
The present invention relates to computer technology, specifically, relate to the maintenance and the error detection techniques of computer memory.
In the operational process of program, each program segment all may be applied for one or more storage spaces frequently, with the intermediate data and/or the final data of stored programme needs in service and/or generation, discharges this storage space again after finishing using.Like this, a storer just is divided out some dynamic storage blocks, and each storage block should only be carried out accessing operation by corresponding program segment.But, in some cases, to storage block storage data " crossing the border " phenomenon can take place.That is to say, originally, the data of program segment A should be stored among the corresponding storage block A ', the data of program segment B should be stored among the corresponding storage block B ', but, because programmer's maloperation or because the mistake of program itself, program segment A is stored in the data among the storage block A ', crossed the border by program segment B and to have revised, the mistake of the illegal storage of this class belongs to usually said logic error.
In the prior art, many error-detecting and modification methods about storer are also arranged, be 5 for example in the patent No., 291,498, name is called in the United States Patent (USP) of " error-detecting method and device with computer memory of multidigit output memory circuit ", has just introduced a kind of detection method of memory error.This method is with a testing circuit, the mistake that takes place in the detection of stored process.There is following defective in this method: the physical error in the just storer that (1) is detected, and promptly storer is changed by physics by the data of physical damage, storage and the mistake that takes place etc., can not detect above-mentioned logic error; (2) testing circuit need be set, will change on the hardware, implement inconvenience, dumb.
Purpose of the present invention overcomes above-mentioned deficiency of the prior art exactly, and a kind of software implementation method of using is provided, and the logic error of " crossing the border " takes place in the detection computations machine storage easily and flexibly.
For this reason, by the maintaining method of a kind of storer provided by the invention, be provided with one and be initially empty detection chain, a memory management module and an error detection module, memory management module is provided with detection head for each storage block, and legal mark is set in detection head, and sets up and detect chain; Whether error detection module is that legal mark judges that whether this storage block is by legal operation according to the detection head that detects each storage block of sequence detection in the chain according to the value of storing in the detection head.
Described memory management module may further comprise the steps:
(1), distributes a free memory blocks
(2), detection head and legal mark are set
(3), add the detection chain
(4), back one address of returning described detection head wherein the order of step B and step C can exchange.Described error detection module may further comprise the steps:
A, the begin chain detection head pointed in the described detection chain is decided to be detection head to be checked
Data in b, the described detection head to be checked of extraction
Whether c, the data of judging said extracted be consistent with the set legal mark of step (3)
If the judged result of d c is inconsistent, then provides the mistakenly complain alarming information and withdraw from signal
If the judged result of e c is consistent, whether what then judge the described detection head to be checked of sensing is the last-of-chain of described detection chain
If the judged result of f e for not being last-of-chain, then is changed to detection head to be checked, execution in step b with the next detection head in the described detection chain
If the judged result of g e is for being last-of-chain, detection of end then.
The alleged storer of the present invention mainly refers to the calculator memory device, also can be applicable to storer, the hard disc of computer of web server computer, perhaps external memory storage, and as floppy disk etc., and other can be used as the medium of memory function.
Maintaining method by computer memory provided by the present invention, need not to increase any hardware, also need not existing hardware is carried out any transformation, just can detect the logic error in the memory stores easily, can detect the storage border-crossing error that takes place in programming and the computer program operational process in time, prompting exploitation, maintainer follow the tracks of solution, need in the environment of continuous working procedure at some, in the Maintenance of Program Control Exchange management, have very practical meaning and good effect.
Below in conjunction with drawings and Examples, further specify technical scheme of the present invention.
Fig. 1 is an overall process synoptic diagram of implementing the inventive method;
Fig. 2 a is the structural representation that memory management module manages background storage and storage block in application the inventive method to storer;
Fig. 2 b is one of the present invention and detects the chain structure synoptic diagram;
Fig. 3 is a program flow diagram of realizing memory management module of the present invention;
Fig. 4 is a program flow diagram of realizing error detection module of the present invention;
Fig. 5 is a program flow diagram of realizing a storage block is carried out error-detecting.
Fig. 1 has illustrated the whole process in the concrete enforcement of the present invention.When storage block of program segment 101 application, memory management module 103 is called in the accept applications instruction of storage block of the CPU102 of computing machine, distributes, is provided with storage block 106, adds and detects chain 104; When needs detection of stored device mistake, call error detection module 105 carries out error-detecting according to the address that detection chain 104 provides to storage block 106, when detecting storage errors, notifies CPU, and is sent alarm prompt and withdrawed from information by CPU.
Before storage administration and error-detecting, set up an initial detecting chain earlier, its initial pointer is a null pointer.
As Fig. 2 a, Fig. 2 b and shown in Figure 3, in memory management module, when storage block of program segment application, elder generation's execution in step 301 is distributed storage block Si (i=1,2 of a free time, M), then in step 302, in first address 210 (as the address of this storage block detection head) the access detection chain with storage block.In step 303, n position before this storage block is made as detection head, is changed to fixing character string, for example preceding 4 bytes (n=32) can be set to " CHCK ", as legal mark.In general, all storage blocks should be provided with identical legal mark, but also can as required different legal marks be set.After detection head 201 is provided with, return after the detection head i.e. the 33rd bit address 211, as the entry address of this storage block being carried out accessing operation, to the data storage of this storage block, read, just from the address 211.Like this, whole storage block just is divided into two parts: a part is detection head 201, and the right and wrong free core pool can not be toward wherein writing data under legal ruuning situation; Another part is free core pool 202, needs the data of storage freely to deposit in wherein.Applying for the result of storage block each time, is to distribute the storage block of being made up of 201 and free core pools 202, a non-free core pool (detection head) like this, and adds the address of new storage block detection head in detecting chain.Like this, after repeatedly applying for, just form one storage block group S1, S2 ..., SM and a detection chain of forming by the address of all detection heads.
When discharging storage block, non-free core pool (detection head) 201 and free core pool 202 are discharged simultaneously, non-free core pool becomes again and can delete the address of pointing to this storage block detection head simultaneously from detect chain for the space of freely using.
Set up the operation of initial detecting chain, memory management module, release storage block, realize by the program of operation system of computer level.
When needs carry out error-detecting to storage block, the call error detection module, in step 401, with the begin chain in the detection pointer 220 direct detection chains of detection chain among Fig. 2, the detection head pointed to the chain leading address detects.Fig. 5 is the specific implementation of step 402 among Fig. 4, promptly a certain specific memory piece is judged that whether it is by legal use.
Under the situation of legal storage, the storage of data is that back from detection head is address 211 beginning Fig. 2 a, the content of storing in the detection head remain default, fixing legal mark, when data are illegally stored, should be stored in data in other storage block may cross the border and store in the current storage block, illegal storage then is to begin storage from storage block start address (210 Fig. 2 a), thereby the content of original storage in the covering detection head, destroy legal mark, make that the content of current storage in the detection head is inconsistent with default legal mark.Therefore, detecting some storage blocks, that whether this type of wrong step takes place is as follows: at first carry out 501, extract the content of current storage in this storage block detection head, carry out 502, the content of being extracted is compared with the legal mark of being scheduled to " CHCK "; If both unanimities then show not destroyedly, it is legal that current storage block is used, and both are inconsistent else if, show that border-crossing error appears in current storage block, then demonstrate warning information, quit a program, the programmer follows the tracks of again according to prompting, finds, revises error routine.
After having detected current storage block,, check whether withdraw from signal,, then withdraw from error detection module if withdraw from signal in step 403, otherwise, carry out 404.Withdrawing from signal can be the compulsory withdrawal order that the programmer imports, and also can be to detect the withdraw from signal of wrong back in step 503 generation.If the current detection pointer is not the last-of-chain that detects chain, then detect the next detection head of pointed, detect next storage block; Otherwise, will detect the begin chain that pointed detects chain, begin new one and take turns the round-robin detection.
The step of error-detecting can on-line operation among the present invention, carries out error-detecting in real time, i.e. operation in other program run is set by CPU and to be carried out this error-detecting step several times within a certain period of time; Also can after being finished, other program call this error-detecting step, in time mistake in the discovery procedure; Also can call in other occasion as required.The execution that can circulate is promptly carried out being automatically brought to when detecting chain last-of-chain place and is detected the chain begin chain and continue to carry out, and also can be begun to carry out and be finished by people's control and carry out.The embodiment of the invention is an example real-time, that circulation is carried out, and as shown in Figure 4, begins to detect from detecting chain begin chain storage block S1 pointed, after detection finishes, search whether withdraw from signal, if having, then withdraw from circulation, detection of end, otherwise, judge whether the current detection pointer is the last-of-chain that detects chain,, then continue to detect next storage block Si (i=2 if not last-of-chain,, M-1), if last-of-chain, then detect the begin chain that pointed detects chain, begin new one and take turns the round-robin detection.
The detection chain of the embodiment of the invention is an address table of being made up of in order the first address of each storage block detection head, but those skilled in the art are easy to find out, can also take the detection chain of alternate manner, for example can be one and point to all detection heads, end to end pointer chain; Also can be in detection head, to be provided with two to detect pointer, one of them forwarding pointer points to the detection head of next storage block, after one on pointed the detection head of a storage block, back forwarding pointer to pointer and last storage block in first storage block all is changed to null pointer, detects front and back that pointer (comprise forwarding pointer and afterwards to pointer) the forms pointer chain that links to each other by each storage block.
Above steps all is to realize by computer program, finishes by the operation of program.
Claims (9)
1, a kind of maintaining method of computer memory comprises that being provided with one is initially empty detection chain, a memory management module and an error detection module; Memory management module is provided with detection head for each storage block, and legal mark is set in detection head, and sets up and detect chain; Whether error detection module is that described legal mark judges that whether this storage block is by illegal operation according to the detection head that detects each storage block of sequence detection in the chain according to the data of storing in the detection head.
2, the method for claim 1, described memory management module may further comprise the steps:
(1), distributes a free memory blocks
(2), detection head and legal mark are set
(3), add the detection chain
(4), back one address of returning described detection head wherein step (2) can exchange with the order of step (3).
3, the method for claim 1, described error detection module may further comprise the steps:
A, the begin chain detection head pointed in the described detection chain is decided to be detection head to be checked
Data in b, the described detection head to be checked of extraction
Whether c, the data of judging described extraction be consistent with the set legal mark of step (3)
If the judged result of d c is inconsistent, then provides the mistakenly complain alarming information and withdraw from signal
If the judged result of e c is consistent, whether what then judge the described detection head to be checked of sensing is the last-of-chain of described detection chain
If the judged result of f e for not being last-of-chain, then is changed to detection head to be checked with the next detection head in the described detection chain, then execution in step b
If the judged result of g e is for being last-of-chain, detection of end then.
4, the maintaining method of storer as claimed in claim 1 or 2 is characterized in that described being included as of detection head and legal markers step that be provided with: the preceding n position (1＜n＜m, wherein m is the total bit of described storage block) of described storage block is changed to a fixed sequence program.
5, the maintaining method of storer as claimed in claim 4 is characterized in that described each storage block all has identical legal mark.
6, the maintaining method of storer as claimed in claim 4 is characterized in that: also comprise the return address as this storage block, the address of the n+1 position of described storage block; And when this storage block is stored data legally, store since the n+1 position.
7, as the maintaining method of claim 2 or 3 described storeies, it is characterized in that described detection chain can be one and point to all detection heads, end to end pointer chained list also can be an address table of being made up of in order the detection head first address of all storage blocks.
8, as claim 1 or 2 or 3 described methods, it is characterized in that to be provided with in the described detection head two and detect pointer, one of them forwarding pointer points to the detection head of next storage block, after one on pointed the detection head of a storage block, back forwarding pointer to pointer and last storage block in first storage block all is changed to null pointer, and described each storage block detects pointer (comprising that forwarding pointer and back are to pointer) and forms the detection chain that front and back link to each other.
9, memory maintenance method as claimed in claim 3, it is characterized in that described step g can also for: if the judged result of e is for being last-of-chain, execution in step a then.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN97108834A CN1073724C (en) | 1997-02-19 | 1997-02-19 | Method for maintaining memory of computer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN97108834A CN1073724C (en) | 1997-02-19 | 1997-02-19 | Method for maintaining memory of computer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1191347A true CN1191347A (en) | 1998-08-26 |
| CN1073724C CN1073724C (en) | 2001-10-24 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN97108834A Expired - Lifetime CN1073724C (en) | 1997-02-19 | 1997-02-19 | Method for maintaining memory of computer |
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| Country | Link |
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| CN (1) | CN1073724C (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5291498A (en) * | 1991-01-29 | 1994-03-01 | Convex Computer Corporation | Error detecting method and apparatus for computer memory having multi-bit output memory circuits |
| US5455939A (en) * | 1992-06-17 | 1995-10-03 | Intel Corporation | Method and apparatus for error detection and correction of data transferred between a CPU and system memory |
| US5475693A (en) * | 1994-12-27 | 1995-12-12 | Intel Corporation | Error management processes for flash EEPROM memory arrays |
-
1997
- 1997-02-19 CN CN97108834A patent/CN1073724C/en not_active Expired - Lifetime
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| Publication number | Publication date |
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| CN1073724C (en) | 2001-10-24 |
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