CN1187986C - ZT coding decoding method and its implementation circuit - Google Patents
ZT coding decoding method and its implementation circuit Download PDFInfo
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Abstract
The present invention discloses a method for realizing a wavelet zero-tree coding process, which at least comprises a quantizing process, a main control process and a subordinate process. The method is characterized in that in the main control process, the nodes of a wavelet tree are scanned and processed from a lower layer to a high layer, and four signs comprising a zero tree root (ZTR) (10), a value zero tree root (VZTR) (11), an isolation zero IZ (00) and a large coefficient VAL (01) are used for marking the corresponding nodes of the zero-tree structure; in the quantizing process, the quantization operation for more than one threshold value can be synchronously carried out; and the zero-tree coding process is carried out from a high bit plane to a low bit plane by the main control process and the subordinate process, and the zero-tree coding processes of eight bit planes are processed in parallel. Meanwhile, the present invention also discloses a method for realizing a wavelet zero-tree decoding process, and the realizing circuit of the method for realizing wavelet zero-tree coding and decoding processes. The present invention can reduce requirements for circuit performance, and can cause the zero-tree coding and decoding processes to be better matched with the wavelet transform process. The present invention also has the advantages of good compression efficiency, less occupation of integrated circuit resources, flexibility and easy realization.
Description
Technical field
The present invention relates to the ZT coding decoding technology, especially refer to a kind of adopt zero new tree label symbol from low layer to high level by group, successively, by tree sequential scanning, quantification, coding, and once can finish the ZT coding decoding method of the parallel zero-tree coding/decoding of eight bit planes and realize circuit.
Background of invention
In video data and Data Compression of Image, use the mathematic(al) manipulation technology usually for improving compression efficiency, a kind of mathematic(al) manipulation of often adopting is a wavelet transformation at present, Fig. 1, Fig. 2 are two-dimensional wavelet transformation frequency band schematic diagram, wherein, L represents low-frequency band, and H represents high frequency band.
Image is behind wavelet transformation, its wavelet conversion coefficient has two characteristics: the first, energy mainly concentrates on low frequency sub-band, all the other regional energy are less, and concentrate on mostly and image brightness sudden change corresponding sub-band coefficients place, edge, and the absolute value that general high-rise coefficient ratio is hanged down layer coefficients accordingly is big.The second, there is self-similarity in the subband on the same direction of different layers, and the self similarity of this interlayer on the one hand, is reflected in similar corresponding between the big coefficient positions of each layer at edge; On the other hand, also be reflected on the interlayer relation of little coefficient, generally littler with the low accordingly layer coefficients of little coefficient of a high level.
In order to make full use of these two characteristics of wavelet conversion coefficient, S.M.Shapiro in 1993 have proposed the EZW method of wavelet coefficient, and this is a kind of coding method efficiently, and code stream has Embedded character, that is: can block at any time, to reach required compression ratio.In subsequently several years, comprise that many experts of Shapiro have done a lot of improvement to the zerotree image method, the efficient of zerotree image is further improved.1998 the promulgation the MPEG-4 standard in, employing be improved EZW method.
According to open, have only the IMEC research center in Europe to design the EZW circuit up to now, called after " OZONE ", this zerotree image circuit is exported zero tree label symbol and the absolute value of a tree greater than the wavelet conversion coefficient mixing of quantization threshold, reduced access times, but reduced the embedded performance of zerotree image memory.
Zerotree image circuit that should OZONE by name is based on that the EZW algorithm of Shapiro realizes, so-called zero tree is meant after the quantification each time that repeatedly quantizes, as shown in Figure 3, when the absolute value of input coefficient greater than threshold value, then be big coefficient, otherwise be little coefficient; If certain wavelet conversion coefficient w and its all consequent nodes are little coefficient entirely, then w is called as zero tree node; If w is not the offspring of other zero tree node, then it is a zerotree root.For big coefficient, if be on the occasion of, output symbol POS then, if be negative value, output symbol NEG then; For little coefficient, if this coefficient is the offspring of certain zerotree root, then it is foreseeable little coefficient, need not encode; Otherwise, judge that this coefficient has big coefficient offspring? if have, illustrate that this coefficient itself is little coefficient, but have the consequent node of big coefficient, it is called as isolated point zero point, and IZ represents by symbol; If this coefficient does not have big coefficient offspring, then this coefficient is a zerotree root, and TR represents by symbols Z, does not need to carry out any coding for all consequent nodes of zerotree root again.
This embedded zero sets each time that the process of quantization encoding can be divided into two processes: master control process and slave process.Wherein, master control process order scanning wavelet conversion coefficient is according to the rules exported ZTR, IZ, POS, NEG symbol respectively according to the order of magnitude of coefficient itself and the order of magnitude and the relation thereof of consequent node.If output POS or NEG symbol, then the value of this coefficient is changed to 0, simultaneously this coefficient absolute value is put into big coefficient queue table; Slave process is exported in the big coefficient queue table in all big coefficient absolute values the low bit value less than this quantization threshold successively.
Equally, this embedded zero tree coding/decoding method also is divided into a plurality of decode procedures according to quantizing number of times, each decode procedure still comprises master control process and slave process, and the master control process is to recover zero tree structure according to the ZTR that exports behind the EZW, IZ, four symbols of POS, NEG; Slave process then recovers in the big coefficient less than the low bit value of this quantization threshold big coefficient to be carried out refinement; When all decode procedures are finished, just recover the wavelet conversion coefficient of all absolute values greater than the minimum quantization threshold value.If pass through corresponding wavelet inverse transformation again, just can watch the image after the recovery.
Zerotree image is wavelet conversion coefficient is organized according to tree structure and to be encoded, and the subband that provides four layers of wavelet transformation among Fig. 2 distributes.LL1 among ground floor four subband HH1, HL1, LH1 and LL1 generates four subband HH2, HL2, LH2 and LL2 of the second layer through behind the wavelet transformation, and by that analogy, four subbands of last one deck are HH4, HL4, LH4 and LL4.According to self-similarity, except low frequency sub-band LL4, among all the other subbands, just among the high-frequency sub-band coefficient of certain given position usually and on the equidirectional coefficient of lower level relevant position certain similitude is arranged.Wherein, the coefficient of high-rise subband is called father node, and four coefficients of back to back low layer subband relevant position are called child node; For all child nodes of a given father node, and corresponding all coefficients of the child node of child node or the like are called consequent node; In like manner, the coefficient of all the higher level subbands on the equidirectional is called ancestors' node.Such as: the wavelet coefficient that links up with line in HH3, HH2 and the HH1 among Fig. 2 is exactly the relation of a kind of father node, child node and consequent node each other, and all these nodes have formed a kind of tree structure.All wavelet conversion coefficients can be organized into many independently wavelet coefficient tree structures, abbreviate wavelet tree as.Self-similarity behind the wavelet transformation between the subband different layers is also embodied among the wavelet tree, and zerotree image utilizes wavelet tree to seek and represents that absolute value less than the similitude between the wavelet conversion coefficient of quantization threshold, improves compression efficiency.
The Important Thought of this EZW method is exactly: quantize one by one to approach, promptly by reducing the quantization threshold of wavelet conversion coefficient gradually, finish quantification and cataloged procedure gradually.In computer and digital circuit, numeral all is expressed as binary numeral, if control quantization threshold, the threshold value that quantizes is one by one successively decreased by 2 exponential form, promptly be equivalent to the value of wavelet conversion coefficient according to from high to low by bit, being called bit plane and quantizing (bi-level-quant), is a kind of quantization method one by one commonly used.Cataloged procedure after the quantification comprises master control and two processes of subordinate again, and wherein, the master control process is finished differentiation and the mark that quantizes zero tree structure in the present bit plane, back; Slave process is realized the process of the big coefficient of refinement.Quantize one by one and encode the significant data in the view picture image is exported earlier, therefore stop code stream at any time, the globality of image can guarantee that still embedded character is achieved.
In the process of each quantification,, manage to increase the quantity of little coefficient in order to improve code efficiency.Specific practice is exactly: for the wavelet conversion coefficient zero clearing that becomes excessive coefficient, then in the quantizing process afterwards, the coefficient of this wavelet transformation is little coefficient forever.
With regard to circuit design, because EZW adopts quantization method one by one, and big coefficient zero clearing is exerted one's influence to next code behind each the quantification, therefore carries out the quantification one by one of string type and encodes more or less freely.But wavelet conversion coefficient generally more than 16 bits, the visual zerotree image of serial execution more than 16 times, and the real-time processing requirements of video data compression forces the processing speed of circuit very high, and integrated circuit just is difficult to realize cheaply.Therefore, parallel processing is absolutely necessary.
Summary of the invention
By above-mentioned analysis as can be seen, in the circuit design that realizes zerotree image, adopt parallel processing to be absolutely necessary.The present invention has designed a kind of parallel processing zerotree image circuit, and it adopts from the low layer to the high level, scans and differentiates the bit plane zerotree image of parallel processing 8 bits according to reverse wavelet tree depth-first fashion.It can reduce operation time greatly and to the performance requirement of integrated circuit, guarantee the premium properties of EZW simultaneously.So-called wavelet tree depth-first fashion is meant that the scanning of wavelet conversion coefficient is unit with the wavelet tree, according to being carried out to the order of offspring's node by older generation's node.The zero-tree coding/decoding circuit of finishing according to this scheme will be one and performance of integrated circuits be required lower; Can finish a frame of any Commonly Used Size or the zero-tree coding/decoding process of a pictorial data in real time; And only need the circuit of less integrated circuit resource.
Therefore, main purpose of the present invention is to provide a kind of ZT coding decoding method and realizes circuit, make it when satisfying video data compression and Data Compression of Image specification requirement, reduction is to the requirement of circuit performance and resource, and cooperate better with wavelet transformation, possess higher compression efficiency, more flexible and be easy to realize.
For achieving the above object, technical scheme of the present invention specifically is such:
The implementation method of a kind of ZT coding comprises an above quantizing process, an above master control process and an above slave process, and key is,
A described above quantizing process is carried out simultaneously to a quantification with upper threshold value, after quantizing to finish, with the value zero clearing of big coefficient at all low quantization threshold places;
A described above master control process and slave process carry out zerotree image from the higher bit bit plane to low bit plane, and the zerotree image of an above bit plane of parallel processing;
Each master control process to the node of wavelet tree be from the low layer to the high level by group, successively, carry out scan process by tree, and with the corresponding node of zerotree root ZTR (10), band value zerotree root VZTR (11), isolated point zero point IZ (00), (01) four kind of symbol mark of big coefficient VAL zero tree structure;
Each slave process is exported low bit value and the corresponding big coefficient symbols value less than respective threshold of all big coefficient absolute values in the big coefficient queue table successively after the master control process of a bit plane is finished.
Wherein, to carry out zerotree image simultaneously with maximum 8 bit planes be the best in described parallel processing.The low bit of described four kinds zero tree label symbols is 0, and it is little coefficient that the expression wavelet conversion coefficient quantizes the back, and low bit is 1, and it is big coefficient that the expression wavelet conversion coefficient quantizes the back; The height ratio of this label symbol is expressed as zero tree specially for 1, and height ratio is expressed as the non-zero tree specially for 0.Only there is isolated point zero point IZ (00) in the lowermost layer of described wavelet tree, or (01) two kind zero tree label symbol of big coefficient VAL, and therefore, zero tree label symbol of lowermost layer is represented by a low bit.
When high level scanned, every layer by one group of four child node that belong to same father node by low layer for described master control process, sequential scanning by group, the centre continuously every.For the wavelet tree data that are positioned at lowermost layer,, then constitute zero tree if all nodal values of one group are 0 entirely; For more high-rise wavelet tree data,, then constitute zero tree if all nodal values are 10 entirely in one group.This master control process if constitute zero tree, then increases a higher bit 1 to its corresponding father node, otherwise increases a higher bit 0 when zero tree mark.In order not influence the scanning process of wavelet tree, the value of the higher bit position that is increased is stored separately.If non-vanishing tree, output zero tree label symbol; And big coefficient absolute value put into big coefficient queue table.
Described slave process further comprises:
A. when the master control process is untreated all bit-plane datas, the size of difference and quotient between the absolute value of maximum value wavelet conversion coefficient and the maximum quantization threshold relatively, the smaller value of getting among both is the value of selecting;
B. export the significant bit figure place of the value of selecting earlier, then the significant bit place value of the output value of selecting.
Can insert delay when memory read/write is changed between described layer and the layer.
A kind of implementation method of ZT decoding is characterized in that this method comprises at least:
A. to wanting the external memory storage zero clearing of write recovery data;
B. the order from zero height of tree layer to low layer, from the higher bit bit plane to low bit plane, by the zero tree label symbol that is read in successively, recover the zero tree structure of wavelet tree by tree; After a ZT recovers to finish, continue to read in follow-up zero tree label symbol again, carry out the recovery of next ZT;
C. from the high level to the low layer, recover the numerical value of big coefficient by turn according to the slave process coded data of being read in.
Wherein, the low bit of the zero tree label symbol that is read in is the current node value, the character of its offspring's node of higher bit bit representation, and this higher bit position needs buffer memory.When the low bit of the zero tree label symbol that reads in is 1, the corresponding bits position of the wavelet conversion coefficient of correspondence is write 1, otherwise, do not carry out write operation; When the higher bit position of the zero tree label symbol that reads in was 1, recovering consequent node did not need to read new data again, otherwise, need read all four child nodes zero of this father node correspondence and set label symbol 2 Bit datas.
Step b that should zero tree coding/decoding method further comprises the steps: when the top data of reading in are 10 or 11, only 1 in 11 write the locational corresponding bits of corresponding wavelet conversion coefficient position, and this ZT structure is promptly recovered to finish; When the top data bit value of reading in is 00 or 01, only 1 in 01 is write the corresponding bits position of corresponding wavelet conversion coefficient, read in zero tree label symbol of follow-up all child nodes then.When a bit that reads in lowermost layer is 1, then the locational corresponding bits of the wavelet conversion coefficient of 1 correspondence position is write 1, otherwise, do not carry out write operation.
Should further comprise the steps: by the zero step c that sets coding/decoding method
C1. read, judge the represented zero tree structure of data the external memory storage from the wavelet tree high level to the low layer order,, need not operate, turn to the data in the next address if data are little coefficient 0; If data are not little coefficients 0, and the data of big coefficient to be decoded are 1, then with the 1 corresponding bits position that writes the big coefficient of corresponding wavelet transformation, continue to turn to the data in the next address then; If data are not little coefficients 0, and the input data are 0, then need not write, and turn to the data in the next address.
The data of all bit planes if c2. be untreated during zerotree image, the smaller value of difference and quotient is the value of selecting between the big coefficient of the maximum that takes absolute value and the maximum quantization threshold, according to the number of significant digit of the value of selecting, decision needs the effective bit of the big coefficient of recovery;
If c3. the value of selecting is a difference, then with difference and maximum quantization threshold addition, otherwise, quotient and maximum quantization threshold are multiplied each other;
C4. the data from high level to low layer order reading external memory are 0 if read in data, read the data in the next address successively; If read in data and be 1 and the input data be 1, then write the locational corresponding bits of corresponding wavelet conversion coefficient position with 1, read the data in the next address then successively; To import data be 0 if read in data and be 1, then reads the data in the next address successively.
When the big coefficient that will recover is negative, in advance the data in this coefficient corresponding address are become the complement of two's two's complement, the raw address of restoring finishes decoding.
A kind of realization circuit of ZT coding comprises a memory, quantizer, zero clearing processor, zero tree differentiation and mark unit, data output control unit and address generator at least; From memory, read wavelet conversion coefficient, through after the quantification treatment of quantizer, by the zero clearing processor the big coefficient after quantizing is carried out zero clearing, afterwards, differentiate and the mark unit carries out to wavelet conversion coefficient that zero tree is differentiated and zero tree symbol mark by zero tree, last data after will being encoded by data output control unit export in the memory.
Described zero clearing processor is made up of general+logical encoder, becomes the mark value 1 behind the big coefficient when only being retained in higher thresholds for the first time, i.e. most significant bit 1 in the binary numeral after the wavelet conversion coefficient quantification, the whole zero clearings of all the other low bits.Utilize buffer storage zero tree discrimination result, zero tree scanning, coding are carried out continuously.
Key of the present invention is: adopt zero new tree label symbol, and scan, quantize, encode to high level from the low layer of wavelet tree, this zerotree image method can be carried out simultaneously repeatedly and quantize, the once parallel zerotree image of finishing eight bit planes.
Zerotree image method provided by the present invention and realization circuit thereof have following advantage and characteristics:
1) this zerotree image method and circuit make full use of four zero new tree label symbols, and design is from the low layer to the high level, carry out by group according to reverse wavelet tree depth-first fashion, scanning successively, zerotree image circuit that can a parallel processing eight bit planes, and in corresponding, external memory control circuit and data interface circuit, both guaranteed the compression performance of zerotree image algorithm, greatly reduce computational complexity and operation time simultaneously, make this circuit real-time implementation video more easily, image compression coding guarantees the low requirement to integrated circuit simultaneously.
2) zerotree image of the present invention is to utilize tree structure to seek and represent the similitude of the wavelet conversion coefficient of little absolute value, improves compression efficiency.Employing is unit with the wavelet tree, rather than the view picture image is carried out zerotree image can significantly reduce the capacity requirement of intermediate object program to memory, realizes the sheet stored; And because the zerotree image between the different wavelet tree is independently, the wavelet tree that can walk abreast zerotree image.
3) from the circuit design angle, adopt reverse consequent node to begin scanning, can seamlessly carry out continuously, significantly reduce mutual read-write memory from lowermost layer, and mutual read-write had both reduced the speed of memory, increased the complexity and the resource consumption of control circuit again; Because the differentiation of consequent node and mark do not need the characteristic according to older generation's node, otherwise and quite different.
4) with low cost.It is relative with performance demands very low to the integrated circuit resource, and does not need special circuit structure and on-chip memory, thereby can be integrated among the cheap integrated circuit of a slice.
5) good reliability.Since simple in structure, compact, good practicality and reliability had.
6) highly versatile.Can finish the zero tree coding and decoding of simplification of the multilayer two-dimension bi-orthogonal wavelet transformation of a frame of any common type, size or a pictorial data.
For chromatic image or color video, can be by zero-tree coding/decoding circuit of the present invention to R, G, B components image or Y, the U of chromatic image, the timesharing of V components image, carry out zerotree image or decoding one by one respectively.
Description of drawings
Fig. 1 is a two-dimensional wavelet transformation frequency band schematic diagram;
Fig. 2 is four layers of wavelet transformation frequency band distribution schematic diagram;
Fig. 3 is a Shapiro zerotree image flow chart;
Fig. 4 is a zerotree image flow chart of the present invention;
Fig. 5 is a wavelet conversion coefficient quantized segment circuit block diagram of the present invention;
Fig. 6 is the present invention's zero tree structure detection unit parallel circuit block diagram;
Fig. 7 is a zerotree image output control part circuit block diagram of the present invention;
Fig. 8 is the circuit block diagram of zerotree image of the present invention;
Fig. 9 is the flow chart of zerotree image method specific implementation of the present invention;
Figure 10 is the flow chart of the present invention's zero tree coding/decoding method specific implementation.
Embodiment
The present invention is further described in more detail below in conjunction with drawings and the specific embodiments.
The present invention is a kind of Method and circuits of realizing the EZW algorithm based on MPEG-4, as shown in Figure 4, one of main improvement is: the zero new tree label symbol that adopts a cover MPEG-4 to provide, wherein, zerotree root is expressed as ZTR (10), and band value zerotree root is expressed as VZTR (11), and isolated point zero point is expressed as IZ (00), big coefficient table is shown VAL (01), is the binary representation of corresponding symbol in the bracket.The zero tree label symbol of contrast Shapiro as can be seen, the present invention unites two into one the expression symbol POS and the NEG of big coefficient in the Shapiro method, replace with VAL, and with the zerotree root refinement, split into two classes, the definition of ZTR is constant, though the VZTR that newly adds represents that itself is big coefficient, but its all consequent nodes all are little coefficients, are referred to as band value zerotree root.This kind improvement has a significant effect, and has simplified original symbol mark greatly, because the situation of VZTR among the present invention needs to use a POS or NEG and four ZTR in the zero tree mark of Shapiro.In addition, it quantizes the numerical value of back itself to the low bit of new zero tree label symbol of the present invention just, the little coefficient of 0 expression, the big coefficient of 1 expression; And the character of consequent node has been represented in the higher bit position, 1 expression, zero tree, 0 expression non-zero tree; And the present invention's (account for image 3/4 picture element) in the wavelet conversion coefficient of lowermost layer, owing to do not have consequent node again, so, only there are isolated point zero point IZ (00) and (01) two kind of symbol of coefficient VAL greatly, like this, can improve compression efficiency.
So, the judgement of the present invention's zero tree structure and mark process as shown in Figure 4, whether the absolute value of at first judging input coefficient then judges this coefficient be zerotree root greater than threshold value? if the input coefficient absolute value is greater than threshold value and be zerotree root, then export VZTR; If the input coefficient absolute value is greater than threshold value but non-vanishing tree root is then exported VAL; If the input coefficient absolute value is less than threshold value and be zerotree root, then export ZTR; If the input coefficient absolute value, judges then that this coefficient has the consequent node of big coefficient less than threshold value and non-vanishing tree root? if have, then export IZ; Otherwise explanation is the no symbol of zero tree.
Method of the present invention and circuit can be finished zero tree coding and decoding of the wavelet transformation data of a frame of any Commonly Used Size or an image in real time.
With four layers of wavelet transformation is example, specifies the operation principle of circuit of the present invention and the realization of zero-tree coding/decoding method of the present invention:
As shown in Figure 2, after the ground floor wavelet transformation is finished, low frequency sub-band LL1 is done second layer wavelet transformation again, and then the low frequency sub-band behind the second layer wavelet transformation is done the 3rd layer of wavelet transformation, at last the 3rd layer of wavelet low frequency subband done the 4th layer of wavelet transformation again.Only the reason that the multilayer wavelet transformation is carried out in the low frequency sub-band zone is: the one, because most big absolute value wavelet conversion coefficient is contained in the low frequency sub-band zone, and the low frequency sub-band zone is bigger, higher value further might be concentrated; The 2nd, because the high-frequency sub-band zone, big absolute value wavelet conversion coefficient is few, and it is carried out wavelet transformation, does not have remarkable result.
Another improvement of zerotree image of the present invention is: on node is handled, be that the consequent node from lowermost layer begins scanning, four child nodes that belong to same father node are read for one group in proper order, do not need the interval between group and the group.At first the wavelet conversion coefficient to each node takes absolute value, and quantizes simultaneously then, utilizes comparator that absolute value and all quantization thresholds of each wavelet conversion coefficient are compared: if less than threshold value, then be little coefficient, and comparator output 0; Otherwise be big coefficient, comparator output 1.These quantized result are arranged in together from high to low by quantizing threshold value, just show as the binary representation of a plurality of bit planes, the corresponding quantization threshold of each bit plane.Afterwards, zerotree image be with by group, successively zero tree method of discrimination scanning quantizes mark, judges zero tree structure from low layer to high level.
In order to increase the quantity of little coefficient, improve code efficiency, the wavelet conversion coefficient that becomes excessive coefficient when the higher thresholds is carried out zero clearing handle.Clear operation can utilize general coding and decoding device combined treatment, binary numeral after the quantification is changed into only keep a most significant bit 1, all the other low bit zero clearings, the zerotree image that the numerical value after the processing can walk abreast.
Differentiation in the parallel zerotree image is to utilize another group comparator: if the numerical value of one group of four consequent node of the wavelet tree lowermost layer of a certain bit plane all is 0, this comparator output 1 is expressed as zero tree, otherwise non-vanishing tree is represented in comparator output 0.This output numerical value deposits buffer or external memory storage in the sheet in, and its corresponding father node is corresponding one by one.Because the consequent node of lowermost layer no longer includes consequent node, thus can not be zerotree root, and two kinds zero tree label symbol: isolated point zero point IZ (00) or big coefficient VAL (01) can only be arranged, an available low bit is represented.But the isolated point zero point IZ (00) of remainder layer and big coefficient VAL (01) must represent with two bits, in order to avoid data corruption.
The consequent node of a wavelet tree lowermost layer then brings Forward after all reading and finishing, and still reads in proper order for one group by four child nodes that belong to same father node.When reading wavelet conversion coefficient, read the comparative result of the child node corresponding synchronously with it.If four nodes in a group all be little coefficient 0, and the comparative result of the child node of each coefficient correspondence all is 1, and comparator output 1 is expressed as zero and sets; Otherwise non-vanishing tree, comparator output 0.The rest may be inferred, on move to toply because no longer include father node, toply do not need zero tree to differentiate, with itself numerical value 1 or 0 as low bit, the comparative result of four child nodes of its correspondence is combined as higher bit, just forms zero tree label symbol, the 10th, zerotree root ZTR, the 11st, band value zerotree root VZTR, the 00th, isolated point zero point IZ, the 01st, big coefficient VAL.Be noted that: in the processing procedure of side circuit, postpone, so, need insert delay when memory read/write is changed between layer and the layer if the input and output of four child node comparative results exist.
Parallel zerotree image carries out differentiation and the mark of zero tree to any 8 bit planes of the binary numeral after handling, usually select to handle earlier the bit plane of upper bit, and then handle the bit plane of low bit, such as: 8 bit binary number just from the highest-order bit plane to the parallel processing of lowest bit bit plane; If 16 bit numbers, then first parallel processing most-significant byte, back parallel processing least-significant byte, the inside of parallel processing most-significant byte or least-significant byte is still by the sequential processes from a high position to low level priority, up to the coding of finishing all bit planes.Parallel zerotree image also can once be handled the bit plane more than eight, and still, the control of input and output is comparatively complicated, and cost performance is higher.
Because clear operation is in all low quantization threshold place's zero clearings to big coefficient, to guarantee the numerical precision of big coefficient so, also need thinning processing, promptly after the processing of a certain bit plane finishes, by a slave process, export all bit value of big coefficient absolute value on next bit plane and values of symbol of corresponding big coefficient in the big coefficient queue table successively again.
According to above-mentioned analysis, cooperate as can be seen shown in Figure 9ly, the cataloged procedures of these four layers zero trees mainly may further comprise the steps:
1) quantizes.Make each quantization threshold according to the requirement of Rate Control, the absolute value of wavelet conversion coefficient is quantized simultaneously.In order to control coding quality neatly, different sub-band can use different quantization thresholds.If the absolute value of a certain coefficient, thinks promptly that this coefficient is big coefficient greater than quantization threshold, only get its numerical value for big coefficient corresponding to relatively largeization threshold value, it is corresponding to all numerical value zero clearings of less quantization threshold.In Design of Digital Circuit, data all are binary numbers, and therefore, quantization threshold is often got 2 index, are the bi-level-quant mode among the MPEG-4.
This quantization step is mainly realized by sample circuit, as shown in Figure 5, depth-first fashion according to the reverse wavelet transform tree from external memory storage R501 calls over wavelet conversion coefficient, deliver among the arithmetic unit A502, arithmetic unit A502 takes absolute value to wavelet conversion coefficient, output to comparator C 503 then, comparator C 503 compares absolute value and a plurality of threshold value of wavelet conversion coefficient simultaneously, can set arbitrarily according to actual needs as for the number or the numerical value of threshold value.If less than certain threshold value then export one 0, otherwise export one 1; This group output is done zero clearing by conventional coders C504 and decoder C505 combination to big coefficient again and is handled.In this quantizing process, by the read data operation of Signal Message Address generator U505 management and control external memory storage R501.
2) master control process.Depth-first fashion according to reverse wavelet transform tree is searched and is marked, from the consequent node of lowermost layer, and one group of four child node that belong to same father node, sequential processes by group.
This is searched the mark process and is mainly realized by the decision circuit of zero tree structure, and as shown in Figure 6, the data that process quantizes are by exporting among the decoder C505, by eight bit plane parallel processings.One group of four register is arranged on each bit plane, and register R601, R602, R603, R604 postpone four child node data that belong to same father node respectively, make it compare, judge whether to constitute zero tree simultaneously in comparator C 606.This judgment criterion is: for the data of ground floor, if four child node data that belong to same father node of this bit plane are 0 entirely, then constitute zero tree, judged result is output as 1; And for second and third data with four layers, if the judged result of low layer child node is 1 entirely, and high-rise data are 0 entirely, then constitute zero tree.Otherwise, according to character output zero tree label symbol IZ, VAL, ZTR or the VZTR of this node and consequent node.In lowermost layer, output have only two kinds of symbols of IZ, VAL, represent that with a bit judged result of low layer child node outputs among the buffer L607.
As shown in Figure 7, zero tree label symbol inputs to shift register S701, and after shift register S701 imported 16 bits, data latching was waited for choosing of data selector M703 to latch L702.Data selector M703 outputs to external memory storage R706 by gating control logic S704 according to the data of exporting a certain bit plane of priority principle gating to the data of low bit plane by high bit plane, and the write operation of external memory storage R706 is by address generator U705 management control in this process.
3) slave process.The significant bit figure place of difference or quotient between the absolute value of the big absolute value wavelet conversion coefficient of output and the quantization threshold, and then the effective ratio paricular value of output difference or quotient earlier.If quantize by bit in the bit plane mode, then each bit plane is only exported positive and negative number that hangs down a bit value and big coefficient.
The slave process circuit outputs to address location corresponding to the external memory storage R706 of each bit plane with the low bit value of big coefficient, if its symbol and exist coding with the difference of max-thresholds or quotient to output to of R706 independently in the address location.By external memory storage R706 from high to low, go into the order that goes out earlier after the data and read, send the zerotree image circuit according to bit plane.
In order to simplify zerotree image, save circuit resource and operation time, only coding because the big coefficient of higher bit bit plane is less, can be finished by the simple process of slave process in the bit plane of low eight bits of coding or smaller amounts.As: only get eight quantization thresholds, big coefficient when slave process is at first handled maximum quantization threshold, which is littler according to the difference of the absolute value of coefficient the most greatly and maximum quantization threshold or quotient, difference or quotient are handled in decision, the difference of each big coefficient of at first encoding or the number of significant digit of quotient, export the difference of its big coefficient or the effective bit of quotient then, so just can avoid exporting a string 0 value of higher bit position.
The coefficient of a wavelet tree is reflected to and only is related to a certain part in the image, therefore, if the data of eight bit planes are directly exported as code stream behind the zerotree image, then can destroy the embedding character of zerotree image, because code stream is the significant data elder generation line output to quantize one by one no longer, but be order output with the wavelet tree, stopping output code flow at any time, the overall performance of image may be destroyed.Therefore, parallel zerotree image output needs press the bit plane buffer memory, wait all wavelet tree codings to finish after, organize bit plane code stream from high to low to export by the principle of the significant data elder generation line output that quantizes one by one again.
Want all wavelet tree coding outputs of buffer memory view picture image, need jumbo external memory storage, deposit 16 Bit datas in the address of general big volume, external memory, and the output of the zerotree image on bit plane is 1 bit (such as minimum wavelet transformation layer) or 2 bits (all the other wavelet transformation layers).Therefore, need buffer memory and gather and output to external memory storage again behind full 16 bits.The output of zerotree image is at random, four label symbol: ZTR (10), VZTR (11), IZ (00), big coefficient VAL (01) according to zerotree image, do not need output when much only being zero tree, producing when meeting four label symbols, zerotree image just has output.Therefore, it also is at random which bit plane gathers full 16 bits earlier, and the principle of output is: gather the output earlier of full 16 bits earlier, when several bit planes gather full 16 bits simultaneously, according to being exported in proper order to the priority principle that hangs down bit plane by high bit plane.
Suppose a kind of opposite extreme situations, expire 16 bits if eight bit planes gather simultaneously, order output needs eight clocks from high to low, if in these eight clocks, eight bit planes gather once more expires 16 bits (2 bits/clock), then needs output in proper order again.If nine bit planes of parallel processing, then minimum bit plane may interiorly for a long time be taken turns less than output, and data will be accumulated, need more inner buffer unit, resource consumption is increased, it is complicated that control becomes, therefore, eight bit planes of parallel processing selection that is good cost performance.
Externally in the memory, address location is divided into a plurality of parts according to the number of bit plane, the dateout on each part storage corresponding positions plane.When organizing code stream output at last, all data of the high bit plane of output are exported all data than low bit plane more earlier, to guarantee the embedded performance of zerotree image.For the facility of zero tree decoding, all data output order of bit plane are opposite with the order that zerotree image produces.For example, zero tree label symbol writes external memory storage at last, lists code stream output on the contrary at first in, because zero tree decoding begins to recover than greatly simple and direct from consequent node from older generation's node.
Referring to shown in Figure 8, zerotree image circuit of the present invention comprises that a pair of memory 2051 and 2052, quantizer C801, zero clearing processor C802, zero tree are differentiated and mark C803, data output control C804 and address generator C805; Memory 2051 is used for the wavelet conversion coefficient before the memory encoding, and memory 2052 is used to store the binary data bits value through the zero tree node of zerotree image of the present invention.Read wavelet conversion coefficient from memory 2051, after the quantification treatment through quantizer C801, the wavelet conversion coefficient that will be become excessive coefficient by zero clearing processor C802 when the higher thresholds carries out zero clearing, and only keeping the highest-order bit is 1; Afterwards, differentiate and mark unit C803 carries out to wavelet conversion coefficient that zero tree is differentiated and zero tree symbol mark, generate zero tree structure by zero tree; Data after will being encoded by data output control unit C804 export in the memory 2052.Address generator C805 is used for the write operation of control storage.Reduce the number of memory if desired, also can be only with a memory 2051, data output control unit C804 controls the rhythm that data export well and gets final product.
At the cataloged procedure of above-mentioned zero tree, corresponding, the decode procedure of zero tree is that wavelet conversion coefficient is recovered.
For simplifying zero tree decode operation, before zero tree decoding beginning,, avoid writing 0 operation in a large number in the zero tree decoding, and save the plenty of time at first to depositing all addresses, the bit zero clearing of the memory that recovers wavelet conversion coefficient.Then, according to the refinement numerical value of 00,01,10 and 11 numerical value of four zero tree label symbols of the input of bit plane from high to low and corresponding quantization threshold value, slave process output, the higher bit position that can progressively recover wavelet conversion coefficient is to low bit.
What at first will recover is the zero tree structure of each wavelet tree, zero tree label symbol accurately is put into each position of wavelet tree that is:.Because all data input orders of bit plane are opposite with the order that zerotree image produces, that is: the top zero tree label symbol input in advance of wavelet transformation, if ZTR (10) or VZTR (11), because memory is zero clearing, only need 1 of VZTR (11) write that on the corresponding wavelet conversion coefficient position corresponding bits position in the image, the zero tree structure of this wavelet tree promptly recovers to finish.Read in follow-up one zero tree label symbol again, corresponding to the top tree root position of other one tree.If IZ (00) or VAL (01), only need VAL (01) write that on the corresponding top wavelet conversion coefficient position corresponding bits position in the image; Read in zero tree label symbol of follow-up four corresponding its child nodes then, it with the low bit place values of these four zero tree label symbols 1 the corresponding bits position on corresponding high-rise wavelet conversion coefficient position that writes in the image, then according to its higher bit position, if some is 0, then read in zero tree label symbol of follow-up four corresponding its child nodes; If be 1, then mark its four child nodes and be zero tree, need the higher bit position of a buffer storage child node here because the higher bit bit representation of zero tree label symbol the character of consequent node.In addition, in actual write operation, because memory can not be to bit manipulation, therefore 16 bits or read simultaneously, or write simultaneously need first sense data, the corresponding bits of data is changed, and then write memory.
Because zerotree image is to be unit with the tree, tree is inner to be unit with the layer, and zero tree decoding also must be that recover from level to level tree inside, and one tree one tree ground recovers then.When certain one deck of tree inside, higher bit place value according to its corresponding father node in the buffer memory, be 0, read in follow-up four zero tree label symbols, with the low bit of zero tree label symbol is that 1 value writes that on the corresponding wavelet conversion coefficient position corresponding bits position in the image, the higher bit position that buffer memory zero is set label symbol; As the higher bit place value is 1, does not need memory is carried out read-write operation, but needs four 1 values of buffer memory to be its child node, expression zero tree.
After the zero tree structure of wavelet tree recovers,, obtain original value, need the data of slave process to come refinement because big coefficient can only recover its bit place value corresponding to the maximum quantization threshold value.Refinement operation only needs and will be written to the locational corresponding low bit position of wavelet conversion coefficient by bit manipulation for 1 bit place value.
As seen, this zero tree decode procedure mainly comprises the steps, simultaneously referring to shown in Figure 10:
1) master control process is recovered zero tree structure.
A. at first to writing the external memory storage zero clearing of wavelet conversion coefficient restore data, carry out again after avoiding and write 0 operation.
B. according to the wavelet tree of the input of bit plane from high to low, the dibit zero of corresponding the 4th layer of tree root position of input is set label symbol earlier, if this label symbol is ZTR (10) or VZTR (11), only the low bit 1 of VZTR (11) is write that on the corresponding wavelet conversion coefficient position corresponding bits position in the image, the zero tree structure of this wavelet tree promptly recovers to finish; Read in follow-up one zero tree label symbols again, the zero tree structure that carries out next wavelet tree recovers.If IZ (00) or VAL (01), then the low bit 1 of VAL (01) is write that on the corresponding top wavelet conversion coefficient position corresponding bits position in the image, read in zero tree label symbol of follow-up four corresponding its child nodes then; It with the low bit place values of these four zero tree label symbols 1 the corresponding bits position on corresponding high-rise wavelet conversion coefficient position that writes in the image, then according to its higher bit position, if some is 0, read in zero tree label symbol of follow-up four corresponding its child nodes; Be 1, marking its four child nodes is zero tree.
In fact, the low bit of the two bits of data of being read in is exactly the value of current node, and the character of its offspring's node of higher bit bit representation, 1 expression, zero tree recovers consequent node need not read new data, otherwise needs grouping to read.Wherein, the higher bit position of two bits of data needs buffer memory, to control down the recovery of its child node in one deck.
C. when data are imported corresponding ground floor, a bit is represented one zero tree label symbol, and 1 expression VAL need write corresponding bits position on the wavelet conversion coefficient position of corresponding lowermost layer in the image; 0 expression IZ need not carry out write operation.
2) slave process recovers the numerical value of big coefficient.
A. only need to be written to for 1 bit place value the locational corresponding low bit position of wavelet conversion coefficient.The zero tree labeled data that has at first recovered in the depth-first fashion reading external memory by wavelet tree if the zero tree data of having recovered are 0, then reads the data in the next address successively.
If the zero tree data of b. having recovered are not 0, and the big coefficient data to be decoded of input is 1, then writes in the image a corresponding low bit on the corresponding wavelet conversion coefficient position; If the zero tree data of having recovered are not 0, but the data to be decoded of input are 0, do not carry out write operation.Read the data in the next address successively.
If do not handle the data of all bit planes during zerotree image, so, at first need the number of significant digit according to difference or quotient between the big coefficient of absolute value maximum and the maximum quantization threshold, decision recovers the difference of its big coefficient or the effective bit of quotient; With difference or quotient and maximum quantization threshold addition or multiply each other, its result carries out the Refinement operation of zero tree decoding more then.
All binary numbers as needs, then recover big coefficient original value according to quantization threshold after recovering to finish.For ease of wavelet inverse transformation, symbol for changing the complement of two's two's complement into, negative big coefficient can be write the respective memory raw address.
In video data compression and Data Compression of Image technology, when big absolute value wavelet conversion coefficient focuses on to a certain degree, when again it being carried out wavelet transformation, generally do not have more significant effect, therefore, wavelet transformation is done three to five layers, just no longer to more high-rise development.Wavelet transformation increases or reduces one deck, integrated circuit is required the variation that can not produce matter.Wavelet transformation zero-tree coding/decoding circuit and its implementation that the present invention is given can support that zero of three to five layers of two-dimentional bi-orthogonal wavelet transformation sets coding and decoding.
The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.
Claims (18)
1, a kind of implementation method of ZT coding comprises an above quantizing process, an above master control process and an above slave process, it is characterized in that,
A described above quantizing process is carried out simultaneously to a quantification with upper threshold value, after quantizing to finish, with the value zero clearing of big coefficient at all low quantization threshold places;
A described above master control process and slave process carry out zerotree image from the higher bit bit plane to low bit plane, and the zerotree image of an above bit plane of parallel processing;
Each master control process to the node of wavelet tree be from the low layer to the high level by group, successively, carry out scan process by tree, and with the corresponding node of zerotree root ZTR (10), band value zerotree root VZTR (11), isolated point zero point IZ (00), (01) four kind of symbol mark of big coefficient VAL zero tree structure;
Each slave process is exported low bit value and the corresponding big coefficient symbols value less than respective threshold of all big coefficient absolute values in the big coefficient queue table successively after the master control process of a bit plane is finished.
2, method according to claim 1 is characterized in that: described parallel processing is that zerotree image is carried out on maximum 8 bit planes simultaneously.
3, method according to claim 1 is characterized in that: the low bit of described four kinds zero tree label symbols is 0, and it is little coefficient that the expression wavelet conversion coefficient quantizes the back, and low bit is 1, and it is big coefficient that the expression wavelet conversion coefficient quantizes the back; The height ratio of this label symbol is expressed as zero tree specially for 1, and height ratio is expressed as the non-zero tree specially for 0.
4, according to claim 1 or 3 described methods, it is characterized in that: only there is isolated point zero point IZ (00) in the lowermost layer of described wavelet tree, or (01) two kind zero tree label symbol of big coefficient VAL, and the zero tree label symbol of this layer is represented by a bit.
5, method according to claim 1 is characterized in that: when high level scanned, every layer by one group of four node by low layer for described master control process, by group, successively, by the tree sequential scanning.
6, according to claim 1,3 or 5 described methods, it is characterized in that:,, then constitute zero tree if all nodal values of one group are 0 entirely for the wavelet tree data that are positioned at lowermost layer; For more high-rise wavelet tree data,, then constitute zero tree if all nodal values are 10 entirely in one group.
7, according to claim 1 or 3 described methods, it is characterized in that: described master control process if constitute zero tree, then increases a higher bit 1 to its corresponding father node, otherwise increases a higher bit 0 when zero tree mark.
8, method according to claim 7 is characterized in that: the value of the higher bit position that is increased is stored separately.
9, method according to claim 1 is characterized in that, described slave process further comprises:
A. when the master control process is untreated all bit-plane datas, the size of difference and quotient between the absolute value of maximum value wavelet conversion coefficient and the maximum quantization threshold relatively, the smaller value of getting among both is the value of selecting;
B. export the significant bit figure place of the value of selecting earlier, then the significant bit place value of the output value of selecting.
10, a kind of implementation method of ZT decoding is characterized in that this method comprises at least:
A. to wanting the external memory storage zero clearing of write recovery data;
B. the order from zero height of tree layer to low layer, from the higher bit bit plane to low bit plane, by the zero tree label symbol that is read in successively, recover the zero tree structure of wavelet tree by tree; After a ZT recovers to finish, continue to read in follow-up zero tree label symbol again, carry out the recovery of next ZT;
C. from the high level to the low layer, recover the numerical value of big coefficient by turn according to the slave process coded data of being read in.
11, method according to claim 10 is characterized in that: the low bit of the zero tree label symbol bit value that is read in is the current node value, the character of its offspring's node of higher bit bit representation, and this higher bit position needs buffer memory.
12, method according to claim 11 is characterized in that:
When the low bit of the zero tree label symbol bit value that reads in is 1, the locational corresponding bits of the wavelet conversion coefficient of 1 correspondence position is write 1, otherwise, do not carry out write operation;
When the higher bit position of the zero tree label symbol bit value that reads in was 1, recovering consequent node did not need to read zero new tree label symbol again, otherwise, need grouping to read all child nodes zero tree label symbol of this father node correspondence.
13,, it is characterized in that described step b further comprises the steps: according to claim 11 or 12 described methods
When the top data bit value of reading in is 10 or 11, only 1 in 11 are write the locational corresponding bits of corresponding wavelet conversion coefficient position, this ZT structure is promptly recovered to finish;
When the top data bit value of reading in is 00 or 01, only 1 in 01 is write the locational corresponding bits of corresponding wavelet conversion coefficient position, read in the bit value of follow-up zero tree label symbol then.
14, method according to claim 10 is characterized in that described step c further comprises the steps:
C1. the data from high level to low layer order reading external memory are 0 if read in data, read the data in the next address successively; If read in data and be 1 and the input data be 1, then write the locational corresponding bits of corresponding wavelet conversion coefficient position with 1, read the data in the next address then successively; To import data be 0 if read in data and be 1, then reads the data in the next address successively.
15, method according to claim 14 is characterized in that described step c further comprises the steps:
The data of all bit planes if c2. be untreated during zerotree image, the smaller value of difference and quotient is the value of selecting between the big coefficient of the maximum that takes absolute value and the maximum quantization threshold, according to the number of significant digit of the value of selecting, decision needs the effective bit of the big coefficient of recovery;
If c3. the value of selecting is a difference, then with difference and maximum quantization threshold addition, otherwise, quotient and maximum quantization threshold are multiplied each other;
C4. the data from high level to low layer order reading external memory are 0 if read in data, read the data in the next address successively; If read in data and be 1 and the input data be 1, then write the locational corresponding bits of corresponding wavelet conversion coefficient position with 1, read the data in the next address then successively; To import data be 0 if read in data and be 1, then reads the data in the next address successively.
16, a kind of realization circuit of ZT coding is characterized in that: comprise a memory, quantizer, zero clearing processor, zero tree differentiation and mark unit, data output control unit and address generator at least; From memory, read wavelet conversion coefficient, through after the quantification treatment of quantizer, by the zero clearing processor the big coefficient after quantizing is carried out zero clearing, afterwards, differentiate and the mark unit carries out to wavelet conversion coefficient that zero tree is differentiated and zero tree symbol mark by zero tree, last data after will being encoded by data output control unit export in the memory.
17, circuit according to claim 16 is characterized in that: described zero clearing processor is made up of conventional coders and decoder, only keeps most significant bit 1 in the binary numeral after wavelet conversion coefficient quantizes, the whole zero clearings of all the other low bits.
18, circuit according to claim 16 is characterized in that: utilize buffer storage zero tree discrimination result, zero tree scanning, coding are carried out continuously.
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